From: Will Deacon <will@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: qwandor@google.com, tabba@google.com,
Steven Price <steven.price@arm.com>,
wedsonaf@google.com, dbrazdil@google.com,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH] arm64: unify WORKAROUND_SPECULATIVE_AT_{NVHE,VHE}
Date: Fri, 27 Mar 2020 18:09:14 +0000 [thread overview]
Message-ID: <20200327180913.GA10454@willie-the-truck> (raw)
In-Reply-To: <e280f3f31bd5edc9db55757fcfa4ec62@kernel.org>
On Fri, Mar 27, 2020 at 05:52:59PM +0000, Marc Zyngier wrote:
> On 2020-03-27 17:48, Andrew Scull wrote:
> > Thanks, Steven. Could we look into the EPD* caching microarch details
> > Marc was referring to for these A55 and A76 cores?
>
> Only the folks that have access to the RTL can tell you, unfortunately.
>
> Thankfully, there is a bunch of people on Cc that should be able to ping
> the relevant teams and report back...
Yup, otherwise I guess we can throw in the TLB invalidation after setting
the EPDx bits until we have clarity from Arm. We wouldn't need to broadcast
it, so it might not be too bad on performance. If it is, I suppose we could
switch to a reserved VMID?
Will
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next prev parent reply other threads:[~2020-03-27 18:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-27 14:39 [RFC PATCH] arm64: unify WORKAROUND_SPECULATIVE_AT_{NVHE,VHE} Andrew Scull
2020-03-27 14:59 ` Steven Price
2020-03-27 17:48 ` Andrew Scull
2020-03-27 17:52 ` Marc Zyngier
2020-03-27 18:09 ` Will Deacon [this message]
2020-03-28 11:23 ` Marc Zyngier
2020-03-30 10:06 ` Will Deacon
2020-04-03 12:57 ` Andrew Scull
2020-04-17 16:41 ` Will Deacon
2020-04-20 13:46 ` Steven Price
2020-03-27 16:11 ` James Morse
2020-03-27 16:59 ` Will Deacon
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