* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
@ 2020-12-01 12:54 wangxingang
0 siblings, 0 replies; 14+ messages in thread
From: wangxingang @ 2020-12-01 12:54 UTC (permalink / raw)
To: eric.auger
Cc: Xieyingtai, jean-philippe, kvm, vivek.gautam, maz, joro, will,
iommu, linux-kernel, alex.williamson, zhangfei.gao, robin.murphy,
kvmarm, eric.auger.pro
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Hi Eric
On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote:
>@@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void *cookie)
> * insertion to guarantee those are observed before the TLBI. Do be
> * careful, 007.
> */
>- if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
>+ if (ext_asid >= 0) { /* guest stage 1 invalidation */
>+ cmd.opcode = CMDQ_OP_TLBI_NH_ASID;
>+ cmd.tlbi.asid = ext_asid;
>+ cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid;
>+ } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
Found a problem here, the cmd for guest stage 1 invalidation is built,
but it is not delivered to smmu.
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* [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) @ 2020-11-18 11:21 Eric Auger 2020-11-18 11:21 ` [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger 0 siblings, 1 reply; 14+ messages in thread From: Eric Auger @ 2020-11-18 11:21 UTC (permalink / raw) To: eric.auger.pro, eric.auger, iommu, linux-kernel, kvm, kvmarm, will, joro, maz, robin.murphy, alex.williamson Cc: jean-philippe, jacob.jun.pan, nicoleotsuka, vivek.gautam, yi.l.liu, zhangfei.gao This series brings the IOMMU part of HW nested paging support in the SMMUv3. The VFIO part is submitted separately. The IOMMU API is extended to support 2 new API functionalities: 1) pass the guest stage 1 configuration 2) pass stage 1 MSI bindings Then those capabilities gets implemented in the SMMUv3 driver. The virtualizer passes information through the VFIO user API which cascades them to the iommu subsystem. This allows the guest to own stage 1 tables and context descriptors (so-called PASID table) while the host owns stage 2 tables and main configuration structures (STE). Best Regards Eric This series can be found at: https://github.com/eauger/linux/tree/5.10-rc4-2stage-v13 (including the VFIO part in his last version: v11) The series includes a patch from Jean-Philippe. It is better to review the original patch: [PATCH v8 2/9] iommu/arm-smmu-v3: Maintain a SID->device structure The VFIO series is sent separately. History: v12 -> v13: - fixed compilation issue with CONFIG_ARM_SMMU_V3_SVA reported by Shameer. This urged me to revisit patch 4 into iommu/smmuv3: Allow s1 and s2 configs to coexist where s1_cfg and s2_cfg are not dynamically allocated anymore. Instead I use a new set field in existing structs - fixed 2 others config checks - Updated "iommu/arm-smmu-v3: Maintain a SID->device structure" according to the last version v11 -> v12: - rebase on top of v5.10-rc4 Eric Auger (14): iommu: Introduce attach/detach_pasid_table API iommu: Introduce bind/unbind_guest_msi iommu/smmuv3: Allow s1 and s2 configs to coexist iommu/smmuv3: Get prepared for nested stage support iommu/smmuv3: Implement attach/detach_pasid_table iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs iommu/smmuv3: Implement cache_invalidate dma-iommu: Implement NESTED_MSI cookie iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions iommu/smmuv3: Implement bind/unbind_guest_msi iommu/smmuv3: Report non recoverable faults iommu/smmuv3: Accept configs with more than one context descriptor iommu/smmuv3: Add PASID cache invalidation per PASID Jean-Philippe Brucker (1): iommu/arm-smmu-v3: Maintain a SID->device structure drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 659 ++++++++++++++++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 103 ++- drivers/iommu/dma-iommu.c | 142 ++++- drivers/iommu/iommu.c | 105 ++++ include/linux/dma-iommu.h | 16 + include/linux/iommu.h | 41 ++ include/uapi/linux/iommu.h | 54 ++ 7 files changed, 1042 insertions(+), 78 deletions(-) -- 2.21.3 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-11-18 11:21 [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger @ 2020-11-18 11:21 ` Eric Auger 2020-12-01 13:33 ` Xingang Wang 0 siblings, 1 reply; 14+ messages in thread From: Eric Auger @ 2020-11-18 11:21 UTC (permalink / raw) To: eric.auger.pro, eric.auger, iommu, linux-kernel, kvm, kvmarm, will, joro, maz, robin.murphy, alex.williamson Cc: jean-philippe, jacob.jun.pan, nicoleotsuka, vivek.gautam, yi.l.liu, zhangfei.gao With nested stage support, soon we will need to invalidate S1 contexts and ranges tagged with an unmanaged asid, this latter being managed by the guest. So let's introduce 2 helpers that allow to invalidate with externally managed ASIDs Signed-off-by: Eric Auger <eric.auger@redhat.com> --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 35 +++++++++++++++++---- 1 file changed, 29 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 805acdc18a3a..fdecc9f17b36 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1697,9 +1697,9 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, } /* IO_PGTABLE API */ -static void arm_smmu_tlb_inv_context(void *cookie) +static void __arm_smmu_tlb_inv_context(struct arm_smmu_domain *smmu_domain, + int ext_asid) { - struct arm_smmu_domain *smmu_domain = cookie; struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_cmdq_ent cmd; @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void *cookie) * insertion to guarantee those are observed before the TLBI. Do be * careful, 007. */ - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { + if (ext_asid >= 0) { /* guest stage 1 invalidation */ + cmd.opcode = CMDQ_OP_TLBI_NH_ASID; + cmd.tlbi.asid = ext_asid; + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { arm_smmu_tlb_inv_asid(smmu, smmu_domain->s1_cfg.cd.asid); } else { cmd.opcode = CMDQ_OP_TLBI_S12_VMALL; @@ -1721,9 +1725,17 @@ static void arm_smmu_tlb_inv_context(void *cookie) arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0); } -static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, +static void arm_smmu_tlb_inv_context(void *cookie) +{ + struct arm_smmu_domain *smmu_domain = cookie; + + __arm_smmu_tlb_inv_context(smmu_domain, -1); +} + +static void __arm_smmu_tlb_inv_range(unsigned long iova, size_t size, size_t granule, bool leaf, - struct arm_smmu_domain *smmu_domain) + struct arm_smmu_domain *smmu_domain, + int ext_asid) { struct arm_smmu_device *smmu = smmu_domain->smmu; unsigned long start = iova, end = iova + size, num_pages = 0, tg = 0; @@ -1738,7 +1750,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, if (!size) return; - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { + if (ext_asid >= 0) { /* guest stage 1 invalidation */ + cmd.opcode = CMDQ_OP_TLBI_NH_VA; + cmd.tlbi.asid = ext_asid; + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { cmd.opcode = CMDQ_OP_TLBI_NH_VA; cmd.tlbi.asid = smmu_domain->s1_cfg.cd.asid; } else { @@ -1798,6 +1814,13 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, arm_smmu_atc_inv_domain(smmu_domain, 0, start, size); } +static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size, + size_t granule, bool leaf, + struct arm_smmu_domain *smmu_domain) +{ + __arm_smmu_tlb_inv_range(iova, size, granule, leaf, smmu_domain, -1); +} + static void arm_smmu_tlb_inv_page_nosync(struct iommu_iotlb_gather *gather, unsigned long iova, size_t granule, void *cookie) -- 2.21.3 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-11-18 11:21 ` [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger @ 2020-12-01 13:33 ` Xingang Wang 2020-12-01 13:58 ` Auger Eric 0 siblings, 1 reply; 14+ messages in thread From: Xingang Wang @ 2020-12-01 13:33 UTC (permalink / raw) To: eric.auger Cc: xieyingtai, jean-philippe, kvm, maz, joro, will, iommu, linux-kernel, vivek.gautam, alex.williamson, zhangfei.gao, robin.murphy, kvmarm, eric.auger.pro Hi Eric On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote: >@@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void *cookie) > * insertion to guarantee those are observed before the TLBI. Do be > * careful, 007. > */ >- if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >+ if (ext_asid >= 0) { /* guest stage 1 invalidation */ >+ cmd.opcode = CMDQ_OP_TLBI_NH_ASID; >+ cmd.tlbi.asid = ext_asid; >+ cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; >+ } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { Found a problem here, the cmd for guest stage 1 invalidation is built, but it is not delivered to smmu. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-01 13:33 ` Xingang Wang @ 2020-12-01 13:58 ` Auger Eric 2020-12-02 12:59 ` Wang Xingang 2020-12-03 18:42 ` Shameerali Kolothum Thodi 0 siblings, 2 replies; 14+ messages in thread From: Auger Eric @ 2020-12-01 13:58 UTC (permalink / raw) To: Xingang Wang Cc: xieyingtai, jean-philippe, kvm, maz, joro, will, iommu, linux-kernel, vivek.gautam, alex.williamson, zhangfei.gao, robin.murphy, kvmarm, eric.auger.pro Hi Xingang, On 12/1/20 2:33 PM, Xingang Wang wrote: > Hi Eric > > On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote: >> @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void *cookie) >> * insertion to guarantee those are observed before the TLBI. Do be >> * careful, 007. >> */ >> - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >> + if (ext_asid >= 0) { /* guest stage 1 invalidation */ >> + cmd.opcode = CMDQ_OP_TLBI_NH_ASID; >> + cmd.tlbi.asid = ext_asid; >> + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; >> + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { > > Found a problem here, the cmd for guest stage 1 invalidation is built, > but it is not delivered to smmu. > Thank you for the report. I will fix that soon. With that fixed, have you been able to run vSVA on top of the series. Do you need other stuff to be fixed at SMMU level? As I am going to respin soon, please let me know what is the best branch to rebase to alleviate your integration. Best Regards Eric _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-01 13:58 ` Auger Eric @ 2020-12-02 12:59 ` Wang Xingang 2020-12-03 18:42 ` Shameerali Kolothum Thodi 1 sibling, 0 replies; 14+ messages in thread From: Wang Xingang @ 2020-12-02 12:59 UTC (permalink / raw) To: Auger Eric Cc: xieyingtai, jean-philippe, kvm, maz, joro, will, iommu, linux-kernel, vivek.gautam, alex.williamson, zhangfei.gao, robin.murphy, kvmarm, eric.auger.pro Thanks for your reply. We are testing vSVA, and will let you know if other problems are found. On 2020/12/1 21:58, Auger Eric wrote: > Hi Xingang, > > On 12/1/20 2:33 PM, Xingang Wang wrote: >> Hi Eric >> >> On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote: >>> @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void *cookie) >>> * insertion to guarantee those are observed before the TLBI. Do be >>> * careful, 007. >>> */ >>> - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >>> + if (ext_asid >= 0) { /* guest stage 1 invalidation */ >>> + cmd.opcode = CMDQ_OP_TLBI_NH_ASID; >>> + cmd.tlbi.asid = ext_asid; >>> + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; >>> + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >> >> Found a problem here, the cmd for guest stage 1 invalidation is built, >> but it is not delivered to smmu. >> > > Thank you for the report. I will fix that soon. With that fixed, have > you been able to run vSVA on top of the series. Do you need other stuff > to be fixed at SMMU level? As I am going to respin soon, please let me > know what is the best branch to rebase to alleviate your integration. > > Best Regards > > Eric > > . > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-01 13:58 ` Auger Eric 2020-12-02 12:59 ` Wang Xingang @ 2020-12-03 18:42 ` Shameerali Kolothum Thodi 2020-12-04 9:53 ` Jean-Philippe Brucker 2021-02-15 13:17 ` Auger Eric 1 sibling, 2 replies; 14+ messages in thread From: Shameerali Kolothum Thodi @ 2020-12-03 18:42 UTC (permalink / raw) To: Auger Eric, wangxingang Cc: Xieyingtai, jean-philippe, alex.williamson, kvm, maz, joro, linux-kernel, vivek.gautam, iommu, qubingbing, Zengtao (B), zhangfei.gao, eric.auger.pro, will, kvmarm, robin.murphy Hi Eric, > -----Original Message----- > From: kvmarm-bounces@lists.cs.columbia.edu > [mailto:kvmarm-bounces@lists.cs.columbia.edu] On Behalf Of Auger Eric > Sent: 01 December 2020 13:59 > To: wangxingang <wangxingang5@huawei.com> > Cc: Xieyingtai <xieyingtai@huawei.com>; jean-philippe@linaro.org; > kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org; > iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; > vivek.gautam@arm.com; alex.williamson@redhat.com; > zhangfei.gao@linaro.org; robin.murphy@arm.com; > kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com > Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with > unmanaged ASIDs > > Hi Xingang, > > On 12/1/20 2:33 PM, Xingang Wang wrote: > > Hi Eric > > > > On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote: > >> @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void > *cookie) > >> * insertion to guarantee those are observed before the TLBI. Do be > >> * careful, 007. > >> */ > >> - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { > >> + if (ext_asid >= 0) { /* guest stage 1 invalidation */ > >> + cmd.opcode = CMDQ_OP_TLBI_NH_ASID; > >> + cmd.tlbi.asid = ext_asid; > >> + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; > >> + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { > > > > Found a problem here, the cmd for guest stage 1 invalidation is built, > > but it is not delivered to smmu. > > > > Thank you for the report. I will fix that soon. With that fixed, have > you been able to run vSVA on top of the series. Do you need other stuff > to be fixed at SMMU level? I am seeing another issue with this series. This is when you have the vSMMU in non-strict mode(iommu.strict=0). Any network pass-through dev with iperf run will be enough to reproduce the issue. It may randomly stop/hang. It looks like the .flush_iotlb_all from guest is not propagated down to the host correctly. I have a temp hack to fix this in Qemu wherein CMDQ_OP_TLBI_NH_ASID will result in a CACHE_INVALIDATE with IOMMU_INV_GRANU_PASID flag and archid set. Please take a look and let me know. As I am going to respin soon, please let me > know what is the best branch to rebase to alleviate your integration. Please find the latest kernel and Qemu branch with vSVA support added here, https://github.com/hisilicon/kernel-dev/tree/5.10-rc4-2stage-v13-vsva https://github.com/hisilicon/qemu/tree/v5.2.0-rc1-2stage-rfcv7-vsva I have done some basic minimum vSVA tests on a HiSilicon D06 board with a zip dev that supports STALL. All looks good so far apart from the issues that have been already reported/discussed. The kernel branch is actually a rebase of sva/uacce related patches from a Linaro branch here, https://github.com/Linaro/linux-kernel-uadk/tree/uacce-devel-5.10 I think going forward it will be good(if possible) to respin your series on top of a sva branch with STALL/PRI support added. Hi Jean/zhangfei, Is it possible to have a branch with minimum required SVA/UACCE related patches that are already public and can be a "stable" candidate for future respin of Eric's series? Please share your thoughts. Thanks, Shameer > Best Regards > > Eric > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-03 18:42 ` Shameerali Kolothum Thodi @ 2020-12-04 9:53 ` Jean-Philippe Brucker 2020-12-04 10:20 ` Shameerali Kolothum Thodi 2021-02-15 13:17 ` Auger Eric 1 sibling, 1 reply; 14+ messages in thread From: Jean-Philippe Brucker @ 2020-12-04 9:53 UTC (permalink / raw) To: Shameerali Kolothum Thodi Cc: Xieyingtai, alex.williamson, wangxingang, kvm, vivek.gautam, maz, joro, linux-kernel, iommu, qubingbing, Zengtao (B), zhangfei.gao, eric.auger.pro, will, kvmarm, robin.murphy Hi Shameer, On Thu, Dec 03, 2020 at 06:42:57PM +0000, Shameerali Kolothum Thodi wrote: > Hi Jean/zhangfei, > Is it possible to have a branch with minimum required SVA/UACCE related patches > that are already public and can be a "stable" candidate for future respin of Eric's series? > Please share your thoughts. By "stable" you mean a fixed branch with the latest SVA/UACCE patches based on mainline? The uacce-devel branches from https://github.com/Linaro/linux-kernel-uadk do provide this at the moment (they track the latest sva/zip-devel branch https://jpbrucker.net/git/linux/ which is roughly based on mainline.) Thanks, Jean _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-04 9:53 ` Jean-Philippe Brucker @ 2020-12-04 10:20 ` Shameerali Kolothum Thodi 2020-12-04 10:23 ` Auger Eric 0 siblings, 1 reply; 14+ messages in thread From: Shameerali Kolothum Thodi @ 2020-12-04 10:20 UTC (permalink / raw) To: Jean-Philippe Brucker Cc: Xieyingtai, alex.williamson, wangxingang, kvm, vivek.gautam, maz, joro, linux-kernel, iommu, qubingbing, Zengtao (B), zhangfei.gao, eric.auger.pro, will, kvmarm, robin.murphy Hi Jean, > -----Original Message----- > From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org] > Sent: 04 December 2020 09:54 > To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com> > Cc: Auger Eric <eric.auger@redhat.com>; wangxingang > <wangxingang5@huawei.com>; Xieyingtai <xieyingtai@huawei.com>; > kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org; > iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; > vivek.gautam@arm.com; alex.williamson@redhat.com; > zhangfei.gao@linaro.org; robin.murphy@arm.com; > kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com; Zengtao (B) > <prime.zeng@hisilicon.com>; qubingbing <qubingbing@hisilicon.com> > Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with > unmanaged ASIDs > > Hi Shameer, > > On Thu, Dec 03, 2020 at 06:42:57PM +0000, Shameerali Kolothum Thodi wrote: > > Hi Jean/zhangfei, > > Is it possible to have a branch with minimum required SVA/UACCE related > patches > > that are already public and can be a "stable" candidate for future respin of > Eric's series? > > Please share your thoughts. > > By "stable" you mean a fixed branch with the latest SVA/UACCE patches > based on mainline? Yes. The uacce-devel branches from > https://github.com/Linaro/linux-kernel-uadk do provide this at the moment > (they track the latest sva/zip-devel branch > https://jpbrucker.net/git/linux/ which is roughly based on mainline.) Thanks. Hi Eric, Could you please take a look at the above branches and see whether it make sense to rebase on top of either of those? From vSVA point of view, it will be less rebase hassle if we can do that. Thanks, Shameer > Thanks, > Jean _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-04 10:20 ` Shameerali Kolothum Thodi @ 2020-12-04 10:23 ` Auger Eric 2021-01-14 16:58 ` Auger Eric 0 siblings, 1 reply; 14+ messages in thread From: Auger Eric @ 2020-12-04 10:23 UTC (permalink / raw) To: Shameerali Kolothum Thodi, Jean-Philippe Brucker Cc: Xieyingtai, alex.williamson, wangxingang, kvm, maz, joro, linux-kernel, vivek.gautam, iommu, qubingbing, Zengtao (B), zhangfei.gao, eric.auger.pro, will, kvmarm, robin.murphy Hi Shameer, Jean-Philippe, On 12/4/20 11:20 AM, Shameerali Kolothum Thodi wrote: > Hi Jean, > >> -----Original Message----- >> From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org] >> Sent: 04 December 2020 09:54 >> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com> >> Cc: Auger Eric <eric.auger@redhat.com>; wangxingang >> <wangxingang5@huawei.com>; Xieyingtai <xieyingtai@huawei.com>; >> kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org; >> iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; >> vivek.gautam@arm.com; alex.williamson@redhat.com; >> zhangfei.gao@linaro.org; robin.murphy@arm.com; >> kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com; Zengtao (B) >> <prime.zeng@hisilicon.com>; qubingbing <qubingbing@hisilicon.com> >> Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with >> unmanaged ASIDs >> >> Hi Shameer, >> >> On Thu, Dec 03, 2020 at 06:42:57PM +0000, Shameerali Kolothum Thodi wrote: >>> Hi Jean/zhangfei, >>> Is it possible to have a branch with minimum required SVA/UACCE related >> patches >>> that are already public and can be a "stable" candidate for future respin of >> Eric's series? >>> Please share your thoughts. >> >> By "stable" you mean a fixed branch with the latest SVA/UACCE patches >> based on mainline? > > Yes. > > The uacce-devel branches from >> https://github.com/Linaro/linux-kernel-uadk do provide this at the moment >> (they track the latest sva/zip-devel branch >> https://jpbrucker.net/git/linux/ which is roughly based on mainline.) > > Thanks. > > Hi Eric, > > Could you please take a look at the above branches and see whether it make sense > to rebase on top of either of those? > > From vSVA point of view, it will be less rebase hassle if we can do that. Sure. I will rebase on top of this ;-) Thanks Eric > > Thanks, > Shameer > >> Thanks, >> Jean > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-04 10:23 ` Auger Eric @ 2021-01-14 16:58 ` Auger Eric 2021-01-14 17:09 ` Shameerali Kolothum Thodi 2021-01-14 17:33 ` Jean-Philippe Brucker 0 siblings, 2 replies; 14+ messages in thread From: Auger Eric @ 2021-01-14 16:58 UTC (permalink / raw) To: Shameerali Kolothum Thodi, Jean-Philippe Brucker Cc: Xieyingtai, wangxingang, kvm, maz, linux-kernel, iommu, vivek.gautam, alex.williamson, qubingbing, Zengtao (B), zhangfei.gao, robin.murphy, will, kvmarm, eric.auger.pro Hi Shameer, Jean-Philippe, On 12/4/20 11:23 AM, Auger Eric wrote: > Hi Shameer, Jean-Philippe, > > On 12/4/20 11:20 AM, Shameerali Kolothum Thodi wrote: >> Hi Jean, >> >>> -----Original Message----- >>> From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org] >>> Sent: 04 December 2020 09:54 >>> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com> >>> Cc: Auger Eric <eric.auger@redhat.com>; wangxingang >>> <wangxingang5@huawei.com>; Xieyingtai <xieyingtai@huawei.com>; >>> kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org; >>> iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; >>> vivek.gautam@arm.com; alex.williamson@redhat.com; >>> zhangfei.gao@linaro.org; robin.murphy@arm.com; >>> kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com; Zengtao (B) >>> <prime.zeng@hisilicon.com>; qubingbing <qubingbing@hisilicon.com> >>> Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with >>> unmanaged ASIDs >>> >>> Hi Shameer, >>> >>> On Thu, Dec 03, 2020 at 06:42:57PM +0000, Shameerali Kolothum Thodi wrote: >>>> Hi Jean/zhangfei, >>>> Is it possible to have a branch with minimum required SVA/UACCE related >>> patches >>>> that are already public and can be a "stable" candidate for future respin of >>> Eric's series? >>>> Please share your thoughts. >>> >>> By "stable" you mean a fixed branch with the latest SVA/UACCE patches >>> based on mainline? >> >> Yes. >> >> The uacce-devel branches from >>> https://github.com/Linaro/linux-kernel-uadk do provide this at the moment >>> (they track the latest sva/zip-devel branch >>> https://jpbrucker.net/git/linux/ which is roughly based on mainline.) As I plan to respin shortly, please could you confirm the best branch to rebase on still is that one (uacce-devel from the linux-kernel-uadk git repo). Is it up to date? Commits seem to be quite old there. Thanks Eric >> >> Thanks. >> >> Hi Eric, >> >> Could you please take a look at the above branches and see whether it make sense >> to rebase on top of either of those? >> >> From vSVA point of view, it will be less rebase hassle if we can do that. > > Sure. I will rebase on top of this ;-) > > Thanks > > Eric >> >> Thanks, >> Shameer >> >>> Thanks, >>> Jean >> > > _______________________________________________ > iommu mailing list > iommu@lists.linux-foundation.org > https://lists.linuxfoundation.org/mailman/listinfo/iommu > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* RE: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2021-01-14 16:58 ` Auger Eric @ 2021-01-14 17:09 ` Shameerali Kolothum Thodi 2021-01-14 17:33 ` Jean-Philippe Brucker 1 sibling, 0 replies; 14+ messages in thread From: Shameerali Kolothum Thodi @ 2021-01-14 17:09 UTC (permalink / raw) To: Auger Eric, Jean-Philippe Brucker Cc: Xieyingtai, wangxingang, kvm, maz, linux-kernel, iommu, vivek.gautam, alex.williamson, qubingbing, Zengtao (B), zhangfei.gao, robin.murphy, will, kvmarm, eric.auger.pro Hi Eric, > -----Original Message----- > From: Auger Eric [mailto:eric.auger@redhat.com] > Sent: 14 January 2021 16:58 > To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>; > Jean-Philippe Brucker <jean-philippe@linaro.org> > Cc: Xieyingtai <xieyingtai@huawei.com>; alex.williamson@redhat.com; > wangxingang <wangxingang5@huawei.com>; kvm@vger.kernel.org; > maz@kernel.org; linux-kernel@vger.kernel.org; vivek.gautam@arm.com; > iommu@lists.linux-foundation.org; qubingbing <qubingbing@hisilicon.com>; > Zengtao (B) <prime.zeng@hisilicon.com>; zhangfei.gao@linaro.org; > eric.auger.pro@gmail.com; will@kernel.org; kvmarm@lists.cs.columbia.edu; > robin.murphy@arm.com > Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with > unmanaged ASIDs > > Hi Shameer, Jean-Philippe, > > On 12/4/20 11:23 AM, Auger Eric wrote: > > Hi Shameer, Jean-Philippe, > > > > On 12/4/20 11:20 AM, Shameerali Kolothum Thodi wrote: > >> Hi Jean, > >> > >>> -----Original Message----- > >>> From: Jean-Philippe Brucker [mailto:jean-philippe@linaro.org] > >>> Sent: 04 December 2020 09:54 > >>> To: Shameerali Kolothum Thodi > <shameerali.kolothum.thodi@huawei.com> > >>> Cc: Auger Eric <eric.auger@redhat.com>; wangxingang > >>> <wangxingang5@huawei.com>; Xieyingtai <xieyingtai@huawei.com>; > >>> kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; > will@kernel.org; > >>> iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; > >>> vivek.gautam@arm.com; alex.williamson@redhat.com; > >>> zhangfei.gao@linaro.org; robin.murphy@arm.com; > >>> kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com; Zengtao (B) > >>> <prime.zeng@hisilicon.com>; qubingbing <qubingbing@hisilicon.com> > >>> Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation > with > >>> unmanaged ASIDs > >>> > >>> Hi Shameer, > >>> > >>> On Thu, Dec 03, 2020 at 06:42:57PM +0000, Shameerali Kolothum Thodi > wrote: > >>>> Hi Jean/zhangfei, > >>>> Is it possible to have a branch with minimum required SVA/UACCE related > >>> patches > >>>> that are already public and can be a "stable" candidate for future respin > of > >>> Eric's series? > >>>> Please share your thoughts. > >>> > >>> By "stable" you mean a fixed branch with the latest SVA/UACCE patches > >>> based on mainline? > >> > >> Yes. > >> > >> The uacce-devel branches from > >>> https://github.com/Linaro/linux-kernel-uadk do provide this at the moment > >>> (they track the latest sva/zip-devel branch > >>> https://jpbrucker.net/git/linux/ which is roughly based on mainline.) > As I plan to respin shortly, please could you confirm the best branch to > rebase on still is that one (uacce-devel from the linux-kernel-uadk git > repo). Is it up to date? Commits seem to be quite old there. I think it is the uacce-devel-5.11 branch, but will wait for Jean or Zhangfei to confirm. Thanks, Shameer > Thanks > > Eric > >> > >> Thanks. > >> > >> Hi Eric, > >> > >> Could you please take a look at the above branches and see whether it make > sense > >> to rebase on top of either of those? > >> > >> From vSVA point of view, it will be less rebase hassle if we can do that. > > > > Sure. I will rebase on top of this ;-) > > > > Thanks > > > > Eric > >> > >> Thanks, > >> Shameer > >> > >>> Thanks, > >>> Jean > >> > > > > _______________________________________________ > > iommu mailing list > > iommu@lists.linux-foundation.org > > https://lists.linuxfoundation.org/mailman/listinfo/iommu > > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2021-01-14 16:58 ` Auger Eric 2021-01-14 17:09 ` Shameerali Kolothum Thodi @ 2021-01-14 17:33 ` Jean-Philippe Brucker 2021-01-14 18:00 ` Auger Eric 1 sibling, 1 reply; 14+ messages in thread From: Jean-Philippe Brucker @ 2021-01-14 17:33 UTC (permalink / raw) To: Auger Eric Cc: Xieyingtai, wangxingang, kvm, maz, linux-kernel, vivek.gautam, alex.williamson, iommu, Zengtao (B), qubingbing, zhangfei.gao, robin.murphy, will, kvmarm, eric.auger.pro Hi Eric, On Thu, Jan 14, 2021 at 05:58:27PM +0100, Auger Eric wrote: > >> The uacce-devel branches from > >>> https://github.com/Linaro/linux-kernel-uadk do provide this at the moment > >>> (they track the latest sva/zip-devel branch > >>> https://jpbrucker.net/git/linux/ which is roughly based on mainline.) > As I plan to respin shortly, please could you confirm the best branch to > rebase on still is that one (uacce-devel from the linux-kernel-uadk git > repo). Is it up to date? Commits seem to be quite old there. Right I meant the uacce-devel-X branches. The uacce-devel-5.11 branch currently has the latest patches Thanks, Jean _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2021-01-14 17:33 ` Jean-Philippe Brucker @ 2021-01-14 18:00 ` Auger Eric 0 siblings, 0 replies; 14+ messages in thread From: Auger Eric @ 2021-01-14 18:00 UTC (permalink / raw) To: Jean-Philippe Brucker Cc: Xieyingtai, wangxingang, kvm, maz, linux-kernel, vivek.gautam, alex.williamson, iommu, Zengtao (B), qubingbing, zhangfei.gao, robin.murphy, will, kvmarm, eric.auger.pro Hi Jean, On 1/14/21 6:33 PM, Jean-Philippe Brucker wrote: > Hi Eric, > > On Thu, Jan 14, 2021 at 05:58:27PM +0100, Auger Eric wrote: >>>> The uacce-devel branches from >>>>> https://github.com/Linaro/linux-kernel-uadk do provide this at the moment >>>>> (they track the latest sva/zip-devel branch >>>>> https://jpbrucker.net/git/linux/ which is roughly based on mainline.) >> As I plan to respin shortly, please could you confirm the best branch to >> rebase on still is that one (uacce-devel from the linux-kernel-uadk git >> repo). Is it up to date? Commits seem to be quite old there. > > Right I meant the uacce-devel-X branches. The uacce-devel-5.11 branch > currently has the latest patches OK thanks! Eric > > Thanks, > Jean > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs 2020-12-03 18:42 ` Shameerali Kolothum Thodi 2020-12-04 9:53 ` Jean-Philippe Brucker @ 2021-02-15 13:17 ` Auger Eric 1 sibling, 0 replies; 14+ messages in thread From: Auger Eric @ 2021-02-15 13:17 UTC (permalink / raw) To: Shameerali Kolothum Thodi, wangxingang Cc: Xieyingtai, jean-philippe, alex.williamson, kvm, maz, joro, linux-kernel, vivek.gautam, iommu, qubingbing, Zengtao (B), zhangfei.gao, eric.auger.pro, will, kvmarm, robin.murphy Hi Shameer, On 12/3/20 7:42 PM, Shameerali Kolothum Thodi wrote: > Hi Eric, > >> -----Original Message----- >> From: kvmarm-bounces@lists.cs.columbia.edu >> [mailto:kvmarm-bounces@lists.cs.columbia.edu] On Behalf Of Auger Eric >> Sent: 01 December 2020 13:59 >> To: wangxingang <wangxingang5@huawei.com> >> Cc: Xieyingtai <xieyingtai@huawei.com>; jean-philippe@linaro.org; >> kvm@vger.kernel.org; maz@kernel.org; joro@8bytes.org; will@kernel.org; >> iommu@lists.linux-foundation.org; linux-kernel@vger.kernel.org; >> vivek.gautam@arm.com; alex.williamson@redhat.com; >> zhangfei.gao@linaro.org; robin.murphy@arm.com; >> kvmarm@lists.cs.columbia.edu; eric.auger.pro@gmail.com >> Subject: Re: [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with >> unmanaged ASIDs >> >> Hi Xingang, >> >> On 12/1/20 2:33 PM, Xingang Wang wrote: >>> Hi Eric >>> >>> On Wed, 18 Nov 2020 12:21:43, Eric Auger wrote: >>>> @@ -1710,7 +1710,11 @@ static void arm_smmu_tlb_inv_context(void >> *cookie) >>>> * insertion to guarantee those are observed before the TLBI. Do be >>>> * careful, 007. >>>> */ >>>> - if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >>>> + if (ext_asid >= 0) { /* guest stage 1 invalidation */ >>>> + cmd.opcode = CMDQ_OP_TLBI_NH_ASID; >>>> + cmd.tlbi.asid = ext_asid; >>>> + cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; >>>> + } else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { >>> >>> Found a problem here, the cmd for guest stage 1 invalidation is built, >>> but it is not delivered to smmu. >>> >> >> Thank you for the report. I will fix that soon. With that fixed, have >> you been able to run vSVA on top of the series. Do you need other stuff >> to be fixed at SMMU level? > > I am seeing another issue with this series. This is when you have the vSMMU > in non-strict mode(iommu.strict=0). Any network pass-through dev with iperf run > will be enough to reproduce the issue. It may randomly stop/hang. > > It looks like the .flush_iotlb_all from guest is not propagated down to the host > correctly. I have a temp hack to fix this in Qemu wherein CMDQ_OP_TLBI_NH_ASID > will result in a CACHE_INVALIDATE with IOMMU_INV_GRANU_PASID flag and archid > set. Thank you for the analysis. Indeed the NH_ASID was not properly handled as asid info was not passed down. I fixed domain invalidation and added asid based invalidation. Thanks Eric > > Please take a look and let me know. > > As I am going to respin soon, please let me >> know what is the best branch to rebase to alleviate your integration. > > Please find the latest kernel and Qemu branch with vSVA support added here, > > https://github.com/hisilicon/kernel-dev/tree/5.10-rc4-2stage-v13-vsva > https://github.com/hisilicon/qemu/tree/v5.2.0-rc1-2stage-rfcv7-vsva > > I have done some basic minimum vSVA tests on a HiSilicon D06 board with > a zip dev that supports STALL. All looks good so far apart from the issues > that have been already reported/discussed. > > The kernel branch is actually a rebase of sva/uacce related patches from a > Linaro branch here, > > https://github.com/Linaro/linux-kernel-uadk/tree/uacce-devel-5.10 > > I think going forward it will be good(if possible) to respin your series on top of > a sva branch with STALL/PRI support added. > > Hi Jean/zhangfei, > Is it possible to have a branch with minimum required SVA/UACCE related patches > that are already public and can be a "stable" candidate for future respin of Eric's series? > Please share your thoughts. > > Thanks, > Shameer > >> Best Regards >> >> Eric >> >> _______________________________________________ >> kvmarm mailing list >> kvmarm@lists.cs.columbia.edu >> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm > _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-02-15 13:17 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-12-01 12:54 [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs wangxingang -- strict thread matches above, loose matches on Subject: below -- 2020-11-18 11:21 [PATCH v13 00/15] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger 2020-11-18 11:21 ` [PATCH v13 07/15] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger 2020-12-01 13:33 ` Xingang Wang 2020-12-01 13:58 ` Auger Eric 2020-12-02 12:59 ` Wang Xingang 2020-12-03 18:42 ` Shameerali Kolothum Thodi 2020-12-04 9:53 ` Jean-Philippe Brucker 2020-12-04 10:20 ` Shameerali Kolothum Thodi 2020-12-04 10:23 ` Auger Eric 2021-01-14 16:58 ` Auger Eric 2021-01-14 17:09 ` Shameerali Kolothum Thodi 2021-01-14 17:33 ` Jean-Philippe Brucker 2021-01-14 18:00 ` Auger Eric 2021-02-15 13:17 ` Auger Eric
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