From: Rob Herring <robh@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
James Morse <james.morse@arm.com>,
Jeremy Linton <jeremy.linton@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Sudeep Holla <sudeep.holla@arm.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Len Brown <lenb@kernel.org>,
devicetree@vger.kernel.org, linux-acpi@vger.kernel.org
Subject: [PATCH 2/6] cacheinfo: Set cache 'id' based on DT data
Date: Thu, 16 Dec 2021 17:31:21 -0600 [thread overview]
Message-ID: <20211216233125.1130793-3-robh@kernel.org> (raw)
In-Reply-To: <20211216233125.1130793-1-robh@kernel.org>
Use the minimum CPU h/w id of the CPUs associated with the cache for the
cache 'id'. This will provide a stable id value for a given system. As
we need to check all possible CPUs, we can't use the shared_cpu_map
which is just online CPUs. There's not a cache to CPUs mapping in DT, so
we have to walk all CPU nodes and then walk cache levels.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
---
v2:
- Loop with for_each_possible_cpu instead of for_each_of_cpu_node as
we will need the logical cpu numbers.
---
drivers/base/cacheinfo.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 66d10bdb863b..21accddf8f5f 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -136,6 +136,36 @@ static bool cache_node_is_unified(struct cacheinfo *this_leaf,
return of_property_read_bool(np, "cache-unified");
}
+static void cache_of_set_id(struct cacheinfo *this_leaf, struct device_node *np)
+{
+ int cpu;
+ unsigned long min_id = ~0UL;
+
+ for_each_possible_cpu(cpu) {
+ u64 id;
+ struct device_node *cache_node, *cpu_node;
+
+ cache_node = cpu_node = of_get_cpu_node(cpu, NULL);
+ id = of_get_cpu_hwid(cpu_node, 0);
+ while ((cache_node = of_find_next_cache_node(cache_node))) {
+ if (cache_node == np) {
+ if (id < min_id) {
+ min_id = id;
+ of_node_put(cache_node);
+ break;
+ }
+ }
+ of_node_put(cache_node);
+ }
+ of_node_put(cpu_node);
+ }
+
+ if (min_id != ~0UL) {
+ this_leaf->id = min_id;
+ this_leaf->attributes |= CACHE_ID;
+ }
+}
+
static void cache_of_set_props(struct cacheinfo *this_leaf,
struct device_node *np)
{
@@ -151,6 +181,7 @@ static void cache_of_set_props(struct cacheinfo *this_leaf,
cache_get_line_size(this_leaf, np);
cache_nr_sets(this_leaf, np);
cache_associativity(this_leaf);
+ cache_of_set_id(this_leaf, np);
}
static int cache_setup_of_node(unsigned int cpu)
--
2.32.0
next prev parent reply other threads:[~2021-12-16 23:31 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-16 23:31 [PATCH 0/6] cacheinfo: CPU affinity and Devicetree 'id' support Rob Herring
2021-12-16 23:31 ` [PATCH 1/6] cacheinfo: Allow for >32-bit cache 'id' Rob Herring
2021-12-16 23:31 ` Rob Herring [this message]
2021-12-17 16:57 ` [PATCH 2/6] cacheinfo: Set cache 'id' based on DT data Robin Murphy
2021-12-17 18:14 ` Rob Herring
2021-12-17 19:03 ` Sudeep Holla
2021-12-17 19:08 ` Sudeep Holla
2021-12-17 19:26 ` Rob Herring
2021-12-17 20:28 ` Jeremy Linton
2021-12-17 19:08 ` Robin Murphy
2021-12-17 19:35 ` Rob Herring
2021-12-17 20:22 ` Jeremy Linton
2021-12-17 21:13 ` Robin Murphy
2021-12-16 23:31 ` [PATCH 3/6] cacheinfo: Add cpu_affinity_map to store affinity for all CPUs Rob Herring
2021-12-16 23:31 ` [PATCH 4/6] ACPI / PPTT: Populate the cacheinfo.cpu_affinity_map Rob Herring
2021-12-16 23:31 ` [PATCH 5/6] cacheinfo: Use cpu_affinity_map for populating shared_cpu_map Rob Herring
2021-12-16 23:31 ` [PATCH 6/6] cacheinfo: Add cacheinfo_get_cache_affinity() function Rob Herring
2021-12-21 9:31 ` [PATCH 0/6] cacheinfo: CPU affinity and Devicetree 'id' support Greg Kroah-Hartman
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