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From: Andrew Lunn <andrew@lunn.ch>
To: Asmaa Mnebhi <asmaa@nvidia.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Andy Shevchenko <andy.shevchenko@gmail.com>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	netdev <netdev@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
	Jakub Kicinski <kuba@kernel.org>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	"David S. Miller" <davem@davemloft.net>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	David Thompson <davthompson@nvidia.com>
Subject: Re: [PATCH v3 1/2] gpio: mlxbf2: Introduce IRQ support
Date: Wed, 29 Sep 2021 22:24:46 +0200	[thread overview]
Message-ID: <YVTLjp1RSPGNZlUJ@lunn.ch> (raw)
In-Reply-To: <CH2PR12MB389530F4A65840FE04DC8628D7A89@CH2PR12MB3895.namprd12.prod.outlook.com>

> In KSZ9031, Register MII_KSZPHY_INTCS=0x1B reports all interrupt events and
> clear on read. So if there are 4 different interrupts, once it is read once, all 4 clear at once.
> The micrel.c driver has defined ack_interrupt to read the above reg and is called every time the
> interrupt handler phy_interrupt is called. So in this case, we should be good.
> The code flow in our case would look like this:
> - 2 interrupt sources (for example, link down followed by link up) set in MII_KSZPHY_INTCS
> - interrupt handler (phy_interrupt) reads MII_KSZPHY_INT which automatically clears both
> interrupts
> - another internal source triggers and sets the register.
> - The second edge will be caught accordingly by the GPIO.

I still think there is a small race window. You product manager needs
to decide if that is acceptable, or if you should poll the PHY.

Anyway, it is clear the hardware only does level interrupts, so the
GPIO driver should only accept level interrupts. -EINVAL otherwise.

I also assume you have a ACPI blob which indicates what sort of
interrupts that should be used, level low, falling edge etc. Since
that is outside of the kernel, i will never know what you decide to
put there. Ideally, until the hardware is fixed, you should not list
any interrupt and fallback to polling.

    Andrew

  reply	other threads:[~2021-09-29 20:24 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-23 20:22 [PATCH v3 0/2] gpio: mlxbf2: Introduce proper interrupt handling Asmaa Mnebhi
2021-09-23 20:22 ` [PATCH v3 1/2] gpio: mlxbf2: Introduce IRQ support Asmaa Mnebhi
2021-09-24 11:46   ` Andrew Lunn
2021-09-24 23:48     ` Linus Walleij
2021-09-27 14:04       ` Asmaa Mnebhi
2021-09-27 14:08         ` Andrew Lunn
2021-09-27 14:19           ` Asmaa Mnebhi
2021-09-27 14:26             ` Asmaa Mnebhi
2021-09-27 14:56             ` Andrew Lunn
2021-09-27 15:52               ` Asmaa Mnebhi
2021-09-27 19:10                 ` Andrew Lunn
2021-09-29 19:14                   ` Asmaa Mnebhi
2021-09-28 15:02               ` Asmaa Mnebhi
2021-09-29 20:24                 ` Andrew Lunn [this message]
2021-10-08 14:47                   ` Asmaa Mnebhi
2021-09-23 20:22 ` [PATCH v3 2/2] net: mellanox: mlxbf_gige: Replace non-standard interrupt handling Asmaa Mnebhi
  -- strict thread matches above, loose matches on Subject: below --
2021-09-23 20:18 [PATCH v3 0/2] gpio: mlxbf2: Introduce proper " Asmaa Mnebhi
2021-09-23 20:18 ` [PATCH v3 1/2] gpio: mlxbf2: Introduce IRQ support Asmaa Mnebhi

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