From: kbuild test robot <lkp@intel.com>
To: Jianxin Pan <jianxin.pan@amlogic.com>
Cc: Victor Wan <victor.wan@amlogic.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Qiufang Dai <qiufang.dai@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
linux-clk@vger.kernel.org, Jerome Brunet <jbrunet@baylibre.com>,
Rob Herring <robh@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Yixun Lan <yixun.lan@amlogic.com>,
Boris Brezillon <boris.brezillon@bootlin.com>,
linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Hanjie Lin <hanjie.lin@amlogic.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-kernel@vger.kernel.org, Liang Yang <liang.yang@amlogic.com>,
kbuild-all@01.org, Carlo Caione <carlo@caione.org>
Subject: Re: [PATCH RESEND v8 4/4] clk: meson: add sub MMC clock controller driver
Date: Tue, 1 Jan 2019 04:12:19 +0800 [thread overview]
Message-ID: <201901010407.XNjqkKul%fengguang.wu@intel.com> (raw)
In-Reply-To: <1545219642-9834-5-git-send-email-jianxin.pan@amlogic.com>
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Hi Yixun,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on next-20181224]
[cannot apply to v4.20]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Jianxin-Pan/clk-meson-add-a-sub-EMMC-clock-controller-support/20181222-060947
base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: i386-randconfig-s0-12301806 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/clk/meson/mmc-clkc.o: In function `mmc_clkc_register_mux':
>> drivers/clk/meson/mmc-clkc.c:182: undefined reference to `clk_regmap_mux_ops'
vim +182 drivers/clk/meson/mmc-clkc.c
158
159 static struct clk_regmap *mmc_clkc_register_mux(struct device *dev,
160 struct regmap *map)
161 {
162 const char *parent_names[MUX_CLK_NUM_PARENTS];
163 struct clk_init_data init;
164 struct clk_regmap *mux;
165 struct clk *clk;
166 int i;
167
168 for (i = 0; i < MUX_CLK_NUM_PARENTS; i++) {
169 char name[8];
170
171 snprintf(name, sizeof(name), "clkin%d", i);
172 clk = devm_clk_get(dev, name);
173 if (IS_ERR(clk)) {
174 if (clk != ERR_PTR(-EPROBE_DEFER))
175 dev_err(dev, "Missing clock %s\n", name);
176 return ERR_CAST(clk);
177 }
178
179 parent_names[i] = __clk_get_name(clk);
180 }
181
> 182 init.ops = &clk_regmap_mux_ops;
183 init.flags = CLK_SET_RATE_PARENT;
184 init.parent_names = parent_names;
185 init.num_parents = MUX_CLK_NUM_PARENTS;
186
187 mux = mmc_clkc_register_clk(dev, map, &init, "mux", &mmc_clkc_mux_data);
188 if (IS_ERR(mux))
189 dev_err(dev, "Mux clock registration failed\n");
190
191 return mux;
192 }
193
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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next prev parent reply other threads:[~2018-12-31 20:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-19 11:40 [PATCH RESEND v8 0/4] clk: meson: add a sub EMMC clock controller support Jianxin Pan
2018-12-19 11:40 ` [PATCH RESEND v8 1/4] clk: meson: add one based divider support for sclk divider Jianxin Pan
2018-12-19 11:40 ` [PATCH RESEND v8 2/4] clk: meson: add emmc sub clock phase delay driver Jianxin Pan
2018-12-19 11:40 ` [PATCH RESEND v8 3/4] clk: meson: add DT documentation for emmc clock controller Jianxin Pan
2018-12-19 11:40 ` [PATCH RESEND v8 4/4] clk: meson: add sub MMC clock controller driver Jianxin Pan
2018-12-31 20:12 ` kbuild test robot [this message]
2018-12-31 21:05 ` kbuild test robot
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