[PATCH 0/6] ARM: dts: meson: chip temperature (hwmon) support

[PATCH 0/6] ARM: dts: meson: chip temperature (hwmon) support

[Martin Blumenstingl]

Now that the Meson SAR ADC driver can get the chip temperature on
Meson8, Meson8b and Meson8m2 (see [0]) we can add the missing bits to
the .dts{,i} and enable iio-hwmon for all boards where this could be
tested successfully.

This was successfully tested on multiple boards:
- Meson8b Odroid-C1 (me)
- Meson8b EC-100 (me)
- Meson8m2 M8S (not upstream yet, me)
- Meson8m2 MXIII-Plus (an earlier version of this series, Oleg Ivanov)

compile-time dependencies:
- none
runtime dependencies:
- my other series "meson-saradc: temperature sensor support for
  Meson8b/Meson8m2" from [0]
- multi_v7_defconfig already enables CONFIG_SENSORS_IIO_HWMON, so
  there's no patch which selects that.


[0] https://patchwork.kernel.org/cover/10744059/


Martin Blumenstingl (6):
  ARM: dts: meson8m2: use the Meson8m2 specific SAR ADC compatible
  ARM: dts: meson8: add the temperature calibration data for the SAR ADC
  ARM: dts: meson8b: add the temperature calibration data for the SAR
    ADC
  ARM: dts: meson8b: ec100: add iio-hwmon for the chip temperature
  ARM: dts: meson8b: odroidc1: add iio-hwmon for the chip temperature
  ARM: dts: meson8m2: mxiii-plus: add iio-hwmon for the chip temperature

 arch/arm/boot/dts/meson8.dtsi             | 8 ++++++++
 arch/arm/boot/dts/meson8b-ec100.dts       | 5 +++++
 arch/arm/boot/dts/meson8b-odroidc1.dts    | 5 +++++
 arch/arm/boot/dts/meson8b.dtsi            | 8 ++++++++
 arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 5 +++++
 arch/arm/boot/dts/meson8m2.dtsi           | 4 ++++
 6 files changed, 35 insertions(+)

-- 
2.20.1


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[PATCH 1/6] ARM: dts: meson8m2: use the Meson8m2 specific SAR ADC compatible

[Martin Blumenstingl]

The SAR ADC on Meson8m2 is slightly different compared to Meson8. The
ADC functionality is identical but the calibration of the internal
thermal sensor is different.

Use the Meson8m2 specific compatible so the temperature sensor is
calibrated correctly on boards using the Meson8m2 SoC.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8m2.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi
index d1a28c2adac5..bb87b251e16d 100644
--- a/arch/arm/boot/dts/meson8m2.dtsi
+++ b/arch/arm/boot/dts/meson8m2.dtsi
@@ -50,6 +50,10 @@
 	};
 };
 
+&saradc {
+	compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc";
+};
+
 &wdt {
 	compatible = "amlogic,meson8m2-wdt", "amlogic,meson8b-wdt";
 };
-- 
2.20.1


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[PATCH 2/6] ARM: dts: meson8: add the temperature calibration data for the SAR ADC

[Martin Blumenstingl]

The SAR ADC can measure the chip temperature of the SoC. This only
works if the chip is calibrated and if the calibration data is written
to the correct registers. The calibration data is stored in the upper
two bytes of eFuse offset 0x1f4.

This adds the eFuse cell for the temperature calibration data and
passes it to the SAR ADC. We also need to pass the HHI sysctrl node to
the SAR ADC because the 4th TSC (temperature sensor calibration
coefficient) bit is stored in the HHI region (unlike bits [3:0] which
are stored directly inside the SAR ADC's register area).

On boards that have the SAR ADC enabled channel 8 can be used to
measure the chip temperature.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 83ed92dae892..5c6af73e4fc0 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -456,6 +456,11 @@
 	compatible = "amlogic,meson8-efuse";
 	clocks = <&clkc CLKID_EFUSE>;
 	clock-names = "core";
+
+	temperature_calib: calib@1f4 {
+		/* only the upper two bytes are relevant */
+		reg = <0x1f4 0x4>;
+	};
 };
 
 &ethmac {
@@ -535,6 +540,9 @@
 	clocks = <&clkc CLKID_XTAL>,
 		<&clkc CLKID_SAR_ADC>;
 	clock-names = "clkin", "core";
+	amlogic,hhi-sysctrl = <&hhi>;
+	nvmem-cells = <&temperature_calib>;
+	nvmem-cell-names = "temperature_calib";
 };
 
 &sdio {
-- 
2.20.1


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[PATCH 3/6] ARM: dts: meson8b: add the temperature calibration data for the SAR ADC

[Martin Blumenstingl]

The SAR ADC can measure the chip temperature of the SoC. This only
works if the chip is calibrated and if the calibration data is written
to the correct registers. The calibration data is stored in the upper
two bytes of eFuse offset 0x1f4.

This adds the eFuse cell for the temperature calibration data and
passes it to the SAR ADC. We also need to pass the HHI sysctrl node to
the SAR ADC because the 4th TSC (temperature sensor calibration
coefficient) bit is stored in the HHI region (unlike bits [3:0] which
are stored directly inside the SAR ADC's register area).

On boards that have the SAR ADC enabled channel 8 can be used to
measure the chip temperature.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8b.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 57c2a3678110..3bd68cf8f6c0 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -414,6 +414,11 @@
 	compatible = "amlogic,meson8b-efuse";
 	clocks = <&clkc CLKID_EFUSE>;
 	clock-names = "core";
+
+	temperature_calib: calib@1f4 {
+		/* only the upper two bytes are relevant */
+		reg = <0x1f4 0x4>;
+	};
 };
 
 &ethmac {
@@ -504,6 +509,9 @@
 	clocks = <&clkc CLKID_XTAL>,
 		<&clkc CLKID_SAR_ADC>;
 	clock-names = "clkin", "core";
+	amlogic,hhi-sysctrl = <&hhi>;
+	nvmem-cells = <&temperature_calib>;
+	nvmem-cell-names = "temperature_calib";
 };
 
 &sdio {
-- 
2.20.1


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[PATCH 4/6] ARM: dts: meson8b: ec100: add iio-hwmon for the chip temperature

[Martin Blumenstingl]

SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8b-ec100.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts
index d50fc2f60fa3..cba0006e2de0 100644
--- a/arch/arm/boot/dts/meson8b-ec100.dts
+++ b/arch/arm/boot/dts/meson8b-ec100.dts
@@ -64,6 +64,11 @@
 		timeout-ms = <20000>;
 	};
 
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&saradc 8>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
-- 
2.20.1


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[PATCH 5/6] ARM: dts: meson8b: odroidc1: add iio-hwmon for the chip temperature

[Martin Blumenstingl]

SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 0f0a46ddf3ff..8c83590810a8 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -118,6 +118,11 @@
 			  1800000 1>;
 	};
 
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&saradc 8>;
+	};
+
 	vcc_1v8: regulator-vcc-1v8 {
 		/*
 		 * RICHTEK RT9179 configured for a fixed output voltage of
-- 
2.20.1


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[PATCH 6/6] ARM: dts: meson8m2: mxiii-plus: add iio-hwmon for the chip temperature

[Martin Blumenstingl]

SAR ADC enabled channel 8 can be used to measure the chip temperature.
This can be made available to the hwmon subsystem by using iio-hwmon.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
index 6ac02beb5fa7..18528101376b 100644
--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
@@ -44,6 +44,11 @@
 		};
 	};
 
+	iio-hwmon {
+		compatible = "iio-hwmon";
+		io-channels = <&saradc 8>;
+	};
+
 	vcc_3v3: regulator-vcc3v3 {
 		compatible = "regulator-fixed";
 		regulator-name = "VCC3V3";
-- 
2.20.1


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Re: [PATCH 0/6] ARM: dts: meson: chip temperature (hwmon) support

[Kevin Hilman]

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> Now that the Meson SAR ADC driver can get the chip temperature on
> Meson8, Meson8b and Meson8m2 (see [0]) we can add the missing bits to
> the .dts{,i} and enable iio-hwmon for all boards where this could be
> tested successfully.
>
> This was successfully tested on multiple boards:
> - Meson8b Odroid-C1 (me)
> - Meson8b EC-100 (me)
> - Meson8m2 M8S (not upstream yet, me)
> - Meson8m2 MXIII-Plus (an earlier version of this series, Oleg Ivanov)
>
> compile-time dependencies:
> - none

This seems to depend on your HHI series, which I held off on last cycle
and you said you were planning to resend.  

Kevin

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Re: [PATCH 0/6] ARM: dts: meson: chip temperature (hwmon) support

[Martin Blumenstingl]

Hi Kevin,

On Thu, Jan 17, 2019 at 9:26 PM Kevin Hilman <khilman@baylibre.com> wrote:
>
> Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:
>
> > Now that the Meson SAR ADC driver can get the chip temperature on
> > Meson8, Meson8b and Meson8m2 (see [0]) we can add the missing bits to
> > the .dts{,i} and enable iio-hwmon for all boards where this could be
> > tested successfully.
> >
> > This was successfully tested on multiple boards:
> > - Meson8b Odroid-C1 (me)
> > - Meson8b EC-100 (me)
> > - Meson8m2 M8S (not upstream yet, me)
> > - Meson8m2 MXIII-Plus (an earlier version of this series, Oleg Ivanov)
> >
> > compile-time dependencies:
> > - none
>
> This seems to depend on your HHI series, which I held off on last cycle
> and you said you were planning to resend.
ouch, indeed

is it OK for you if I re-send this series with the HHI patch included
here - or do you want to have it separately?


Regards
Martin

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Re: [PATCH 0/6] ARM: dts: meson: chip temperature (hwmon) support

[Kevin Hilman]

Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:

> Hi Kevin,
>
> On Thu, Jan 17, 2019 at 9:26 PM Kevin Hilman <khilman@baylibre.com> wrote:
>>
>> Martin Blumenstingl <martin.blumenstingl@googlemail.com> writes:
>>
>> > Now that the Meson SAR ADC driver can get the chip temperature on
>> > Meson8, Meson8b and Meson8m2 (see [0]) we can add the missing bits to
>> > the .dts{,i} and enable iio-hwmon for all boards where this could be
>> > tested successfully.
>> >
>> > This was successfully tested on multiple boards:
>> > - Meson8b Odroid-C1 (me)
>> > - Meson8b EC-100 (me)
>> > - Meson8m2 M8S (not upstream yet, me)
>> > - Meson8m2 MXIII-Plus (an earlier version of this series, Oleg Ivanov)
>> >
>> > compile-time dependencies:
>> > - none
>>
>> This seems to depend on your HHI series, which I held off on last cycle
>> and you said you were planning to resend.
> ouch, indeed
>
> is it OK for you if I re-send this series with the HHI patch included
> here - or do you want to have it separately?

Feel free to include it.

Thanks,

Kevin


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