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* [PATCH RESEND] pinctrl: meson-gxl: fix GPIOX sdio pins
@ 2020-02-20 13:15 Nicolas Belin
  2020-02-21 15:28 ` Linus Walleij
  0 siblings, 1 reply; 2+ messages in thread
From: Nicolas Belin @ 2020-02-20 13:15 UTC (permalink / raw)
  To: linus.walleij
  Cc: khilman, linux-amlogic, linux-kernel, Nicolas Belin, linux-gpio

In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused
any issue so far because devices using these pins always take both pins
so the resulting configuration is OK.

Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions")
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Nicolas Belin <nbelin@baylibre.com>
---

Hi Linus,

Sorry for the the bad formatting of the first patch, this one should be fine.

Thanks

Nicolas

 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 1b6e8646700f..2ac921c83da9 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -147,8 +147,8 @@ static const unsigned int sdio_d0_pins[]	= { GPIOX_0 };
 static const unsigned int sdio_d1_pins[]	= { GPIOX_1 };
 static const unsigned int sdio_d2_pins[]	= { GPIOX_2 };
 static const unsigned int sdio_d3_pins[]	= { GPIOX_3 };
-static const unsigned int sdio_cmd_pins[]	= { GPIOX_4 };
-static const unsigned int sdio_clk_pins[]	= { GPIOX_5 };
+static const unsigned int sdio_clk_pins[]	= { GPIOX_4 };
+static const unsigned int sdio_cmd_pins[]	= { GPIOX_5 };
 static const unsigned int sdio_irq_pins[]	= { GPIOX_7 };
 
 static const unsigned int nand_ce0_pins[]	= { BOOT_8 };
-- 
2.7.4


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^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH RESEND] pinctrl: meson-gxl: fix GPIOX sdio pins
  2020-02-20 13:15 [PATCH RESEND] pinctrl: meson-gxl: fix GPIOX sdio pins Nicolas Belin
@ 2020-02-21 15:28 ` Linus Walleij
  0 siblings, 0 replies; 2+ messages in thread
From: Linus Walleij @ 2020-02-21 15:28 UTC (permalink / raw)
  To: Nicolas Belin
  Cc: Kevin Hilman, open list:ARM/Amlogic Meson...,
	linux-kernel, open list:GPIO SUBSYSTEM

On Thu, Feb 20, 2020 at 2:15 PM Nicolas Belin <nbelin@baylibre.com> wrote:

> In the gxl driver, the sdio cmd and clk pins are inverted. It has not caused
> any issue so far because devices using these pins always take both pins
> so the resulting configuration is OK.
>
> Fixes: 0f15f500ff2c ("pinctrl: meson: Add GXL pinctrl definitions")
> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
> Signed-off-by: Nicolas Belin <nbelin@baylibre.com>

Patch applied!

Yours,
Linus Walleij

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