From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Rob Herring <robh@kernel.org>, Hanjie Lin <hanjie.lin@amlogic.com>
Cc: devicetree@vger.kernel.org,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jianxin Pan <jianxin.pan@amlogic.com>,
linux-pci@vger.kernel.org, Kevin Hilman <khilman@baylibre.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Yixun Lan <yixun.lan@amlogic.com>,
linux-kernel@vger.kernel.org, Yue Wang <yue.wang@amlogic.com>,
Carlo Caione <carlo@caione.org>,
Qiufang Dai <qiufang.dai@amlogic.com>,
Jian Hu <jian.hu@amlogic.com>,
Philippe Ombredanne <pombredanne@nexb.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Cyrille Pitchen <cyrille.pitchen@free-electrons.com>,
linux-amlogic@lists.infradead.org,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Liang Yang <liang.yang@amlogic.com>,
linux-arm-kernel@lists.infradead.org,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v8 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller
Date: Wed, 19 Dec 2018 00:14:37 +0100 [thread overview]
Message-ID: <CAFBinCD1x7jcJJx78yNx87MOmKQ2HuSBeRpDRQE0hyNCwm1JAg@mail.gmail.com> (raw)
In-Reply-To: <1545120286-129258-2-git-send-email-hanjie.lin@amlogic.com>
Hi Rob, Hi Hanjie,
(sorry for being late with my question)
On Tue, Dec 18, 2018 at 9:05 AM Hanjie Lin <hanjie.lin@amlogic.com> wrote:
[...]
> +- reg-names: Must be
> + - "elbi" External local bus interface registers
> + - "cfg" Meson specific registers
> + - "phy" Meson PCIE PHY registers
I have learned that there are two PHY register designs:
- AXG only has a PCIe PHY
- G12A has a PHY which supports PCIe and USB 3.0. The PCIe part of
this PHY design is compatible with AXG, but this design also supports
a USB 3.0 port (it's an exclusive choice: either PCIe *or* USB 3.0)
The PCIe controller itself is identical on both, AXG and G12A.
This patch adds support for the AXG PCIe controller and PHY within one
device-tree node.
For G12A I propose to add a separate "phys" property with a phandle to
the "combo" PCIe and USB3.0 PHY - this can be part of a separate patch
though.
I would like to know whether it's OK that for AXG the PCIe PHY is
described in the same device-tree node as the PCIe controller (in
other words: we're not using a "phys" property here)?
Kind Regards
Martin
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next prev parent reply other threads:[~2018-12-18 23:15 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-18 8:04 [PATCH v8 0/2 RESEND] add the Amlogic Meson PCIe controller driver Hanjie Lin
2018-12-18 8:04 ` [PATCH v8 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller Hanjie Lin
2018-12-18 23:14 ` Martin Blumenstingl [this message]
2018-12-19 10:57 ` Hanjie Lin
2018-12-18 8:04 ` [PATCH v8 2/2] PCI: amlogic: Add the Amlogic Meson PCIe controller driver Hanjie Lin
2018-12-18 22:47 ` Bjorn Helgaas
2018-12-19 11:13 ` Hanjie Lin
2018-12-19 15:13 ` Lorenzo Pieralisi
-- strict thread matches above, loose matches on Subject: below --
2018-12-18 7:56 [PATCH v7 0/2] add " Hanjie Lin
2018-12-18 7:56 ` [PATCH v8 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller Hanjie Lin
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