[PATCH V2 0/2] Power: meson-s4: add s4 power domain driver

[PATCH V2 0/2] Power: meson-s4: add s4 power domain driver

[Shunzhou.Jiang]

From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>

This patchset adds Power controller driver support for Meson-S4 SoC
Likes Meson-A1, the power domains register only can access in secure world

Shunzhou Jiang (2):
  dt-bindings: power: add Amlogic s4 power domains bindings
  soc: s4: Add support for power domains controller

 .../power/amlogic,meson-sec-pwrc.yaml         |  3 ++-
 drivers/soc/amlogic/meson-secure-pwrc.c       | 21 +++++++++++++++++++
 include/dt-bindings/power/meson-s4-power.h    | 19 +++++++++++++++++
 3 files changed, 42 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/power/meson-s4-power.h


base-commit: 3448a018ded03ccd4093d6675f4a39eb2d1a18ef
-- 
2.34.1


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[PATCH V2 1/2] dt-bindings: power: add Amlogic s4 power domains bindings

[Shunzhou.Jiang]

From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>

Add the bindings for the Amlogic Secure power domains, controlling the
secure power domains.

The bindings targets the Amlogic s4, in which the power domains registers
are in secure world.

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
---
V1->V2: fix spelling error, patchset use cover-letter
Link: https://lore.kernel.org/all/20211224071706.2505726-1-shunzhou.jiang@amlogic.com/
---
 .../power/amlogic,meson-sec-pwrc.yaml         |  3 ++-
 include/dt-bindings/power/meson-s4-power.h    | 19 +++++++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/power/meson-s4-power.h

diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
index 5dae04d2936c..7657721a4e96 100644
--- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
+++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
@@ -12,13 +12,14 @@ maintainers:
   - Jianxin Pan <jianxin.pan@amlogic.com>
 
 description: |+
-  Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node
+  Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node
   of secure-monitor.
 
 properties:
   compatible:
     enum:
       - amlogic,meson-a1-pwrc
+      - amlogic,meson-s4-pwrc
 
   "#power-domain-cells":
     const: 1
diff --git a/include/dt-bindings/power/meson-s4-power.h b/include/dt-bindings/power/meson-s4-power.h
new file mode 100644
index 000000000000..462dd2cb938b
--- /dev/null
+++ b/include/dt-bindings/power/meson-s4-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2021 Amlogic, Inc.
+ * Author: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
+ */
+
+#ifndef _DT_BINDINGS_MESON_S4_POWER_H
+#define _DT_BINDINGS_MESON_S4_POWER_H
+
+#define PWRC_S4_DOS_HEVC_ID	0
+#define PWRC_S4_DOS_VDEC_ID	1
+#define PWRC_S4_VPU_HDMI_ID	2
+#define PWRC_S4_USB_COMB_ID	3
+#define PWRC_S4_GE2D_ID		4
+#define PWRC_S4_ETH_ID		5
+#define PWRC_S4_DEMOD_ID	6
+#define PWRC_S4_AUDIO_ID	7
+
+#endif
-- 
2.34.1


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[PATCH V2 2/2] soc: s4: Add support for power domains controller

[Shunzhou.Jiang]

From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>

Add support s4 Power controller. In s4, power control
registers are in secure domain, and should be accessed by smc.

Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
---
V1->V2: fix spelling error, patchset use cover-letter
Link: https://lore.kernel.org/all/20211224072207.2521367-1-shunzhou.jiang@amlogic.com/
---
 drivers/soc/amlogic/meson-secure-pwrc.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
index 59bd195fa9c9..8fee01aabab6 100644
--- a/drivers/soc/amlogic/meson-secure-pwrc.c
+++ b/drivers/soc/amlogic/meson-secure-pwrc.c
@@ -11,6 +11,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
 #include <dt-bindings/power/meson-a1-power.h>
+#include <dt-bindings/power/meson-s4-power.h>
 #include <linux/arm-smccc.h>
 #include <linux/firmware/meson/meson_sm.h>
 #include <linux/module.h>
@@ -119,6 +120,17 @@ static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
 	SEC_PD(RSA,	0),
 };
 
+static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
+	SEC_PD(S4_DOS_HEVC,	0),
+	SEC_PD(S4_DOS_VDEC,	0),
+	SEC_PD(S4_VPU_HDMI,	GENPD_FLAG_ALWAYS_ON),
+	SEC_PD(S4_USB_COMB,	GENPD_FLAG_ALWAYS_ON),
+	SEC_PD(S4_GE2D,		0),
+	SEC_PD(S4_ETH,		GENPD_FLAG_ALWAYS_ON),
+	SEC_PD(S4_DEMOD,	0),
+	SEC_PD(S4_AUDIO,	0),
+};
+
 static int meson_secure_pwrc_probe(struct platform_device *pdev)
 {
 	int i;
@@ -187,11 +199,20 @@ static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
 	.count = ARRAY_SIZE(a1_pwrc_domains),
 };
 
+static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
+	.domains = s4_pwrc_domains,
+	.count = ARRAY_SIZE(s4_pwrc_domains),
+};
+
 static const struct of_device_id meson_secure_pwrc_match_table[] = {
 	{
 		.compatible = "amlogic,meson-a1-pwrc",
 		.data = &meson_secure_a1_pwrc_data,
 	},
+	{
+		.compatible = "amlogic,meson-s4-pwrc",
+		.data = &meson_secure_s4_pwrc_data,
+	},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
-- 
2.34.1


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Re: [PATCH V2 1/2] dt-bindings: power: add Amlogic s4 power domains bindings

[Martin Blumenstingl]

On Thu, Dec 30, 2021 at 10:44 AM Shunzhou.Jiang
<shunzhou.jiang@amlogic.com> wrote:
>
> From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>
> Add the bindings for the Amlogic Secure power domains, controlling the
> secure power domains.
>
> The bindings targets the Amlogic s4, in which the power domains registers
> are in secure world.
>
> Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

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Re: [PATCH V2 2/2] soc: s4: Add support for power domains controller

[Martin Blumenstingl]

On Thu, Dec 30, 2021 at 10:44 AM Shunzhou.Jiang
<shunzhou.jiang@amlogic.com> wrote:
>
> From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>
> Add support s4 Power controller. In s4, power control
> registers are in secure domain, and should be accessed by smc.
>
> Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
Also here I don't have any datasheet to compare this with, so this gets my:
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

[...]
> +       SEC_PD(S4_VPU_HDMI,     GENPD_FLAG_ALWAYS_ON),
> +       SEC_PD(S4_USB_COMB,     GENPD_FLAG_ALWAYS_ON),
> +       SEC_PD(S4_GE2D,         0),
> +       SEC_PD(S4_ETH,          GENPD_FLAG_ALWAYS_ON),
For the A1 SoC's UART entry we have the following comment which
explains why we want to to be "always on":
  UART should keep working in ATF after suspend and before resume

If for some reason you need to re-send this series then it would be
great if you could add a comment above each entry with
GENPD_FLAG_ALWAYS_ON.
It will help others (like me) understand these SoCs better.


Best regards,
Martin

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Re: [PATCH V2 2/2] soc: s4: Add support for power domains controller

[Neil Armstrong]

Hi Shunzhou,

On 30/12/2021 23:15, Martin Blumenstingl wrote:
> On Thu, Dec 30, 2021 at 10:44 AM Shunzhou.Jiang
> <shunzhou.jiang@amlogic.com> wrote:
>>
>> From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>>
>> Add support s4 Power controller. In s4, power control
>> registers are in secure domain, and should be accessed by smc.
>>
>> Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
> Also here I don't have any datasheet to compare this with, so this gets my:
> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> 
> [...]
>> +       SEC_PD(S4_VPU_HDMI,     GENPD_FLAG_ALWAYS_ON),
>> +       SEC_PD(S4_USB_COMB,     GENPD_FLAG_ALWAYS_ON),
>> +       SEC_PD(S4_GE2D,         0),
>> +       SEC_PD(S4_ETH,          GENPD_FLAG_ALWAYS_ON),
> For the A1 SoC's UART entry we have the following comment which
> explains why we want to to be "always on":
>   UART should keep working in ATF after suspend and before resume
> 
> If for some reason you need to re-send this series then it would be
> great if you could add a comment above each entry with
> GENPD_FLAG_ALWAYS_ON.
> It will help others (like me) understand these SoCs better.

Can you resend with those comments added so I can apply the patches ?

Thanks,
Neil

> 
> 
> Best regards,
> Martin
> 


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Re: [PATCH V2 2/2] soc: s4: Add support for power domains controller

[Neil Armstrong]

Hi Shunzhou,

On 18/01/2022 03:26, shunzhou.jiang@amlogic.com wrote:
> Dears Neil & Martin:
> Sorry for my late reply
> S4_VPU_HDMI:  for vpu domain,  this domain provide power to many moudles(osd, vpp, hdr, dv, di), if close, will cause system crash
> S4_USB_COMB domain: for usb, if not always on,  all usb status will clear to 0, that's not right status for usb
> S4_ETH: for ethernet online wakeup, and if power down, status also not right
>>> +       SEC_PD(S4_VPU_HDMI,     GENPD_FLAG_ALWAYS_ON),
>>> +       SEC_PD(S4_USB_COMB,     GENPD_FLAG_ALWAYS_ON),
>>> +       SEC_PD(S4_GE2D,         0),
>>> +       SEC_PD(S4_ETH,          GENPD_FLAG_ALWAYS_ON),

Thanks for clarifications, can you resend the patchset with those infos in comments like it was done for A1 ?

Thanks,
Neil

> 
> ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
> Shunzhou Jiang
> SW Department
> 
>      
>     *From:* Neil Armstrong <mailto:narmstrong@baylibre.com>
>     *Date:* 2022-01-12 16:36
>     *To:* Martin Blumenstingl <mailto:martin.blumenstingl@googlemail.com>; Shunzhou.Jiang <mailto:shunzhou.jiang@amlogic.com>
>     *CC:* devicetree <mailto:devicetree@vger.kernel.org>; linux-arm-kernel <mailto:linux-arm-kernel@lists.infradead.org>; linux-amlogic <mailto:linux-amlogic@lists.infradead.org>; linux-kernel <mailto:linux-kernel@vger.kernel.org>; khilman <mailto:khilman@baylibre.com>; jbrunet <mailto:jbrunet@baylibre.com>
>     *Subject:* Re: [PATCH V2 2/2] soc: s4: Add support for power domains controller
>     [ EXTERNAL EMAIL ]
>      
>     Hi Shunzhou,
>      
>     On 30/12/2021 23:15, Martin Blumenstingl wrote:
>     > On Thu, Dec 30, 2021 at 10:44 AM Shunzhou.Jiang
>     > <shunzhou.jiang@amlogic.com> wrote:
>     >>
>     >> From: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>     >>
>     >> Add support s4 Power controller. In s4, power control
>     >> registers are in secure domain, and should be accessed by smc.
>     >>
>     >> Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>
>     > Also here I don't have any datasheet to compare this with, so this gets my:
>     > Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>     >
>     > [...]
>     >> +       SEC_PD(S4_VPU_HDMI,     GENPD_FLAG_ALWAYS_ON),
>     >> +       SEC_PD(S4_USB_COMB,     GENPD_FLAG_ALWAYS_ON),
>     >> +       SEC_PD(S4_GE2D,         0),
>     >> +       SEC_PD(S4_ETH,          GENPD_FLAG_ALWAYS_ON),
>     > For the A1 SoC's UART entry we have the following comment which
>     > explains why we want to to be "always on":
>     >   UART should keep working in ATF after suspend and before resume
>     >
>     > If for some reason you need to re-send this series then it would be
>     > great if you could add a comment above each entry with
>     > GENPD_FLAG_ALWAYS_ON.
>     > It will help others (like me) understand these SoCs better.
>      
>     Can you resend with those comments added so I can apply the patches ?
>      
>     Thanks,
>     Neil
>      
>     >
>     >
>     > Best regards,
>     > Martin
>     >
>      
> 

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