From: Christopher Lameter <cl@linux.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
"Paul E . McKenney" <paulmck@linux.vnet.ibm.com>,
Boqun Feng <boqun.feng@gmail.com>,
Andy Lutomirski <luto@amacapital.net>,
Dave Watson <davejwatson@fb.com>,
linux-kernel@vger.kernel.org, linux-api@vger.kernel.org,
Paul Turner <pjt@google.com>,
Andrew Morton <akpm@linux-foundation.org>,
Russell King <linux@arm.linux.org.uk>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H . Peter Anvin" <hpa@zytor.com>,
Andrew Hunter <ahh@google.com>, Andi Kleen <andi@firstfloor.org>,
Ben Maurer <bmaurer@fb.com>, Steven Rostedt <rostedt@goodmis.org>,
Josh Triplett <josh@joshtriplett.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Subject: Re: [RFC PATCH for 4.16 02/21] rseq: Introduce restartable sequences system call (v12)
Date: Thu, 14 Dec 2017 10:44:34 -0600 (CST) [thread overview]
Message-ID: <alpine.DEB.2.20.1712141033100.6249@nuc-kabylake> (raw)
In-Reply-To: <20171214161403.30643-3-mathieu.desnoyers@efficios.com>
On Thu, 14 Dec 2017, Mathieu Desnoyers wrote:
> On x86, yet another possible approach would be to use the gs segment
> selector to point to user-space per-cpu data. This approach performs
> similarly to the cpu id cache, but it has two disadvantages: it is
> not portable, and it is incompatible with existing applications already
> using the gs segment selector for other purposes.
I think the proper way to think about gs and fs on x86 is as base
registers. They are essentially values in registers added to the address
generated in an instruction. As such the approach is transferable to other
processor architecture. Many support base register and base register
relative processing. If a processor can do RMV instructions base register
relative then you have something similar.
In a restartable sequence you could increase efficieny by avoiding full
atomic instructions. This would be similar to the lockless RMV available
on x86 then. And in that form it is portable.
A context switch to another processors would mean that the value of the
base register has changed and that we therefore are accessing another per
cpu segment. Restarting the sequence will yield a correct result without
any reloading of registers.
next prev parent reply other threads:[~2017-12-14 16:44 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-14 16:13 [RFC PATCH for 4.16 00/21] Restartable sequences and CPU op vector Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 01/21] uapi headers: Provide types_32_64.h Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 02/21] rseq: Introduce restartable sequences system call (v12) Mathieu Desnoyers
2017-12-14 16:44 ` Christopher Lameter [this message]
2017-12-14 18:12 ` Mathieu Desnoyers
[not found] ` <12046460.34426.1513275177081.JavaMail.zimbra-vg+e7yoeK/dWk0Htik3J/w@public.gmane.org>
2017-12-14 18:50 ` Christopher Lameter
2017-12-14 19:24 ` Mathieu Desnoyers
2017-12-14 21:14 ` Christopher Lameter
2017-12-14 21:20 ` Peter Zijlstra
2017-12-15 15:05 ` Christopher Lameter
2017-12-15 16:52 ` Mathieu Desnoyers
[not found] ` <729438855.35910.1513356742518.JavaMail.zimbra-vg+e7yoeK/dWk0Htik3J/w@public.gmane.org>
2017-12-15 17:13 ` Christopher Lameter
2017-12-14 19:48 ` Peter Zijlstra
2017-12-14 19:57 ` Mathieu Desnoyers
[not found] ` <1772818221.34575.1513281428902.JavaMail.zimbra-vg+e7yoeK/dWk0Htik3J/w@public.gmane.org>
2017-12-14 20:09 ` Peter Zijlstra
2017-12-14 16:13 ` [RFC PATCH for 4.16 03/21] arm: Add restartable sequences support Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 04/21] arm: Wire up restartable sequences system call Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 05/21] x86: Add support for restartable sequences Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 06/21] x86: Wire up restartable sequence system call Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 08/21] powerpc: Wire up restartable sequences " Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 09/21] sched: Implement push_task_to_cpu Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 10/21] cpu_opv: Provide cpu_opv system call (v5) Mathieu Desnoyers
[not found] ` <20171214161403.30643-11-mathieu.desnoyers-vg+e7yoeK/dWk0Htik3J/w@public.gmane.org>
2018-02-12 15:49 ` Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 11/21] x86: Wire up cpu_opv system call Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 12/21] powerpc: " Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 14/21] selftests: lib.mk: Introduce OVERRIDE_TARGETS Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 15/21] cpu_opv: selftests: Implement selftests (v6) Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 16/21] rseq: selftests: Provide rseq library (v5) Mathieu Desnoyers
[not found] ` <20171214161403.30643-1-mathieu.desnoyers-vg+e7yoeK/dWk0Htik3J/w@public.gmane.org>
2017-12-14 16:13 ` [RFC PATCH for 4.16 07/21] powerpc: Add support for restartable sequences Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 13/21] arm: Wire up cpu_opv system call Mathieu Desnoyers
2017-12-14 16:13 ` [RFC PATCH for 4.16 17/21] rseq: selftests: Provide percpu_op API Mathieu Desnoyers
2017-12-14 16:14 ` [RFC PATCH for 4.16 18/21] rseq: selftests: Provide basic test Mathieu Desnoyers
2017-12-14 16:14 ` [RFC PATCH for 4.16 19/21] rseq: selftests: Provide basic percpu ops test Mathieu Desnoyers
2017-12-14 16:14 ` [RFC PATCH for 4.16 20/21] rseq: selftests: Provide parametrized tests Mathieu Desnoyers
2017-12-14 16:14 ` [RFC PATCH for 4.16 21/21] rseq: selftests: Provide Makefile, scripts, gitignore Mathieu Desnoyers
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