From: Yu-cheng Yu <yu-cheng.yu@intel.com>
To: Eugene Syromiatnikov <esyr@redhat.com>,
Andy Lutomirski <luto@amacapital.net>
Cc: X86 ML <x86@kernel.org>, "H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
LKML <linux-kernel@vger.kernel.org>,
"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
Linux-MM <linux-mm@kvack.org>,
linux-arch <linux-arch@vger.kernel.org>,
Linux API <linux-api@vger.kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Balbir Singh <bsingharora@gmail.com>,
Cyrill Gorcunov <gorcunov@gmail.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
Florian Weimer <fweimer@redhat.com>,
"H. J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>,
Jonathan Corbet <corbet@lwn.net>,
Kees Cook <keescook@chromium.org>,
Mike Kravetz <mike.kravetz@oracle.com>,
Nadav Amit <nadav.amit@gmail.com>,
Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>,
Peter Zijlstra <peterz@infradead.org>,
Randy Dunlap <rdunlap@infradead.org>,
"Shankar, Ravi V" <ravi.v.shankar@intel.com>,
"Shanbhogue, Vedvyas" <vedvyas.shanbhogue@intel.com>
Subject: Re: [RFC PATCH v4 3/9] x86/cet/ibt: Add IBT legacy code bitmap allocation function
Date: Wed, 10 Oct 2018 08:56:03 -0700 [thread overview]
Message-ID: <f6dcfb3c548f49cd096088e4366e44f57ec5964e.camel@intel.com> (raw)
Message-ID: <20181010155603.Tt2_RoeeDlayejTKwXBIQV8MjDcm38ZKFrJDnejrwkM@z> (raw)
In-Reply-To: <20181005172622.GD19360@asgard.redhat.com>
On Fri, 2018-10-05 at 10:26 -0700, Eugene Syromiatnikov wrote:
> On Fri, Oct 05, 2018 at 10:07:46AM -0700, Andy Lutomirski wrote:
> > On Fri, Oct 5, 2018 at 10:03 AM Yu-cheng Yu <yu-cheng.yu@intel.com> wrote:
> > >
> > > On Fri, 2018-10-05 at 09:28 -0700, Andy Lutomirski wrote:
> > > > > On Oct 5, 2018, at 9:13 AM, Yu-cheng Yu <yu-cheng.yu@intel.com> wrote:
> > > > >
> > > > > > On Wed, 2018-10-03 at 21:57 +0200, Eugene Syromiatnikov wrote:
> > > > > > > On Fri, Sep 21, 2018 at 08:05:47AM -0700, Yu-cheng Yu wrote:
> > > > > > > Indirect branch tracking provides an optional legacy code bitmap
> > > > > > > that indicates locations of non-IBT compatible code. When set,
> > > > > > > each bit in the bitmap represents a page in the linear address is
> > > > > > > legacy code.
> > > > > > >
> > > > > > > We allocate the bitmap only when the application requests it.
> > > > > > > Most applications do not need the bitmap.
> > > > > > >
> > > > > > > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
> > > > > > > ---
> > > > > > > arch/x86/kernel/cet.c | 45
> > > > > > > +++++++++++++++++++++++++++++++++++++++++++
> > > > > > > 1 file changed, 45 insertions(+)
> > > > > > >
> > > > > > > diff --git a/arch/x86/kernel/cet.c b/arch/x86/kernel/cet.c
> > > > > > > index 6adfe795d692..a65d9745af08 100644
> > > > > > > --- a/arch/x86/kernel/cet.c
> > > > > > > +++ b/arch/x86/kernel/cet.c
> > > > > > > @@ -314,3 +314,48 @@ void cet_disable_ibt(void)
> > > > > > > wrmsrl(MSR_IA32_U_CET, r);
> > > > > > > current->thread.cet.ibt_enabled = 0;
> > > > > > > }
> > > > > > > +
> > > > > > > +int cet_setup_ibt_bitmap(void)
> > > > > > > +{
> > > > > > > + u64 r;
> > > > > > > + unsigned long bitmap;
> > > > > > > + unsigned long size;
> > > > > > > +
> > > > > > > + if (!cpu_feature_enabled(X86_FEATURE_IBT))
> > > > > > > + return -EOPNOTSUPP;
> > > > > > > +
> > > > > > > + if (!current->thread.cet.ibt_bitmap_addr) {
> > > > > > > + /*
> > > > > > > + * Calculate size and put in thread header.
> > > > > > > + * may_expand_vm() needs this information.
> > > > > > > + */
> > > > > > > + size = TASK_SIZE / PAGE_SIZE / BITS_PER_BYTE;
> > > > > >
> > > > > > TASK_SIZE_MAX is likely needed here, as an application can easily
> > > > > > switch
> > > > > > between long an 32-bit protected mode. And then the case of a CPU
> > > > > > that
> > > > > > doesn't support 5LPT.
> > > > >
> > > > > If we had calculated bitmap size from TASK_SIZE_MAX, all 32-bit apps
> > > > > would
> > > > > have
> > > > > failed the allocation for bitmap size > TASK_SIZE. Please see values
> > > > > below,
> > > > > which is printed from the current code.
> > > > >
> > > > > Yu-cheng
> > > > >
> > > > >
> > > > > x64:
> > > > > TASK_SIZE_MAX = 0000 7fff ffff f000
> > > > > TASK_SIZE = 0000 7fff ffff f000
> > > > > bitmap size = 0000 0000 ffff ffff
> > > > >
> > > > > x32:
> > > > > TASK_SIZE_MAX = 0000 7fff ffff f000
> > > > > TASK_SIZE = 0000 0000 ffff e000
> > > > > bitmap size = 0000 0000 0001 ffff
> > > > >
> > > >
> > > > I haven’t followed all the details here, but I have a general policy of
> > > > objecting to any new use of TASK_SIZE. If you really really need to
> > > > depend on
> > > > 32-bitness in new code, please figure out what exactly you mean by “32-
> > > > bit”
> > > > and use an explicit check.
> > >
> > > The explicit check would be:
> > >
> > > test_thread_flag(TIF_ADDR32) ? IA32_PAGE_OFFSET : TASK_SIZE_MAX
> > >
> > > which is the same as TASK_SIZE.
> >
> > But this is only ever done in response to a syscall, right? So
> > wouldn't in_compat_syscall() be the right check?
> >
> > Also, this whole thing makes me extremely nervous. The MSR only
> > contains the start address, not the size, right? So what prevents
> > some goof from causing the CPU to read way past the end of the bitmap
> > if the bitmap is short because the kernel thought it was supposed to
> > be 32-bit?
>
> That's what I've mentioned initially: every syscall made with int 0x80
> is interpreted as compat, even if it was made from long mode.
>
> > I'm inclined to suggest something awful-ish: always allocate the
> > bitmap as though it's for a 64-bit process, and just let it be at a
> > high address. And add a syscall or arch_prctl() to manipulate it for
> > the benefit of 32-bit programs that can't address it directly.
>
> That's likely the only way to go.
This bitmap is needed only when the app does dlopen() a non-IBT .so file. Most
applications do not need it. Can't we let dlopen mmap() the bitmap when needed
and pass it to the kernel?
Yu-cheng
next prev parent reply other threads:[~2018-10-10 23:24 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-21 15:05 [RFC PATCH v4 0/9] Control Flow Enforcement: Branch Tracking, PTRACE Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-09-21 15:05 ` [RFC PATCH v4 1/9] x86/cet/ibt: Add Kconfig option for user-mode Indirect Branch Tracking Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-09-21 15:05 ` [RFC PATCH v4 2/9] x86/cet/ibt: User-mode indirect branch tracking support Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-10-03 18:58 ` Eugene Syromiatnikov
2018-10-03 18:58 ` Eugene Syromiatnikov
2018-09-21 15:05 ` [RFC PATCH v4 3/9] x86/cet/ibt: Add IBT legacy code bitmap allocation function Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-10-03 19:57 ` Eugene Syromiatnikov
2018-10-03 19:57 ` Eugene Syromiatnikov
2018-10-05 16:13 ` Yu-cheng Yu
2018-10-05 16:13 ` Yu-cheng Yu
2018-10-05 16:28 ` Andy Lutomirski
2018-10-05 16:28 ` Andy Lutomirski
2018-10-05 16:58 ` Yu-cheng Yu
2018-10-05 16:58 ` Yu-cheng Yu
2018-10-05 17:07 ` Andy Lutomirski
2018-10-05 17:07 ` Andy Lutomirski
2018-10-05 17:26 ` Eugene Syromiatnikov
2018-10-05 17:26 ` Eugene Syromiatnikov
2018-10-10 15:56 ` Yu-cheng Yu [this message]
2018-10-10 15:56 ` Yu-cheng Yu
2018-10-04 16:11 ` Andy Lutomirski
2018-10-04 16:11 ` Andy Lutomirski
2018-09-21 15:05 ` [RFC PATCH v4 4/9] mm/mmap: Add IBT bitmap size to address space limit check Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-10-03 20:21 ` Eugene Syromiatnikov
2018-10-03 20:21 ` Eugene Syromiatnikov
2018-09-21 15:05 ` [RFC PATCH v4 5/9] x86/cet/ibt: ELF header parsing for IBT Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-09-21 15:05 ` [RFC PATCH v4 6/9] x86/cet/ibt: Add arch_prctl functions " Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-10-04 13:28 ` Eugene Syromiatnikov
2018-10-04 13:28 ` Eugene Syromiatnikov
2018-10-04 15:37 ` Yu-cheng Yu
2018-10-04 15:37 ` Yu-cheng Yu
2018-10-04 16:07 ` Florian Weimer
2018-10-04 16:07 ` Florian Weimer
2018-10-04 16:12 ` Andy Lutomirski
2018-10-04 16:12 ` Andy Lutomirski
2018-10-04 16:25 ` Yu-cheng Yu
2018-10-04 16:25 ` Yu-cheng Yu
2018-10-04 16:08 ` Andy Lutomirski
2018-10-04 16:08 ` Andy Lutomirski
2018-09-21 15:05 ` [RFC PATCH v4 7/9] x86/cet/ibt: Add ENDBR to op-code-map Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-09-21 15:05 ` [RFC PATCH v4 8/9] x86: Insert endbr32/endbr64 to vDSO Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
2018-09-21 15:05 ` [RFC PATCH v4 9/9] x86/cet: Add PTRACE interface for CET Yu-cheng Yu
2018-09-21 15:05 ` Yu-cheng Yu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f6dcfb3c548f49cd096088e4366e44f57ec5964e.camel@intel.com \
--to=yu-cheng.yu@intel.com \
--cc=arnd@arndb.de \
--cc=bsingharora@gmail.com \
--cc=corbet@lwn.net \
--cc=dave.hansen@linux.intel.com \
--cc=esyr@redhat.com \
--cc=fweimer@redhat.com \
--cc=gorcunov@gmail.com \
--cc=hjl.tools@gmail.com \
--cc=hpa@zytor.com \
--cc=jannh@google.com \
--cc=keescook@chromium.org \
--cc=linux-api@vger.kernel.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=luto@amacapital.net \
--cc=mike.kravetz@oracle.com \
--cc=mingo@redhat.com \
--cc=nadav.amit@gmail.com \
--cc=oleg@redhat.com \
--cc=pavel@ucw.cz \
--cc=peterz@infradead.org \
--cc=ravi.v.shankar@intel.com \
--cc=rdunlap@infradead.org \
--cc=tglx@linutronix.de \
--cc=vedvyas.shanbhogue@intel.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).