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From: 黄沛 <huangpei@loongson.cn>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: ambrosehua@gmail.com, Bibo Mao <maobibo@loongson.cn>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-mips@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-mm@kvack.org, Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Paul Burton <paulburton@kernel.org>,
	Li Xuefeng <lixuefeng@loongson.cn>,
	Yang Tiezhu <yangtiezhu@loongson.cn>,
	Gao Juxin <gaojuxin@loongson.cn>,
	Huacai Chen <chenhuacai@loongson.cn>,
	Jinyang He <hejinyang@loongson.cn>
Subject: Re: [PATCH 1/3] MIPS: sync arrangement of pt_regs with user_pt_regs and regoffset_table
Date: Sun, 07 Mar 2021 09:36:18 +0800	[thread overview]
Message-ID: <20210307013618.5783639.28921.9491@loongson.cn> (raw)
In-Reply-To: <20210306074711.GA4744@alpha.franken.de>

What about other two patches? 


Current ftrace implementation is not safe on MIPS/SMP,

When disabling  tracing, we need to change 

Jal 
Addiu sp,sp,-offset

Into 

Nop
Nop

Atomically, but mips issue two writes, no 
matter ‎ in what order these writes are seen by
other cpu, ‎ it is wrecked in  these two case

Jal 
Nop

Or,

Nop
‎addiu sp,sp, _offset

‎Huang Pei


  Original Message  
From: Thomas Bogendoerfer
Sent: 2021年3月6日星期六 16:06
To: Huang Pei
Cc: ambrosehua@gmail.com; Bibo Mao; Andrew Morton; linux-mips@vger.kernel.org; linux-arch@vger.kernel.org; linux-mm@kvack.org; Jiaxun Yang; Paul Burton; Li Xuefeng; Yang Tiezhu; Gao Juxin; Huacai Chen; Jinyang He
Subject: Re: [PATCH 1/3] MIPS: sync arrangement of pt_regs with user_pt_regs and regoffset_table

On Fri, Mar 05, 2021 at 06:03:08PM +0800, Huang Pei wrote:
> Signed-off-by: Huang Pei <huangpei@loongson.cn>
> ---
> arch/mips/include/asm/ptrace.h | 10 +++++-----
> arch/mips/kernel/asm-offsets.c | 6 +++---
> arch/mips/kernel/ptrace.c | 10 +++++-----
> 3 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
> index 1e76774b36dd..e51691f2b7af 100644
> --- a/arch/mips/include/asm/ptrace.h
> +++ b/arch/mips/include/asm/ptrace.h
> @@ -34,16 +34,16 @@ struct pt_regs {
> /* Saved main processor registers. */
> unsigned long regs[32];
> 
> +	unsigned long lo;
> +	unsigned long hi;
> /* Saved special registers. */
> +	unsigned long cp0_epc;
> +	unsigned long cp0_badvaddr;
> unsigned long cp0_status;
> -	unsigned long hi;
> -	unsigned long lo;
> +	unsigned long cp0_cause;
> #ifdef CONFIG_CPU_HAS_SMARTMIPS
> unsigned long acx;
> #endif
> -	unsigned long cp0_badvaddr;
> -	unsigned long cp0_cause;
> -	unsigned long cp0_epc;
> #ifdef CONFIG_CPU_CAVIUM_OCTEON
> unsigned long long mpl[6]; /* MTM{0-5} */
> unsigned long long mtp[6]; /* MTP{0-5} */

sorry this is pointless, I'm not taking this.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]


  reply	other threads:[~2021-03-07  1:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-05 10:03 [PATCH V2]: MIPS work Huang Pei
2021-03-05 10:03 ` [PATCH 1/3] MIPS: sync arrangement of pt_regs with user_pt_regs and regoffset_table Huang Pei
2021-03-06  7:47   ` Thomas Bogendoerfer
2021-03-07  1:36     ` 黄沛 [this message]
2021-03-05 10:03 ` [PATCH 2/3] MIPS: clean up CONFIG_MIPS_PGD_C0_CONTEXT handling Huang Pei
2021-03-05 10:03 ` [PATCH 3/3] MIPS: loongson64: alloc pglist_data at run time Huang Pei

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