* [PATCH v2 1/2] arm: dts: mediatek: Format mediatek, larbs as an array of phandles
@ 2022-03-01 20:31 Nícolas F. R. A. Prado
2022-03-01 20:31 ` [PATCH v2 2/2] arm64: " Nícolas F. R. A. Prado
2022-03-02 9:59 ` [PATCH v2 1/2] arm: dts: mediatek: Format mediatek,larbs " Matthias Brugger
0 siblings, 2 replies; 3+ messages in thread
From: Nícolas F. R. A. Prado @ 2022-03-01 20:31 UTC (permalink / raw)
To: Matthias Brugger
Cc: Rob Herring, AngeloGioacchino Del Regno, kernel,
Nícolas F. R. A. Prado, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek
Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas")
updated the mediatek,larbs property in the mediatek,iommu.yaml
dt-binding to make it clearer that the phandles passed to the property
are independent, rather than subsequent arguments to the first phandle.
Update the mediatek,larbs property in the arm Devicetrees to use the
same formatting. This change doesn't impact any behavior: the compiled
dtb is exactly the same. It does however fix the warnings generated by
dtbs_check.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
---
v1: https://lore.kernel.org/linux-mediatek/20220225225315.80220-1-nfraprado@collabora.com/
Changes in v2:
- Split arm and arm64 changes into separate commits
arch/arm/boot/dts/mt2701.dtsi | 2 +-
arch/arm/boot/dts/mt7623n.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
index 4776f85d6d5b..64722285228c 100644
--- a/arch/arm/boot/dts/mt2701.dtsi
+++ b/arch/arm/boot/dts/mt2701.dtsi
@@ -222,7 +222,7 @@ iommu: mmsys_iommu@10205000 {
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
- mediatek,larbs = <&larb0 &larb1 &larb2>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
#iommu-cells = <1>;
};
diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi
index bcb0846e29fd..f9e031621c80 100644
--- a/arch/arm/boot/dts/mt7623n.dtsi
+++ b/arch/arm/boot/dts/mt7623n.dtsi
@@ -107,7 +107,7 @@ iommu: mmsys_iommu@10205000 {
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
- mediatek,larbs = <&larb0 &larb1 &larb2>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
#iommu-cells = <1>;
};
--
2.35.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH v2 2/2] arm64: dts: mediatek: Format mediatek, larbs as an array of phandles
2022-03-01 20:31 [PATCH v2 1/2] arm: dts: mediatek: Format mediatek, larbs as an array of phandles Nícolas F. R. A. Prado
@ 2022-03-01 20:31 ` Nícolas F. R. A. Prado
2022-03-02 9:59 ` [PATCH v2 1/2] arm: dts: mediatek: Format mediatek,larbs " Matthias Brugger
1 sibling, 0 replies; 3+ messages in thread
From: Nícolas F. R. A. Prado @ 2022-03-01 20:31 UTC (permalink / raw)
To: Matthias Brugger
Cc: Rob Herring, AngeloGioacchino Del Regno, kernel,
Nícolas F. R. A. Prado, devicetree, linux-arm-kernel,
linux-kernel, linux-mediatek
Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas")
updated the mediatek,larbs property in the mediatek,iommu.yaml
dt-binding to make it clearer that the phandles passed to the property
are independent, rather than subsequent arguments to the first phandle.
Update the mediatek,larbs property in the arm64 Devicetrees to use the
same formatting. This change doesn't impact any behavior: the compiled
dtb is exactly the same. It does however fix the warnings generated by
dtbs_check.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
---
Changes in v2:
- Split arm and arm64 changes into separate commits
arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 6 +++---
arch/arm64/boot/dts/mediatek/mt8167.dtsi | 2 +-
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 4 ++--
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index de16c0d80c30..973c9beade0c 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -329,8 +329,8 @@ iommu0: iommu@10205000 {
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
- mediatek,larbs = <&larb0 &larb1 &larb2
- &larb3 &larb6>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
+ <&larb3>, <&larb6>;
#iommu-cells = <1>;
};
@@ -346,7 +346,7 @@ iommu1: iommu@1020a000 {
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
- mediatek,larbs = <&larb4 &larb5 &larb7>;
+ mediatek,larbs = <&larb4>, <&larb5>, <&larb7>;
#iommu-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8167.dtsi b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
index 9029051624a6..54655f2feb04 100644
--- a/arch/arm64/boot/dts/mediatek/mt8167.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8167.dtsi
@@ -174,7 +174,7 @@ larb2: larb@16010000 {
iommu: m4u@10203000 {
compatible = "mediatek,mt8167-m4u";
reg = <0 0x10203000 0 0x1000>;
- mediatek,larbs = <&larb0 &larb1 &larb2>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_LOW>;
#iommu-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 2b7d331a4588..042feaedda4a 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -588,8 +588,8 @@ iommu: iommu@10205000 {
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_M4U>;
clock-names = "bclk";
- mediatek,larbs = <&larb0 &larb1 &larb2
- &larb3 &larb4 &larb5>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
+ <&larb3>, <&larb4>, <&larb5>;
#iommu-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 00f2ddd245e1..523741150968 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -682,8 +682,8 @@ iommu: iommu@10205000 {
compatible = "mediatek,mt8183-m4u";
reg = <0 0x10205000 0 0x1000>;
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_LOW>;
- mediatek,larbs = <&larb0 &larb1 &larb2 &larb3
- &larb4 &larb5 &larb6>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>,
+ <&larb4>, <&larb5>, <&larb6>;
#iommu-cells = <1>;
};
--
2.35.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2 1/2] arm: dts: mediatek: Format mediatek,larbs as an array of phandles
2022-03-01 20:31 [PATCH v2 1/2] arm: dts: mediatek: Format mediatek, larbs as an array of phandles Nícolas F. R. A. Prado
2022-03-01 20:31 ` [PATCH v2 2/2] arm64: " Nícolas F. R. A. Prado
@ 2022-03-02 9:59 ` Matthias Brugger
1 sibling, 0 replies; 3+ messages in thread
From: Matthias Brugger @ 2022-03-02 9:59 UTC (permalink / raw)
To: Nícolas F. R. A. Prado
Cc: Rob Herring, AngeloGioacchino Del Regno, kernel, devicetree,
linux-arm-kernel, linux-kernel, linux-mediatek
On 01/03/2022 21:31, Nícolas F. R. A. Prado wrote:
> Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas")
> updated the mediatek,larbs property in the mediatek,iommu.yaml
> dt-binding to make it clearer that the phandles passed to the property
> are independent, rather than subsequent arguments to the first phandle.
>
> Update the mediatek,larbs property in the arm Devicetrees to use the
> same formatting. This change doesn't impact any behavior: the compiled
> dtb is exactly the same. It does however fix the warnings generated by
> dtbs_check.
>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
>
Applied, thanks!
Matthias
> ---
> v1: https://lore.kernel.org/linux-mediatek/20220225225315.80220-1-nfraprado@collabora.com/
>
> Changes in v2:
> - Split arm and arm64 changes into separate commits
>
> arch/arm/boot/dts/mt2701.dtsi | 2 +-
> arch/arm/boot/dts/mt7623n.dtsi | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 4776f85d6d5b..64722285228c 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -222,7 +222,7 @@ iommu: mmsys_iommu@10205000 {
> interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
> clocks = <&infracfg CLK_INFRA_M4U>;
> clock-names = "bclk";
> - mediatek,larbs = <&larb0 &larb1 &larb2>;
> + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
> #iommu-cells = <1>;
> };
>
> diff --git a/arch/arm/boot/dts/mt7623n.dtsi b/arch/arm/boot/dts/mt7623n.dtsi
> index bcb0846e29fd..f9e031621c80 100644
> --- a/arch/arm/boot/dts/mt7623n.dtsi
> +++ b/arch/arm/boot/dts/mt7623n.dtsi
> @@ -107,7 +107,7 @@ iommu: mmsys_iommu@10205000 {
> interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>;
> clocks = <&infracfg CLK_INFRA_M4U>;
> clock-names = "bclk";
> - mediatek,larbs = <&larb0 &larb1 &larb2>;
> + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>;
> #iommu-cells = <1>;
> };
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-03-02 10:00 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-01 20:31 [PATCH v2 1/2] arm: dts: mediatek: Format mediatek, larbs as an array of phandles Nícolas F. R. A. Prado
2022-03-01 20:31 ` [PATCH v2 2/2] arm64: " Nícolas F. R. A. Prado
2022-03-02 9:59 ` [PATCH v2 1/2] arm: dts: mediatek: Format mediatek,larbs " Matthias Brugger
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).