From: Christophe ROULLIER <christophe.roullier@st.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
"robh@kernel.org" <robh@kernel.org>,
Alexandre TORGUE <alexandre.torgue@st.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"joabreu@synopsys.com" <joabreu@synopsys.com>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
Peppe CAVALLARO <peppe.cavallaro@st.com>,
"davem@davemloft.net" <davem@davemloft.net>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/8] net: ethernet: stmmac: update to support all PHY config for stm32mp157c.
Date: Thu, 14 Feb 2019 14:48:32 +0000 [thread overview]
Message-ID: <04801425-ae14-3bfe-4eaf-2f3d552093cb@st.com> (raw)
In-Reply-To: <20190214134040.GA5699@lunn.ch>
On 2/14/19 2:40 PM, Andrew Lunn wrote:
> On Thu, Feb 14, 2019 at 07:45:57AM +0100, Christophe Roullier wrote:
>> @@ -131,19 +185,19 @@ static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
>> case PHY_INTERFACE_MODE_RGMII:
>> val = SYSCFG_PMCR_ETH_SEL_RGMII;
>> - if (dwmac->int_phyclk)
>> + if (dwmac->eth_clk_sel_reg)
>> val |= SYSCFG_PMCR_ETH_CLK_SEL;
>> pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RGMII\n");
>> break;
>
> Hi Christophe
>
> This code should handle all 4 PHY_INTERFACE_MODE_RGMII* values.
>
> Andrew
>
Hi Andrew,
For RGMII we are supporting 3 modes:
- normal mode (with PHY with quartz)
- Phy wo crystal and phy is clocking with PLL to 25Mhz.
- other mode where we used PLL from RCC (125Mhz) to clock Ethernet
IP (save one pin "ETH_CK125")
In driver source code I put table to sum-up all configs supported for
each phy mode:
+ * Below table summarizes the clock requirement and clock sources for
+ * supported phy interface modes.
+ *
__________________________________________________________________________
+ *|PHY_MODE | Normal | PHY wo crystal| PHY wo crystal |No 125Mhz
from PHY|
+ *| | | 25MHz | 50MHz |
|
+ *
---------------------------------------------------------------------------
+ *| MII | - | eth-ck | n/a | n/a |
+ *| | | | | |
+ *
---------------------------------------------------------------------------
+ *| GMII | - | eth-ck | n/a | n/a |
+ *| | | | | |
+ *
---------------------------------------------------------------------------
+ *| RGMII | - | eth-ck | n/a | eth-ck (no pin) |
+ *| | | | |
st,eth_clk_sel |
+ *
---------------------------------------------------------------------------
+ *| RMII | - | eth-ck | eth-ck | n/a |
+ *| | | | st,eth_ref_clk_sel | |
+ *
---------------------------------------------------------------------------
Regards,
Christophe
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next prev parent reply other threads:[~2019-02-14 14:48 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 6:45 [PATCH 0/8] stmmac: add some fixes for stm32 Christophe Roullier
2019-02-14 6:45 ` [PATCH 1/8] net: ethernet: stmmac: manage Ethernet WoL for stm32mp157c Christophe Roullier
2019-02-14 6:45 ` [PATCH 2/8] net: ethernet: stmmac: update to support all PHY config " Christophe Roullier
2019-02-14 13:40 ` Andrew Lunn
2019-02-14 14:48 ` Christophe ROULLIER [this message]
2019-02-14 15:00 ` Christophe ROULLIER
2019-02-14 15:15 ` Andrew Lunn
2019-02-14 15:51 ` Christophe ROULLIER
2019-02-14 6:45 ` [PATCH 3/8] dt-bindings: net: stmmac: add phys config properties Christophe Roullier
2019-02-14 6:45 ` [PATCH 4/8] net: ethernet: stmmac: add management of clk_csr property Christophe Roullier
2019-02-14 6:46 ` [PATCH 5/8] net: ethernet: stmmac: update to be compatible with MCU family (stm32f4, stm32h7) Christophe Roullier
2019-02-14 6:46 ` [PATCH 6/8] dt-bindings: net: stmmac: add syscfg clock property Christophe Roullier
2019-02-14 6:46 ` [PATCH 7/8] ARM: dts: stm32: Add Ethernet support on stm32h7 SOC and activate it for eval and disco boards Christophe Roullier
2019-02-14 13:44 ` Andrew Lunn
2019-02-14 14:55 ` Christophe ROULLIER
2019-02-14 6:46 ` [PATCH 8/8] ARM: dts: stm32: add syscfg clock support for Ethernet on STM32F429 SoC Christophe Roullier
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