* [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0
@ 2013-02-20 15:27 Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2 Santosh Shilimkar
` (7 more replies)
0 siblings, 8 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
Here are few OMAP5 updates discovered during es2.0 silicon validation.
Tested on OMAP5430 and OMAP5432 devices after applying out of tree
datafiles for OMAP5.
Rajendra Nayak (1):
ARM: OMAP5: clock: No Freqsel on OMAP5 devices
Santosh Shilimkar (6):
ARM: OMAP5: Update SOC id detection code for ES2
ARM: OMAP5: timer: Update the clocksource name as per clock data
ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs
ARM: OMAP5: Update SAR RAM base address
ARM: OMAP5: Update SAR memory layout for WakeupGen
ARM: OMAP5: Make errata i688 workaround available
Tero Kristo (1):
ARM: OMAP5: Reuse prm read_inst/write_inst
arch/arm/mach-omap2/Kconfig | 2 +-
arch/arm/mach-omap2/dpll3xxx.c | 6 ++++--
arch/arm/mach-omap2/id.c | 16 +++++++++++++---
arch/arm/mach-omap2/io.c | 9 +++++++++
arch/arm/mach-omap2/omap4-common.c | 10 ++++++++--
arch/arm/mach-omap2/omap4-sar-layout.h | 14 +++++++-------
arch/arm/mach-omap2/omap54xx.h | 1 +
arch/arm/mach-omap2/prm44xx.c | 6 +++---
arch/arm/mach-omap2/soc.h | 2 ++
arch/arm/mach-omap2/timer.c | 5 +++--
10 files changed, 51 insertions(+), 20 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:29 ` Felipe Balbi
2013-02-20 15:27 ` [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data Santosh Shilimkar
` (6 subsequent siblings)
7 siblings, 1 reply; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
Update OMAP5 ES2 idcode and make ES2 as default detection.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/id.c | 16 +++++++++++++---
arch/arm/mach-omap2/soc.h | 2 ++
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 45cc7ed4..ed6f407 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -519,22 +519,32 @@ void __init omap5xxx_check_revision(void)
case 0xb942:
switch (rev) {
case 0:
- default:
omap_revision = OMAP5430_REV_ES1_0;
+ break;
+ case 1:
+ omap_revision = OMAP5430_REV_ES2_0;
+ break;
+ default:
+ omap_revision = OMAP5430_REV_ES2_0;
}
break;
case 0xb998:
switch (rev) {
case 0:
- default:
omap_revision = OMAP5432_REV_ES1_0;
+ break;
+ case 1:
+ omap_revision = OMAP5432_REV_ES2_0;
+ break;
+ default:
+ omap_revision = OMAP5432_REV_ES2_0;
}
break;
default:
/* Unknown default to latest silicon rev as default*/
- omap_revision = OMAP5430_REV_ES1_0;
+ omap_revision = OMAP5430_REV_ES2_0;
}
pr_info("OMAP%04x ES%d.0\n",
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index f31d907..4c90b3b 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -404,7 +404,9 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP54XX_CLASS 0x54000054
#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2 Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-21 12:52 ` Sergei Shtylyov
2013-02-20 15:27 ` [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs Santosh Shilimkar
` (5 subsequent siblings)
7 siblings, 1 reply; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
OMAP5 clockdata has different sys clock clock node name. Fix the timer code
to take care of it.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/timer.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index b8ad6e6..3c29450 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -62,6 +62,7 @@
#define OMAP2_MPU_SOURCE "sys_ck"
#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE
#define OMAP4_MPU_SOURCE "sys_clkin_ck"
+#define OMAP5_MPU_SOURCE "sys_clkin"
#define OMAP2_32K_SOURCE "func_32k_ck"
#define OMAP3_32K_SOURCE "omap_32k_fck"
#define OMAP4_32K_SOURCE "sys_32k_ck"
@@ -494,7 +495,7 @@ static void __init realtime_counter_init(void)
pr_err("%s: ioremap failed\n", __func__);
return;
}
- sys_clk = clk_get(NULL, "sys_clkin_ck");
+ sys_clk = clk_get(NULL, OMAP5_MPU_SOURCE);
if (IS_ERR(sys_clk)) {
pr_err("%s: failed to get system clock handle\n", __func__);
iounmap(base);
@@ -634,7 +635,7 @@ OMAP_SYS_TIMER(4, local);
#ifdef CONFIG_SOC_OMAP5
OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
- 2, OMAP4_MPU_SOURCE);
+ 2, OMAP5_MPU_SOURCE);
static void __init omap5_realtime_timer_init(void)
{
int err;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2 Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:30 ` Felipe Balbi
2013-02-21 12:50 ` Sergei Shtylyov
2013-02-20 15:27 ` [PATCH 4/8] ARM: OMAP5: Reuse prm read_inst/write_inst Santosh Shilimkar
` (4 subsequent siblings)
7 siblings, 2 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
Allow prm init to success on OMAP5 SOCs.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/prm44xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index c05a343..1aae198 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -650,7 +650,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
int __init omap44xx_prm_init(void)
{
- if (!cpu_is_omap44xx())
+ if (!cpu_is_omap44xx() && !soc_is_omap54xx())
return 0;
return prm_register(&omap44xx_prm_ll_data);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 4/8] ARM: OMAP5: Reuse prm read_inst/write_inst
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
` (2 preceding siblings ...)
2013-02-20 15:27 ` [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 5/8] ARM: OMAP5: Update SAR RAM base address Santosh Shilimkar
` (3 subsequent siblings)
7 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Tero Kristo <t-kristo@ti.com>
Make use of 'prm_base' so that prm read_inst/write_inst can work on
OMAP5 devices.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/prm44xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 1aae198..cb24b26 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -81,13 +81,13 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
/* Read a register in a CM/PRM instance in the PRM module */
u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
{
- return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
+ return __raw_readl(prm_base + inst + reg);
}
/* Write into a register in a CM/PRM instance in the PRM module */
void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
{
- __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
+ __raw_writel(val, prm_base + inst + reg);
}
/* Read-modify-write a register in a PRM module. Caller must lock */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 5/8] ARM: OMAP5: Update SAR RAM base address
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
` (3 preceding siblings ...)
2013-02-20 15:27 ` [PATCH 4/8] ARM: OMAP5: Reuse prm read_inst/write_inst Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 6/8] ARM: OMAP5: Update SAR memory layout for WakeupGen Santosh Shilimkar
` (2 subsequent siblings)
7 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
Update SAR RAM base address for OMAP5 based devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap4-common.c | 10 ++++++++--
arch/arm/mach-omap2/omap54xx.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 6897ae2..59399f8 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -239,15 +239,21 @@ void __iomem *omap4_get_sar_ram_base(void)
*/
static int __init omap4_sar_ram_init(void)
{
+ unsigned long sar_base;
+
/*
* To avoid code running on other OMAPs in
* multi-omap builds
*/
- if (!cpu_is_omap44xx())
+ if (cpu_is_omap44xx())
+ sar_base = OMAP44XX_SAR_RAM_BASE;
+ else if (soc_is_omap54xx())
+ sar_base = OMAP54XX_SAR_RAM_BASE;
+ else
return -ENOMEM;
/* Static mapping, never released */
- sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
+ sar_ram_base = ioremap(sar_base, SZ_16K);
if (WARN_ON(!sar_ram_base))
return -ENOMEM;
diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb..a086ba1 100644
--- a/arch/arm/mach-omap2/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
@@ -28,5 +28,6 @@
#define OMAP54XX_PRCM_MPU_BASE 0x48243000
#define OMAP54XX_SCM_BASE 0x4a002000
#define OMAP54XX_CTRL_BASE 0x4a002800
+#define OMAP54XX_SAR_RAM_BASE 0x4ae26000
#endif /* __ASM_SOC_OMAP555554XX_H */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 6/8] ARM: OMAP5: Update SAR memory layout for WakeupGen
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
` (4 preceding siblings ...)
2013-02-20 15:27 ` [PATCH 5/8] ARM: OMAP5: Update SAR RAM base address Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 7/8] ARM: OMAP5: Make errata i688 workaround available Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices Santosh Shilimkar
7 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
On OMAP5 es2 WakeupGen SAR register layout offset have changed.
Update the layout accordingly.
Reported-by: Menon, Nishanth <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap4-sar-layout.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index e170fe8..9374175 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -48,13 +48,13 @@
#define SAR_BACKUP_STATUS_WAKEUPGEN 0x10
/* WakeUpGen save restore offset from OMAP54XX_SAR_RAM_BASE */
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8d4)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x8e8)
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x8fc)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x910)
-#define OMAP5_AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x924)
-#define OMAP5_AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x928)
-#define OMAP5_AMBA_IF_MODE_OFFSET (SAR_BANK3_OFFSET + 0x92c)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x9dc)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x9f0)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0xa04)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0xa18)
+#define OMAP5_AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0xa2c)
+#define OMAP5_AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x930)
+#define OMAP5_AMBA_IF_MODE_OFFSET (SAR_BANK3_OFFSET + 0xa34)
#define OMAP5_SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x800)
#endif
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 7/8] ARM: OMAP5: Make errata i688 workaround available
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
` (5 preceding siblings ...)
2013-02-20 15:27 ` [PATCH 6/8] ARM: OMAP5: Update SAR memory layout for WakeupGen Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices Santosh Shilimkar
7 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
Errata i688 is also applicable for OMAP5 based devices. Update the
code so that it can be enabled on OMAP5 devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/Kconfig | 2 +-
arch/arm/mach-omap2/io.c | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 41b581f..63a12d4 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -397,7 +397,7 @@ config OMAP3_SDRC_AC_TIMING
config OMAP4_ERRATA_I688
bool "OMAP4 errata: Async Bridge Corruption"
- depends on ARCH_OMAP4
+ depends on ARCH_OMAP4 || SOC_OMAP5
select ARCH_HAS_BARRIERS
help
If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2c3fdd6..2bef5a7 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -271,6 +271,14 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
.length = L4_PER_54XX_SIZE,
.type = MT_DEVICE,
},
+#ifdef CONFIG_OMAP4_ERRATA_I688
+ {
+ .virtual = OMAP4_SRAM_VA,
+ .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
+ .length = PAGE_SIZE,
+ .type = MT_MEMORY_SO,
+ },
+#endif
};
#endif
@@ -323,6 +331,7 @@ void __init omap4_map_io(void)
void __init omap5_map_io(void)
{
iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
+ omap_barriers_init();
}
#endif
/*
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
` (6 preceding siblings ...)
2013-02-20 15:27 ` [PATCH 7/8] ARM: OMAP5: Make errata i688 workaround available Santosh Shilimkar
@ 2013-02-20 15:27 ` Santosh Shilimkar
2013-03-15 8:39 ` Santosh Shilimkar
7 siblings, 1 reply; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 15:27 UTC (permalink / raw)
To: linux-arm-kernel
From: Rajendra Nayak <rnayak@ti.com>
OMAP5 does not have freqsel either, so add the missing
checks for !soc_is_omap54xx()
Reported-by: Archit Taneja <archit@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
arch/arm/mach-omap2/dpll3xxx.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 0a02aab5..6e3811b 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -310,7 +310,8 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
* Set jitter correction. No jitter correction for OMAP4 and 3630
* since freqsel field is no longer present
*/
- if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
+ if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()
+ && !soc_is_omap54xx()) {
v = __raw_readl(dd->control_reg);
v &= ~dd->freqsel_mask;
v |= freqsel << __ffs(dd->freqsel_mask);
@@ -501,7 +502,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
return -EINVAL;
/* No freqsel on OMAP4 and OMAP3630 */
- if (!cpu_is_omap44xx() && !cpu_is_omap3630()) {
+ if (!cpu_is_omap44xx() && !cpu_is_omap3630()
+ && !soc_is_omap54xx()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd->last_rounded_n);
WARN_ON(!freqsel);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 15:27 ` [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2 Santosh Shilimkar
@ 2013-02-20 15:29 ` Felipe Balbi
2013-02-20 16:03 ` Santosh Shilimkar
0 siblings, 1 reply; 19+ messages in thread
From: Felipe Balbi @ 2013-02-20 15:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wed, Feb 20, 2013 at 08:57:07PM +0530, Santosh Shilimkar wrote:
> case 0xb998:
> switch (rev) {
> case 0:
> - default:
> omap_revision = OMAP5432_REV_ES1_0;
> + break;
> + case 1:
> + omap_revision = OMAP5432_REV_ES2_0;
> + break;
> + default:
> + omap_revision = OMAP5432_REV_ES2_0;
no need for the duplication:
+ case 1:
+ default:
+ omap_revision = OMAP5432_REV_ES2_0;
will work just fine.
> }
> break;
>
> default:
> /* Unknown default to latest silicon rev as default*/
> - omap_revision = OMAP5430_REV_ES1_0;
> + omap_revision = OMAP5430_REV_ES2_0;
how about we default to 0xffffffff ? That's the highest possible
version, just not sure if our revision macros can cope with it.
--
balbi
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs
2013-02-20 15:27 ` [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs Santosh Shilimkar
@ 2013-02-20 15:30 ` Felipe Balbi
2013-02-21 12:50 ` Sergei Shtylyov
1 sibling, 0 replies; 19+ messages in thread
From: Felipe Balbi @ 2013-02-20 15:30 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 20, 2013 at 08:57:09PM +0530, Santosh Shilimkar wrote:
> Allow prm init to success on OMAP5 SOCs.
s/success/succeed/
--
balbi
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 15:29 ` Felipe Balbi
@ 2013-02-20 16:03 ` Santosh Shilimkar
2013-02-20 16:27 ` Felipe Balbi
0 siblings, 1 reply; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 16:03 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 20 February 2013 08:59 PM, Felipe Balbi wrote:
> Hi,
>
> On Wed, Feb 20, 2013 at 08:57:07PM +0530, Santosh Shilimkar wrote:
>> case 0xb998:
>> switch (rev) {
>> case 0:
>> - default:
>> omap_revision = OMAP5432_REV_ES1_0;
>> + break;
>> + case 1:
>> + omap_revision = OMAP5432_REV_ES2_0;
>> + break;
>> + default:
>> + omap_revision = OMAP5432_REV_ES2_0;
>
> no need for the duplication:
>
> + case 1:
> + default:
> + omap_revision = OMAP5432_REV_ES2_0;
>
> will work just fine.
right. Will fix that.
>
>> }
>> break;
>>
>> default:
>> /* Unknown default to latest silicon rev as default*/
>> - omap_revision = OMAP5430_REV_ES1_0;
>> + omap_revision = OMAP5430_REV_ES2_0;
>
> how about we default to 0xffffffff ? That's the highest possible
> version, just not sure if our revision macros can cope with it.
>
:D
For record, it was decided that we will always have latest silicon
spin as default and hence OMAP5_ES2
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 16:03 ` Santosh Shilimkar
@ 2013-02-20 16:27 ` Felipe Balbi
2013-02-20 16:31 ` Santosh Shilimkar
0 siblings, 1 reply; 19+ messages in thread
From: Felipe Balbi @ 2013-02-20 16:27 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
On Wed, Feb 20, 2013 at 09:33:32PM +0530, Santosh Shilimkar wrote:
> >> default:
> >> /* Unknown default to latest silicon rev as default*/
> >>- omap_revision = OMAP5430_REV_ES1_0;
> >>+ omap_revision = OMAP5430_REV_ES2_0;
> >
> >how about we default to 0xffffffff ? That's the highest possible
> >version, just not sure if our revision macros can cope with it.
> >
> :D
> For record, it was decided that we will always have latest silicon
> spin as default and hence OMAP5_ES2
but then this line will forever be modified. Every year or so :-p
--
balbi
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 16:27 ` Felipe Balbi
@ 2013-02-20 16:31 ` Santosh Shilimkar
2013-02-20 16:32 ` Felipe Balbi
0 siblings, 1 reply; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-20 16:31 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 20 February 2013 09:57 PM, Felipe Balbi wrote:
> Hi,
>
> On Wed, Feb 20, 2013 at 09:33:32PM +0530, Santosh Shilimkar wrote:
>>>> default:
>>>> /* Unknown default to latest silicon rev as default*/
>>>> - omap_revision = OMAP5430_REV_ES1_0;
>>>> + omap_revision = OMAP5430_REV_ES2_0;
>>>
>>> how about we default to 0xffffffff ? That's the highest possible
>>> version, just not sure if our revision macros can cope with it.
>>>
>> :D
>> For record, it was decided that we will always have latest silicon
>> spin as default and hence OMAP5_ES2
>
> but then this line will forever be modified. Every year or so :-p
>
No... Unless and until we spin new silicon revision for OMAP5
every year. This is OMAP5 specific ID code function.
Regards,
Santosh
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2
2013-02-20 16:31 ` Santosh Shilimkar
@ 2013-02-20 16:32 ` Felipe Balbi
0 siblings, 0 replies; 19+ messages in thread
From: Felipe Balbi @ 2013-02-20 16:32 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Feb 20, 2013 at 10:01:15PM +0530, Santosh Shilimkar wrote:
> On Wednesday 20 February 2013 09:57 PM, Felipe Balbi wrote:
> >Hi,
> >
> >On Wed, Feb 20, 2013 at 09:33:32PM +0530, Santosh Shilimkar wrote:
> >>>> default:
> >>>> /* Unknown default to latest silicon rev as default*/
> >>>>- omap_revision = OMAP5430_REV_ES1_0;
> >>>>+ omap_revision = OMAP5430_REV_ES2_0;
> >>>
> >>>how about we default to 0xffffffff ? That's the highest possible
> >>>version, just not sure if our revision macros can cope with it.
> >>>
> >>:D
> >>For record, it was decided that we will always have latest silicon
> >>spin as default and hence OMAP5_ES2
> >
> >but then this line will forever be modified. Every year or so :-p
> >
> No... Unless and until we spin new silicon revision for OMAP5
> every year. This is OMAP5 specific ID code function.
oh, right. nevermind then
--
balbi
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs
2013-02-20 15:27 ` [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs Santosh Shilimkar
2013-02-20 15:30 ` Felipe Balbi
@ 2013-02-21 12:50 ` Sergei Shtylyov
1 sibling, 0 replies; 19+ messages in thread
From: Sergei Shtylyov @ 2013-02-21 12:50 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
On 20-02-2013 19:27, Santosh Shilimkar wrote:
> Allow prm init to success on OMAP5 SOCs.
s/succees/succeed/
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
WBR, Sergei
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data
2013-02-20 15:27 ` [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data Santosh Shilimkar
@ 2013-02-21 12:52 ` Sergei Shtylyov
2013-02-21 12:57 ` Santosh Shilimkar
0 siblings, 1 reply; 19+ messages in thread
From: Sergei Shtylyov @ 2013-02-21 12:52 UTC (permalink / raw)
To: linux-arm-kernel
Hello.
On 20-02-2013 19:27, Santosh Shilimkar wrote:
> OMAP5 clockdata has different sys clock clock node name. Fix the timer code
One "clock" too many. :-)
> to take care of it.
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
WBR, Sergei
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data
2013-02-21 12:52 ` Sergei Shtylyov
@ 2013-02-21 12:57 ` Santosh Shilimkar
0 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-02-21 12:57 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 21 February 2013 06:22 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 20-02-2013 19:27, Santosh Shilimkar wrote:
>
>> OMAP5 clockdata has different sys clock clock node name. Fix the timer
>> code
>
> One "clock" too many. :-)
>
Indeed. Will fix that.
Regards
Santosh
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices
2013-02-20 15:27 ` [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices Santosh Shilimkar
@ 2013-03-15 8:39 ` Santosh Shilimkar
0 siblings, 0 replies; 19+ messages in thread
From: Santosh Shilimkar @ 2013-03-15 8:39 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 20 February 2013 08:57 PM, Santosh Shilimkar wrote:
> From: Rajendra Nayak <rnayak@ti.com>
>
> OMAP5 does not have freqsel either, so add the missing
> checks for !soc_is_omap54xx()
>
> Reported-by: Archit Taneja <archit@ti.com>
> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
> ---
> arch/arm/mach-omap2/dpll3xxx.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
> index 0a02aab5..6e3811b 100644
> --- a/arch/arm/mach-omap2/dpll3xxx.c
> +++ b/arch/arm/mach-omap2/dpll3xxx.c
> @@ -310,7 +310,8 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
> * Set jitter correction. No jitter correction for OMAP4 and 3630
> * since freqsel field is no longer present
> */
> - if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
> + if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()
> + && !soc_is_omap54xx()) {
After re-looking at the freqsel patch, since the feature is available on
only OMAP343X devices, its is better to just check that device to
avoid future patching.
For the record, updated patch end of the email.
Regards,
Santosh
>From c31041957873bc524fe5d4fcd96688dc0d02e2db Mon Sep 17 00:00:00 2001
From: Rajendra Nayak <rnayak@ti.com>
Date: Tue, 29 Jan 2013 18:33:49 +0530
Subject: [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices too
OMAP5 does not have freqsel either, so checks needs to be extended.
Infact only OMAP343X devices has the freqsel support, so fix the check
accordingly so that future patching can be avoided.
Reported-by: Archit Taneja <archit@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/dpll3xxx.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 3aed4b0..ae84c9d 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -307,10 +307,10 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
_omap3_noncore_dpll_bypass(clk);
/*
- * Set jitter correction. No jitter correction for OMAP4 and 3630
- * since freqsel field is no longer present
+ * Set jitter correction. Jitter correction applicable for OMAP343X
+ * only since freqsel field is no longer present on other devices.
*/
- if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
+ if (cpu_is_omap343x()) {
v = __raw_readl(dd->control_reg);
v &= ~dd->freqsel_mask;
v |= freqsel << __ffs(dd->freqsel_mask);
@@ -500,9 +500,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
if (dd->last_rounded_rate == 0)
return -EINVAL;
- /* No freqsel on AM335x, OMAP4 and OMAP3630 */
- if (!soc_is_am33xx() && !cpu_is_omap44xx() &&
- !cpu_is_omap3630()) {
+ /* Freqsel is available only on OMAP343X devices */
+ if (cpu_is_omap343x()) {
freqsel = _omap3_dpll_compute_freqsel(clk,
dd->last_rounded_n);
WARN_ON(!freqsel);
--
1.7.9.5
^ permalink raw reply related [flat|nested] 19+ messages in thread
end of thread, other threads:[~2013-03-15 8:39 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-02-20 15:27 [PATCH 0/8] ARM: OMAP5: Few updates discovered with es2.0 Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 1/8] ARM: OMAP5: Update SOC id detection code for ES2 Santosh Shilimkar
2013-02-20 15:29 ` Felipe Balbi
2013-02-20 16:03 ` Santosh Shilimkar
2013-02-20 16:27 ` Felipe Balbi
2013-02-20 16:31 ` Santosh Shilimkar
2013-02-20 16:32 ` Felipe Balbi
2013-02-20 15:27 ` [PATCH 2/8] ARM: OMAP5: timer: Update the clocksource name as per clock data Santosh Shilimkar
2013-02-21 12:52 ` Sergei Shtylyov
2013-02-21 12:57 ` Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 3/8] ARM: OMAP5: prm: Allow prm init to success on OMAP5 SOCs Santosh Shilimkar
2013-02-20 15:30 ` Felipe Balbi
2013-02-21 12:50 ` Sergei Shtylyov
2013-02-20 15:27 ` [PATCH 4/8] ARM: OMAP5: Reuse prm read_inst/write_inst Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 5/8] ARM: OMAP5: Update SAR RAM base address Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 6/8] ARM: OMAP5: Update SAR memory layout for WakeupGen Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 7/8] ARM: OMAP5: Make errata i688 workaround available Santosh Shilimkar
2013-02-20 15:27 ` [PATCH 8/8] ARM: OMAP5: clock: No Freqsel on OMAP5 devices Santosh Shilimkar
2013-03-15 8:39 ` Santosh Shilimkar
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