From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 22/29] arm64: KVM: define 32bit specific registers
Date: Tue, 5 Mar 2013 03:47:38 +0000 [thread overview]
Message-ID: <1362455265-24165-23-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1362455265-24165-1-git-send-email-marc.zyngier@arm.com>
Define the 32bit specific registers (SPSRs, cp15...).
Most CPU registers are directly mapped to a 64bit register
(r0->x0...). Only the SPSRs have separate registers.
cp15 registers are also mapped into their 64bit counterpart in most
cases.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
arch/arm64/include/asm/kvm_asm.h | 38 +++++++++++++++++++++++++++++++++++++-
arch/arm64/include/asm/kvm_host.h | 5 ++++-
arch/arm64/include/uapi/asm/kvm.h | 7 ++++++-
3 files changed, 47 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
index 851fee5..3f4e6e1 100644
--- a/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@ -42,7 +42,43 @@
#define TPIDR_EL1 18 /* Thread ID, Privileged */
#define AMAIR_EL1 19 /* Aux Memory Attribute Indirection Register */
#define CNTKCTL_EL1 20 /* Timer Control Register (EL1) */
-#define NR_SYS_REGS 21
+/* 32bit specific registers. Keep them at the end of the range */
+#define DACR32_EL2 21 /* Domain Access Control Register */
+#define IFSR32_EL2 22 /* Instruction Fault Status Register */
+#define FPEXC32_EL2 23 /* Floating-Point Exception Control Register */
+#define DBGVCR32_EL2 24 /* Debug Vector Catch Register */
+#define TEECR32_EL1 25 /* ThumbEE Configuration Register */
+#define TEEHBR32_EL1 26 /* ThumbEE Handler Base Register */
+#define NR_SYS_REGS 27
+
+/* 32bit mapping */
+#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
+#define c0_CSSELR (CSSELR_EL1 * 2)/* Cache Size Selection Register */
+#define c1_SCTLR (SCTLR_EL1 * 2) /* System Control Register */
+#define c1_ACTLR (ACTLR_EL1 * 2) /* Auxilliary Control Register */
+#define c1_CPACR (CPACR_EL1 * 2) /* Coprocessor Access Control */
+#define c2_TTBR0 (TTBR0_EL1 * 2) /* Translation Table Base Register 0 */
+#define c2_TTBR0_high (c2_TTBR0 + 1) /* TTBR0 top 32 bits */
+#define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */
+#define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */
+#define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
+#define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */
+#define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */
+#define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */
+#define c5_ADFSR (AFSR0_EL1 * 2) /* Auxilary Data Fault Status R */
+#define c5_AIFSR (AFSR1_EL1 * 2) /* Auxilary Instr Fault Status R */
+#define c6_DFAR (FAR_EL1 * 2) /* Data Fault Address Register */
+#define c6_IFAR (c6_DFAR + 1) /* Instruction Fault Address Register */
+#define c10_PRRR (MAIR_EL1 * 2) /* Primary Region Remap Register */
+#define c10_NMRR (c10_PRRR + 1) /* Normal Memory Remap Register */
+#define c12_VBAR (VBAR_EL1 * 2) /* Vector Base Address Register */
+#define c13_CID (CONTEXTIDR_EL1 * 2) /* Context ID Register */
+#define c13_TID_URW (TPIDR_EL0 * 2) /* Thread ID, User R/W */
+#define c13_TID_URO (TPIDRRO_EL0 * 2)/* Thread ID, User R/O */
+#define c13_TID_PRIV (TPIDR_EL1 * 2) /* Thread ID, Priveleged */
+#define c10_AMAIR (AMAIR_EL1 * 2) /* Aux Memory Attr Indirection Reg */
+#define c14_CNTKCTL (CNTKCTL_EL1 * 2) /* Timer Control Register (PL1) */
+#define NR_CP15_REGS (NR_SYS_REGS * 2)
#define ARM_EXCEPTION_IRQ 0
#define ARM_EXCEPTION_TRAP 1
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 68558ac..24dc8d7 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -85,7 +85,10 @@ typedef struct user_fpsimd_state kvm_kernel_vfp_t;
struct kvm_vcpu_arch {
struct kvm_regs regs;
- u64 sys_regs[NR_SYS_REGS];
+ union {
+ u64 sys_regs[NR_SYS_REGS];
+ u32 cp15[NR_CP15_REGS];
+ };
/* HYP configuration */
u64 hcr_el2;
diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h
index 24c8318..f9c269e 100644
--- a/arch/arm64/include/uapi/asm/kvm.h
+++ b/arch/arm64/include/uapi/asm/kvm.h
@@ -23,7 +23,12 @@
#define __ARM_KVM_H__
#define KVM_SPSR_EL1 0
-#define KVM_NR_SPSR 1
+#define KVM_SPSR_SVC KVM_SPSR_EL1
+#define KVM_SPSR_ABT 1
+#define KVM_SPSR_UND 2
+#define KVM_SPSR_IRQ 3
+#define KVM_SPSR_FIQ 4
+#define KVM_NR_SPSR 5
#ifndef __ASSEMBLY__
#include <asm/types.h>
--
1.7.12.4
next prev parent reply other threads:[~2013-03-05 3:47 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-05 3:47 [PATCH 00/29] Port of KVM to arm64 Marc Zyngier
2013-03-05 3:47 ` [PATCH 01/29] arm64: KVM: define HYP and Stage-2 translation page flags Marc Zyngier
2013-03-05 3:47 ` [PATCH 02/29] arm64: KVM: HYP mode idmap support Marc Zyngier
2013-03-05 3:47 ` [PATCH 03/29] arm64: KVM: EL2 register definitions Marc Zyngier
2013-03-05 3:47 ` [PATCH 04/29] arm64: KVM: system register definitions for 64bit guests Marc Zyngier
2013-03-07 10:33 ` [kvmarm] " Alexander Graf
2013-03-08 3:23 ` Marc Zyngier
2013-03-12 13:20 ` Christopher Covington
2013-03-12 13:41 ` Christopher Covington
2013-03-12 13:50 ` Marc Zyngier
2013-03-05 3:47 ` [PATCH 05/29] arm64: KVM: Basic ESR_EL2 helpers and vcpu register access Marc Zyngier
2013-03-16 0:55 ` Geoff Levand
2013-03-05 3:47 ` [PATCH 06/29] arm64: KVM: fault injection into a guest Marc Zyngier
2013-03-12 13:20 ` Christopher Covington
2013-03-12 14:25 ` Marc Zyngier
2013-03-16 1:03 ` Geoff Levand
2013-03-05 3:47 ` [PATCH 07/29] arm64: KVM: architecture specific MMU backend Marc Zyngier
2013-03-05 3:47 ` [PATCH 08/29] arm64: KVM: user space interface Marc Zyngier
2013-03-07 8:09 ` Michael S. Tsirkin
2013-03-08 3:46 ` [kvmarm] " Marc Zyngier
2013-03-10 9:23 ` Michael S. Tsirkin
2013-03-05 3:47 ` [PATCH 09/29] arm64: KVM: system register handling Marc Zyngier
2013-03-07 10:30 ` [kvmarm] " Alexander Graf
2013-03-08 3:29 ` Marc Zyngier
2013-03-25 8:19 ` Marc Zyngier
2013-04-23 23:07 ` Christoffer Dall
2013-03-05 3:47 ` [PATCH 10/29] arm64: KVM: Cortex-A57 specific system registers handling Marc Zyngier
2013-03-13 18:30 ` Christopher Covington
2013-03-14 10:26 ` Marc Zyngier
2013-03-05 3:47 ` [PATCH 11/29] arm64: KVM: virtual CPU reset Marc Zyngier
2013-03-05 3:47 ` [PATCH 12/29] arm64: KVM: kvm_arch and kvm_vcpu_arch definitions Marc Zyngier
2013-03-12 17:30 ` Christopher Covington
2013-03-05 3:47 ` [PATCH 13/29] arm64: KVM: MMIO access backend Marc Zyngier
2013-03-05 3:47 ` [PATCH 14/29] arm64: KVM: guest one-reg interface Marc Zyngier
2013-03-12 17:31 ` Christopher Covington
2013-03-12 18:05 ` Marc Zyngier
2013-03-12 22:07 ` Christopher Covington
2013-03-13 7:48 ` Marc Zyngier
2013-03-13 20:34 ` Christopher Covington
2013-03-14 8:57 ` [kvmarm] " Peter Maydell
2013-03-20 20:06 ` Christopher Covington
2013-03-05 3:47 ` [PATCH 15/29] arm64: KVM: hypervisor initialization code Marc Zyngier
2013-03-05 3:47 ` [PATCH 16/29] arm64: KVM: HYP mode world switch implementation Marc Zyngier
2013-03-13 19:59 ` Christopher Covington
2013-03-20 20:04 ` Christopher Covington
2013-03-21 11:54 ` Marc Zyngier
2013-03-05 3:47 ` [PATCH 17/29] arm64: KVM: Exit handling Marc Zyngier
2013-03-05 3:47 ` [PATCH 18/29] arm64: KVM: Plug the VGIC Marc Zyngier
2013-03-05 3:47 ` [PATCH 19/29] arm64: KVM: Plug the arch timer Marc Zyngier
2013-03-05 3:47 ` [PATCH 20/29] arm64: KVM: PSCI implementation Marc Zyngier
2013-03-05 3:47 ` [PATCH 21/29] arm64: KVM: Build system integration Marc Zyngier
2013-03-05 3:47 ` Marc Zyngier [this message]
2013-03-18 17:03 ` [PATCH 22/29] arm64: KVM: define 32bit specific registers Christopher Covington
2013-03-05 3:47 ` [PATCH 23/29] arm64: KVM: 32bit GP register access Marc Zyngier
2013-03-16 0:24 ` Geoff Levand
2013-03-05 3:47 ` [PATCH 24/29] arm64: KVM: 32bit conditional execution emulation Marc Zyngier
2013-03-18 17:04 ` Christopher Covington
2013-03-05 3:47 ` [PATCH 25/29] arm64: KVM: 32bit handling of coprocessor traps Marc Zyngier
2013-03-05 3:47 ` [PATCH 26/29] arm64: KVM: 32bit coprocessor access for Cortex-A57 Marc Zyngier
2013-03-05 3:47 ` [PATCH 27/29] arm64: KVM: 32bit specific register world switch Marc Zyngier
2013-03-05 3:47 ` [PATCH 28/29] arm64: KVM: 32bit guest fault injection Marc Zyngier
2013-03-18 18:45 ` Christopher Covington
2013-03-05 3:47 ` [PATCH 29/29] arm64: KVM: enable initialization of a 32bit vcpu Marc Zyngier
2013-03-18 18:56 ` Christopher Covington
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