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From: cov@codeaurora.org (Christopher Covington)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 14/29] arm64: KVM: guest one-reg interface
Date: Wed, 13 Mar 2013 16:34:08 -0400	[thread overview]
Message-ID: <5140E2C0.7010009@codeaurora.org> (raw)
In-Reply-To: <51402F52.6020808@arm.com>

Hi Marc,

On 03/13/2013 03:48 AM, Marc Zyngier wrote:
> On 12/03/13 22:07, Christopher Covington wrote:
> 
> Hi Christopher,
> 
>> On 03/12/2013 02:05 PM, Marc Zyngier wrote:
>>> On 12/03/13 17:31, Christopher Covington wrote:
>>>> Hi Marc,
>>>>
>>>> On 03/04/2013 10:47 PM, Marc Zyngier wrote:
>>>>> Let userspace play with the guest registers.
>>>>>
>>>>> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
>>>>> ---
>>>>>  arch/arm64/kvm/guest.c | 240 +++++++++++++++++++++++++++++++++++++++++++++++++
>>>>>  1 file changed, 240 insertions(+)
>>>>>  create mode 100644 arch/arm64/kvm/guest.c
>>>>
>>>> [...]
>>>>
>>>>> +int __attribute_const__ kvm_target_cpu(void)
>>>>> +{
>>>>> +	unsigned long implementor = read_cpuid_implementor();
>>>>> +	unsigned long part_number = read_cpuid_part_number();
>>>>> +
>>>>> +	if (implementor != ARM_CPU_IMP_ARM)
>>>>> +		return -EINVAL;
>>>>> +
>>>>> +	switch (part_number) {
>>>>> +	case ARM_CPU_PART_AEM_V8:
>>>>> +	case ARM_CPU_PART_FOUNDATION:
>>>>> +		/* Treat the models just as an A57 for the time being */
>>>>> +	case ARM_CPU_PART_CORTEX_A57:
>>>>> +		return KVM_ARM_TARGET_CORTEX_A57;
>>>>> +	default:
>>>>> +		return -EINVAL;
>>>>> +	}
>>>>> +}
>>>>
>>>> What is the motivation behind these checks? Why not let any ARMv8 system that
>>>> has EL2 host a virtualized Cortex A57 guest?
>>>
>>> The main reason is errata management. How do you deal with errata in the
>>> guest when you hide the underlying host CPU? I don't have an answer to
>>> that. So for the time being, we only allow the guest to see the same CPU
>>> as the host, and require that new CPUs are added to this function.
>>
>> Can you please elaborate on how this code ensures the guest is seeing the same
>> CPU as the host? It looks rather unlike VPIDR = MIDR.
> 
> I was merely elaborating on the "why". For the how:
> - vmidr_el2 is set in arch/arm64/kernel/head.S and never changed,
> ensuring the guest sees the same thing as the kernel.
> - Some additional code in guest.c ensures that both the host and the CPU
> requested by userspace for the guest are the same
> - KVM_ARM_TARGET_CORTEX_A57 is used in sys_regs_a57.c to register the
> sys_reg/cp15 handlers.

As I believe your response indicates, the code cited above in this email isn't
ensuring that the host is the same as the guest. That's done elsewhere. The
code here is doing something different, something that seems to me is going to
make building upon the ARM64 KVM infrastructure more of a hassle than it
should be.

My guess at the goal of the code cited above in this email is that it's trying
to sanity check that virtualization will work. Rather than taking a default
deny approach with a hand-maintained white list of virtualization-supporting
machine identifiers, why not check that EL2 is implemented on the current
system and if it's not implied by that, that the timer and interrupt
controller are suitable as well?

Thanks,
Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
the Linux Foundation

  reply	other threads:[~2013-03-13 20:34 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-05  3:47 [PATCH 00/29] Port of KVM to arm64 Marc Zyngier
2013-03-05  3:47 ` [PATCH 01/29] arm64: KVM: define HYP and Stage-2 translation page flags Marc Zyngier
2013-03-05  3:47 ` [PATCH 02/29] arm64: KVM: HYP mode idmap support Marc Zyngier
2013-03-05  3:47 ` [PATCH 03/29] arm64: KVM: EL2 register definitions Marc Zyngier
2013-03-05  3:47 ` [PATCH 04/29] arm64: KVM: system register definitions for 64bit guests Marc Zyngier
2013-03-07 10:33   ` [kvmarm] " Alexander Graf
2013-03-08  3:23     ` Marc Zyngier
2013-03-12 13:20   ` Christopher Covington
2013-03-12 13:41     ` Christopher Covington
2013-03-12 13:50     ` Marc Zyngier
2013-03-05  3:47 ` [PATCH 05/29] arm64: KVM: Basic ESR_EL2 helpers and vcpu register access Marc Zyngier
2013-03-16  0:55   ` Geoff Levand
2013-03-05  3:47 ` [PATCH 06/29] arm64: KVM: fault injection into a guest Marc Zyngier
2013-03-12 13:20   ` Christopher Covington
2013-03-12 14:25     ` Marc Zyngier
2013-03-16  1:03   ` Geoff Levand
2013-03-05  3:47 ` [PATCH 07/29] arm64: KVM: architecture specific MMU backend Marc Zyngier
2013-03-05  3:47 ` [PATCH 08/29] arm64: KVM: user space interface Marc Zyngier
2013-03-07  8:09   ` Michael S. Tsirkin
2013-03-08  3:46     ` [kvmarm] " Marc Zyngier
2013-03-10  9:23       ` Michael S. Tsirkin
2013-03-05  3:47 ` [PATCH 09/29] arm64: KVM: system register handling Marc Zyngier
2013-03-07 10:30   ` [kvmarm] " Alexander Graf
2013-03-08  3:29     ` Marc Zyngier
2013-03-25  8:19     ` Marc Zyngier
2013-04-23 23:07       ` Christoffer Dall
2013-03-05  3:47 ` [PATCH 10/29] arm64: KVM: Cortex-A57 specific system registers handling Marc Zyngier
2013-03-13 18:30   ` Christopher Covington
2013-03-14 10:26     ` Marc Zyngier
2013-03-05  3:47 ` [PATCH 11/29] arm64: KVM: virtual CPU reset Marc Zyngier
2013-03-05  3:47 ` [PATCH 12/29] arm64: KVM: kvm_arch and kvm_vcpu_arch definitions Marc Zyngier
2013-03-12 17:30   ` Christopher Covington
2013-03-05  3:47 ` [PATCH 13/29] arm64: KVM: MMIO access backend Marc Zyngier
2013-03-05  3:47 ` [PATCH 14/29] arm64: KVM: guest one-reg interface Marc Zyngier
2013-03-12 17:31   ` Christopher Covington
2013-03-12 18:05     ` Marc Zyngier
2013-03-12 22:07       ` Christopher Covington
2013-03-13  7:48         ` Marc Zyngier
2013-03-13 20:34           ` Christopher Covington [this message]
2013-03-14  8:57             ` [kvmarm] " Peter Maydell
2013-03-20 20:06               ` Christopher Covington
2013-03-05  3:47 ` [PATCH 15/29] arm64: KVM: hypervisor initialization code Marc Zyngier
2013-03-05  3:47 ` [PATCH 16/29] arm64: KVM: HYP mode world switch implementation Marc Zyngier
2013-03-13 19:59   ` Christopher Covington
2013-03-20 20:04     ` Christopher Covington
2013-03-21 11:54       ` Marc Zyngier
2013-03-05  3:47 ` [PATCH 17/29] arm64: KVM: Exit handling Marc Zyngier
2013-03-05  3:47 ` [PATCH 18/29] arm64: KVM: Plug the VGIC Marc Zyngier
2013-03-05  3:47 ` [PATCH 19/29] arm64: KVM: Plug the arch timer Marc Zyngier
2013-03-05  3:47 ` [PATCH 20/29] arm64: KVM: PSCI implementation Marc Zyngier
2013-03-05  3:47 ` [PATCH 21/29] arm64: KVM: Build system integration Marc Zyngier
2013-03-05  3:47 ` [PATCH 22/29] arm64: KVM: define 32bit specific registers Marc Zyngier
2013-03-18 17:03   ` Christopher Covington
2013-03-05  3:47 ` [PATCH 23/29] arm64: KVM: 32bit GP register access Marc Zyngier
2013-03-16  0:24   ` Geoff Levand
2013-03-05  3:47 ` [PATCH 24/29] arm64: KVM: 32bit conditional execution emulation Marc Zyngier
2013-03-18 17:04   ` Christopher Covington
2013-03-05  3:47 ` [PATCH 25/29] arm64: KVM: 32bit handling of coprocessor traps Marc Zyngier
2013-03-05  3:47 ` [PATCH 26/29] arm64: KVM: 32bit coprocessor access for Cortex-A57 Marc Zyngier
2013-03-05  3:47 ` [PATCH 27/29] arm64: KVM: 32bit specific register world switch Marc Zyngier
2013-03-05  3:47 ` [PATCH 28/29] arm64: KVM: 32bit guest fault injection Marc Zyngier
2013-03-18 18:45   ` Christopher Covington
2013-03-05  3:47 ` [PATCH 29/29] arm64: KVM: enable initialization of a 32bit vcpu Marc Zyngier
2013-03-18 18:56   ` Christopher Covington

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