* [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup
@ 2013-03-06 18:28 Stephen Warren
2013-03-06 18:28 ` [PATCH V2 2/6] ARM: tegra: fix sort order of USB PHY nodes Stephen Warren
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Remove white-space from empty line; triggers checkpatch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
Patches 3 and later in his series depends on the kbuild-related series I
just posted to rework the dtc+cpp logic. I hope to apply them to the Tegra
tree after merging the previous series from the arm-soc topic branch.
Patches 1 and 2 are just cleanup that the others depend on.
arch/arm/boot/dts/tegra20.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 48d00a0..ab9402a 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -208,7 +208,7 @@
compatible = "nvidia,tegra20-das";
reg = <0x70000c00 0x80>;
};
-
+
tegra_ac97: ac97 {
compatible = "nvidia,tegra20-ac97";
reg = <0x70002000 0x200>;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 2/6] ARM: tegra: fix sort order of USB PHY nodes
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
@ 2013-03-06 18:28 ` Stephen Warren
2013-03-06 18:28 ` [PATCH V2 3/6] ARM: tegra: use #include for all device trees Stephen Warren
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
The USB PHY nodes are all grouped together rather than being sorted based
on reg address like all other nodes fix this.
I apologize for the churn; I should have noticed this during review of the
patches that caused this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/boot/dts/tegra20.dtsi | 50 ++++++++++++++++++++--------------------
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index ab9402a..7708975 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -438,31 +438,6 @@
#size-cells = <0>;
};
- phy1: usb-phy at c5000400 {
- compatible = "nvidia,tegra20-usb-phy";
- reg = <0xc5000400 0x3c00>;
- phy_type = "utmi";
- nvidia,has-legacy-mode;
- clocks = <&tegra_car 22>, <&tegra_car 127>;
- clock-names = "phy", "pll_u";
- };
-
- phy2: usb-phy at c5004400 {
- compatible = "nvidia,tegra20-usb-phy";
- reg = <0xc5004400 0x3c00>;
- phy_type = "ulpi";
- clocks = <&tegra_car 94>, <&tegra_car 127>;
- clock-names = "phy", "pll_u";
- };
-
- phy3: usb-phy at c5008400 {
- compatible = "nvidia,tegra20-usb-phy";
- reg = <0xc5008400 0x3C00>;
- phy_type = "utmi";
- clocks = <&tegra_car 22>, <&tegra_car 127>;
- clock-names = "phy", "pll_u";
- };
-
usb at c5000000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5000000 0x4000>;
@@ -475,6 +450,15 @@
status = "disabled";
};
+ phy1: usb-phy at c5000400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5000400 0x3c00>;
+ phy_type = "utmi";
+ nvidia,has-legacy-mode;
+ clocks = <&tegra_car 22>, <&tegra_car 127>;
+ clock-names = "phy", "pll_u";
+ };
+
usb at c5004000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5004000 0x4000>;
@@ -485,6 +469,14 @@
status = "disabled";
};
+ phy2: usb-phy at c5004400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5004400 0x3c00>;
+ phy_type = "ulpi";
+ clocks = <&tegra_car 94>, <&tegra_car 127>;
+ clock-names = "phy", "pll_u";
+ };
+
usb at c5008000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5008000 0x4000>;
@@ -495,6 +487,14 @@
status = "disabled";
};
+ phy3: usb-phy at c5008400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5008400 0x3c00>;
+ phy_type = "utmi";
+ clocks = <&tegra_car 22>, <&tegra_car 127>;
+ clock-names = "phy", "pll_u";
+ };
+
sdhci at c8000000 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000000 0x200>;
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 3/6] ARM: tegra: use #include for all device trees
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
2013-03-06 18:28 ` [PATCH V2 2/6] ARM: tegra: fix sort order of USB PHY nodes Stephen Warren
@ 2013-03-06 18:28 ` Stephen Warren
2013-03-06 18:28 ` [PATCH V2 4/6] ARM: tegra: create a DT header defining GPIO IDs Stephen Warren
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.
This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Just change the include syntax. Don't rename any files.
---
arch/arm/boot/dts/tegra114-dalmore.dts | 2 +-
arch/arm/boot/dts/tegra114-pluto.dts | 2 +-
arch/arm/boot/dts/tegra114.dtsi | 2 +-
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 2 +-
arch/arm/boot/dts/tegra20-iris-512.dts | 2 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts | 2 +-
arch/arm/boot/dts/tegra20-plutux.dts | 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 2 +-
arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +-
arch/arm/boot/dts/tegra20-tec.dts | 2 +-
arch/arm/boot/dts/tegra20-trimslice.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 2 +-
arch/arm/boot/dts/tegra20-whistler.dts | 2 +-
arch/arm/boot/dts/tegra20.dtsi | 2 +-
arch/arm/boot/dts/tegra30-beaver.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu-a02.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu-a04.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +-
arch/arm/boot/dts/tegra30.dtsi | 2 +-
21 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts
index a30aca6..62cd1b2 100644
--- a/arch/arm/boot/dts/tegra114-dalmore.dts
+++ b/arch/arm/boot/dts/tegra114-dalmore.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra114.dtsi"
+#include "tegra114.dtsi"
/ {
model = "NVIDIA Tegra114 Dalmore evaluation board";
diff --git a/arch/arm/boot/dts/tegra114-pluto.dts b/arch/arm/boot/dts/tegra114-pluto.dts
index 9bea8f5..9e95cb3 100644
--- a/arch/arm/boot/dts/tegra114-pluto.dts
+++ b/arch/arm/boot/dts/tegra114-pluto.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra114.dtsi"
+#include "tegra114.dtsi"
/ {
model = "NVIDIA Tegra114 Pluto evaluation board";
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 1dfaf28..d2150f0 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -1,4 +1,4 @@
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
compatible = "nvidia,tegra114";
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index 4441620..d77252c 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -1,4 +1,4 @@
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "Toradex Colibri T20 512MB";
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 61d027f..a4d0d78 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Harmony evaluation board";
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
index 52f1103..248f7ea 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20-colibri-512.dtsi"
+#include "tegra20-colibri-512.dtsi"
/ {
model = "Toradex Colibri T20 512MB on Iris";
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index a2d6d65..10aa386 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20-tamonten.dtsi"
+#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Medcom-Wide board";
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 54d6fce..13a2118 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "Toshiba AC100 / Dynabook AZ";
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index 2894800..eca914e 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20-tamonten.dtsi"
+#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Plutux board";
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 37b3a57..74716c9 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "NVIDIA Seaboard";
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 4766aba..855f65d 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -1,4 +1,4 @@
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "Avionic Design Tamonten SOM";
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index 402b210..aaca293 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20-tamonten.dtsi"
+#include "tegra20-tamonten.dtsi"
/ {
model = "Avionic Design Tamonten Evaluation Carrier";
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index 5d79e4f..af2a874 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "Compulab TrimSlice board";
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index 425c890..b5251db 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index ea57c0f..f1d92c1 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra20.dtsi"
+#include "tegra20.dtsi"
/ {
model = "NVIDIA Tegra20 Whistler evaluation board";
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 7708975..0bff930 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -1,4 +1,4 @@
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
compatible = "nvidia,tegra20";
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 8ff2ff2..89b46c1 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra30.dtsi"
+#include "tegra30.dtsi"
/ {
model = "NVIDIA Tegra30 Beaver evaluation board";
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index adc88aa..814359e 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra30-cardhu.dtsi"
+#include "tegra30-cardhu.dtsi"
/* This dts file support the cardhu A02 version of board */
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 08163e1..4ac31ec 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -1,6 +1,6 @@
/dts-v1/;
-/include/ "tegra30-cardhu.dtsi"
+#include "tegra30-cardhu.dtsi"
/* This dts file support the cardhu A04 and later versions of board */
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 1749927..51a24cc 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -1,4 +1,4 @@
-/include/ "tegra30.dtsi"
+#include "tegra30.dtsi"
/**
* This file contains common DT entry for all fab version of Cardhu.
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 9d87a3f..f474b6e 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,4 +1,4 @@
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
/ {
compatible = "nvidia,tegra30";
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 4/6] ARM: tegra: create a DT header defining GPIO IDs
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
2013-03-06 18:28 ` [PATCH V2 2/6] ARM: tegra: fix sort order of USB PHY nodes Stephen Warren
2013-03-06 18:28 ` [PATCH V2 3/6] ARM: tegra: use #include for all device trees Stephen Warren
@ 2013-03-06 18:28 ` Stephen Warren
2013-03-06 18:28 ` [PATCH V2 5/6] ARM: tegra: convert device tree files to use GPIO defines Stephen Warren
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
All Tegra GPIOs are named after the GPIO bank and GPIO number within
the bank. Define a macro to calculate the GPIO ID based on those
parameters. Make the macro available via all Tegra .dtsip files.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Moved header file. Added include guard. Limit patch to just creating
the new header file.
---
include/dt-bindings/gpio/tegra-gpio.h | 50 +++++++++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 include/dt-bindings/gpio/tegra-gpio.h
diff --git a/include/dt-bindings/gpio/tegra-gpio.h b/include/dt-bindings/gpio/tegra-gpio.h
new file mode 100644
index 0000000..4d179c0
--- /dev/null
+++ b/include/dt-bindings/gpio/tegra-gpio.h
@@ -0,0 +1,50 @@
+/*
+ * This header provides constants for binding nvidia,tegra*-gpio.
+ *
+ * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
+ * provide names for this.
+ *
+ * The second cell contains standard flag values specified in gpio.h.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
+#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+#define TEGRA_GPIO_BANK_ID_A 0
+#define TEGRA_GPIO_BANK_ID_B 1
+#define TEGRA_GPIO_BANK_ID_C 2
+#define TEGRA_GPIO_BANK_ID_D 3
+#define TEGRA_GPIO_BANK_ID_E 4
+#define TEGRA_GPIO_BANK_ID_F 5
+#define TEGRA_GPIO_BANK_ID_G 6
+#define TEGRA_GPIO_BANK_ID_H 7
+#define TEGRA_GPIO_BANK_ID_I 8
+#define TEGRA_GPIO_BANK_ID_J 9
+#define TEGRA_GPIO_BANK_ID_K 10
+#define TEGRA_GPIO_BANK_ID_L 11
+#define TEGRA_GPIO_BANK_ID_M 12
+#define TEGRA_GPIO_BANK_ID_N 13
+#define TEGRA_GPIO_BANK_ID_O 14
+#define TEGRA_GPIO_BANK_ID_P 15
+#define TEGRA_GPIO_BANK_ID_Q 16
+#define TEGRA_GPIO_BANK_ID_R 17
+#define TEGRA_GPIO_BANK_ID_S 18
+#define TEGRA_GPIO_BANK_ID_T 19
+#define TEGRA_GPIO_BANK_ID_U 20
+#define TEGRA_GPIO_BANK_ID_V 21
+#define TEGRA_GPIO_BANK_ID_W 22
+#define TEGRA_GPIO_BANK_ID_X 23
+#define TEGRA_GPIO_BANK_ID_Y 24
+#define TEGRA_GPIO_BANK_ID_Z 25
+#define TEGRA_GPIO_BANK_ID_AA 26
+#define TEGRA_GPIO_BANK_ID_BB 27
+#define TEGRA_GPIO_BANK_ID_CC 28
+#define TEGRA_GPIO_BANK_ID_DD 29
+#define TEGRA_GPIO_BANK_ID_EE 30
+
+#define TEGRA_GPIO(bank, offset) \
+ ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)
+
+#endif
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 5/6] ARM: tegra: convert device tree files to use GPIO defines
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
` (2 preceding siblings ...)
2013-03-06 18:28 ` [PATCH V2 4/6] ARM: tegra: create a DT header defining GPIO IDs Stephen Warren
@ 2013-03-06 18:28 ` Stephen Warren
2013-03-06 18:28 ` [PATCH V2 6/6] ARM: tegra: convert device tree files to use IRQ defines Stephen Warren
2013-03-06 20:25 ` [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
v2: Move addition of #include of tegra-gpio.h into this patch.
---
arch/arm/boot/dts/tegra114.dtsi | 2 ++
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 16 ++++++++-----
arch/arm/boot/dts/tegra20-harmony.dts | 36 ++++++++++++++++------------
arch/arm/boot/dts/tegra20-iris-512.dts | 2 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 4 ++--
arch/arm/boot/dts/tegra20-paz00.dts | 24 +++++++++++--------
arch/arm/boot/dts/tegra20-plutux.dts | 4 ++--
arch/arm/boot/dts/tegra20-seaboard.dts | 33 +++++++++++++------------
arch/arm/boot/dts/tegra20-tamonten.dtsi | 7 +++---
arch/arm/boot/dts/tegra20-tec.dts | 5 ++--
arch/arm/boot/dts/tegra20-trimslice.dts | 17 +++++++------
arch/arm/boot/dts/tegra20-ventana.dts | 33 ++++++++++++++-----------
arch/arm/boot/dts/tegra20-whistler.dts | 5 ++--
arch/arm/boot/dts/tegra20.dtsi | 2 ++
arch/arm/boot/dts/tegra30-beaver.dts | 14 +++++------
arch/arm/boot/dts/tegra30-cardhu-a02.dts | 8 +++----
arch/arm/boot/dts/tegra30-cardhu-a04.dts | 10 ++++----
arch/arm/boot/dts/tegra30-cardhu.dtsi | 35 ++++++++++++++-------------
arch/arm/boot/dts/tegra30.dtsi | 2 ++
19 files changed, 147 insertions(+), 112 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index d2150f0..116a1b1 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
#include "skeleton.dtsi"
/ {
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index d77252c..d393f7a 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -14,7 +14,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&i2c_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -434,17 +435,20 @@
ac97: ac97 {
status = "okay";
- nvidia,codec-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
- nvidia,codec-sync-gpio = <&gpio 120 0>; /* gpio PP0 */
+ nvidia,codec-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
+ GPIO_ACTIVE_HIGH>;
+ nvidia,codec-sync-gpio = <&gpio TEGRA_GPIO(P, 0)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000600 {
- cd-gpios = <&gpio 23 0>; /* gpio PC7 */
+ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
};
sound {
@@ -485,7 +489,7 @@
enable-active-high;
regulator-boot-on;
regulator-always-on;
- gpio = <&gpio 217 0>;
+ gpio = <&gpio TEGRA_GPIO(BB, 1) GPIO_ACTIVE_HIGH>;
};
};
};
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index a4d0d78..746071f 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -262,7 +263,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -424,7 +425,8 @@
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5008000 {
@@ -432,22 +434,23 @@
};
usb-phy at c5004400 {
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000200 {
status = "okay";
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
- wp-gpios = <&gpio 57 0>; /* gpio PH1 */
- power-gpios = <&gpio 155 0>; /* gpio PT3 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci at c8000600 {
status = "okay";
- cd-gpios = <&gpio 58 0>; /* gpio PH2 */
- wp-gpios = <&gpio 59 0>; /* gpio PH3 */
- power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
bus-width = <8>;
};
@@ -619,7 +622,7 @@
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
- gpio = <&gpio 22 0>; /* gpio PC6 */
+ gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
@@ -629,7 +632,7 @@
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
- gpio = <&gpio 176 0>; /* gpio PW0 */
+ gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
@@ -653,8 +656,11 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
- nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
+ GPIO_ACTIVE_HIGH>;
+ nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
+ GPIO_ACTIVE_HIGH>;
+ nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
+ GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts
index 248f7ea..f1c5a64 100644
--- a/arch/arm/boot/dts/tegra20-iris-512.dts
+++ b/arch/arm/boot/dts/tegra20-iris-512.dts
@@ -73,7 +73,7 @@
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
- gpio = <&gpio 178 0>;
+ gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
};
vcc_sd_reg: regulator at 1 {
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index 10aa386..4ba8638 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -11,7 +11,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -53,6 +53,6 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 13a2118..40c916b 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -274,7 +275,7 @@
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <80000>;
- request-gpios = <&gpio 170 0>; /* gpio PV2 */
+ request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
slave-addr = <138>;
clocks = <&tegra_car 67>, <&tegra_car 124>;
clock-names = "div-clk", "fast-clk";
@@ -423,7 +424,8 @@
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5008000 {
@@ -431,14 +433,15 @@
};
usb-phy at c5004400 {
- nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000000 {
status = "okay";
- cd-gpios = <&gpio 173 0>; /* gpio PV5 */
- wp-gpios = <&gpio 57 0>; /* gpio PH1 */
- power-gpios = <&gpio 169 0>; /* gpio PV1 */
+ cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
@@ -452,7 +455,7 @@
power {
label = "Power";
- gpios = <&gpio 79 1>; /* gpio PJ7, active low */
+ gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
@@ -463,7 +466,7 @@
wifi {
label = "wifi-led";
- gpios = <&gpio 24 0>; /* gpio PD0 */
+ gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
linux,default-trigger = "rfkill0";
};
};
@@ -500,6 +503,7 @@
nvidia,audio-codec = <&alc5632>;
nvidia,i2s-controller = <&tegra_i2s1>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
+ GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index eca914e..a26d487 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -17,7 +17,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -51,6 +51,6 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index 74716c9..c5d3ffa 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -313,7 +314,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -328,14 +329,14 @@
compatible = "isil,isl29018";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <202 0x04>; /* GPIO PZ2 */
+ interrupts = <TEGRA_GPIO(Z, 2) 0x04>;
};
gyrometer at 68 {
compatible = "invn,mpu3050";
reg = <0x68>;
interrupt-parent = <&gpio>;
- interrupts = <204 0x04>; /* gpio PZ4 */
+ interrupts = <TEGRA_GPIO(Z, 4) 0x04>;
};
};
@@ -511,7 +512,7 @@
compatible = "ak,ak8975";
reg = <0xc>;
interrupt-parent = <&gpio>;
- interrupts = <109 0x04>; /* gpio PN5 */
+ interrupts = <TEGRA_GPIO(N, 5) 0x04>;
};
};
@@ -559,13 +560,14 @@
usb at c5000000 {
status = "okay";
- nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
+ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
dr_mode = "otg";
};
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5008000 {
@@ -573,20 +575,21 @@
};
usb-phy at c5004400 {
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000000 {
status = "okay";
- power-gpios = <&gpio 86 0>; /* gpio PK6 */
+ power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci at c8000400 {
status = "okay";
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
- wp-gpios = <&gpio 57 0>; /* gpio PH1 */
- power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
@@ -600,14 +603,14 @@
power {
label = "Power";
- gpios = <&gpio 170 1>; /* gpio PV2, active low */
+ gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
linux,code = <116>; /* KEY_POWER */
gpio-key,wakeup;
};
lid {
label = "Lid";
- gpios = <&gpio 23 0>; /* gpio PC7 */
+ gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
linux,input-type = <5>; /* EV_SW */
linux,code = <0>; /* SW_LID */
debounce-interval = <1>;
@@ -807,6 +810,6 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 855f65d..4ea5c90 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -14,7 +14,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -465,8 +466,8 @@
};
sdhci at c8000600 {
- cd-gpios = <&gpio 58 0>; /* gpio PH2 */
- wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+ cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index aaca293..6542806 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -17,7 +17,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -51,6 +51,7 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
+ GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts
index af2a874..c7e65d9 100644
--- a/arch/arm/boot/dts/tegra20-trimslice.dts
+++ b/arch/arm/boot/dts/tegra20-trimslice.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -302,12 +303,13 @@
usb at c5000000 {
status = "okay";
- nvidia,vbus-gpio = <&gpio 170 0>; /* gpio PV2 */
+ nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
};
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5008000 {
@@ -315,7 +317,8 @@
};
usb-phy at c5004400 {
- nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000000 {
@@ -325,14 +328,14 @@
sdhci at c8000600 {
status = "okay";
- cd-gpios = <&gpio 121 0>; /* gpio PP1 */
- wp-gpios = <&gpio 122 0>; /* gpio PP2 */
+ cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
poweroff {
compatible = "gpio-poweroff";
- gpios = <&gpio 191 1>; /* gpio PX7, active low */
+ gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
};
regulators {
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index b5251db..ba746b8 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -310,7 +311,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <187 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -325,7 +326,7 @@
compatible = "isil,isl29018";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <202 0x04>; /*gpio PZ2 */
+ interrupts = <TEGRA_GPIO(Z, 2) 0x04>;
};
};
@@ -501,7 +502,8 @@
usb at c5004000 {
status = "okay";
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
usb at c5008000 {
@@ -509,20 +511,21 @@
};
usb-phy at c5004400 {
- nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
+ GPIO_ACTIVE_HIGH>;
};
sdhci at c8000000 {
status = "okay";
- power-gpios = <&gpio 86 0>; /* gpio PK6 */
+ power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci at c8000400 {
status = "okay";
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
- wp-gpios = <&gpio 57 0>; /* gpio PH1 */
- power-gpios = <&gpio 70 0>; /* gpio PI6 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
@@ -570,7 +573,7 @@
regulator-name = "vdd_pnl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
- gpio = <&gpio 22 0>; /* gpio PC6 */
+ gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
@@ -580,7 +583,7 @@
regulator-name = "vdd_bl";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
- gpio = <&gpio 176 0>; /* gpio PW0 */
+ gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
@@ -604,8 +607,10 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
- nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
- nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
+ nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
+ GPIO_ACTIVE_HIGH>;
+ nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
+ GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index f1d92c1..867722c 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -18,7 +18,8 @@
pll-supply = <&hdmi_pll_reg>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
- nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
+ nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
+ GPIO_ACTIVE_HIGH>;
};
};
@@ -510,7 +511,7 @@
sdhci at c8000400 {
status = "okay";
- wp-gpios = <&gpio 173 0>; /* gpio PV5 */
+ wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
bus-width = <8>;
};
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 0bff930..5d30e10 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
#include "skeleton.dtsi"
/ {
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 89b46c1..6a52822 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -257,9 +257,9 @@
sdhci at 78000000 {
status = "okay";
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
- wp-gpios = <&gpio 155 0>; /* gpio PT3 */
- power-gpios = <&gpio 31 0>; /* gpio PD7 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
@@ -316,7 +316,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 30 0>; /* gpio PD6 */
+ gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&vdd_5v_in_reg>;
};
@@ -327,7 +327,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 68 0>; /* GPIO PI4 */
+ gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
@@ -339,7 +339,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 63 0>; /* GPIO PH7 */
+ gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v_in_reg>;
};
@@ -366,7 +366,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 95 0>; /* gpio PL7 */
+ gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
index 814359e..1cec0a6 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts
@@ -44,7 +44,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 68 0>; /* GPIO PI4 */
+ gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
@@ -56,7 +56,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 63 0>; /* GPIO PH7 */
+ gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
@@ -80,13 +80,13 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 83 0>; /* GPIO PK3 */
+ gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>;
};
};
sdhci at 78000400 {
status = "okay";
- power-gpios = <&gpio 28 0>; /* gpio PD4 */
+ power-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
index 4ac31ec..5b263b7 100644
--- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts
+++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts
@@ -44,7 +44,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 238 0>; /* GPIO PDD6 */
+ gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
@@ -56,7 +56,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 236 0>; /* GPIO PDD4 */
+ gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
@@ -80,7 +80,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 234 0>; /* GPIO PDD2 */
+ gpio = <&gpio TEGRA_GPIO(DD, 2) GPIO_ACTIVE_HIGH>;
};
vdd_bl2_reg: regulator at 106 {
@@ -92,13 +92,13 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 232 0>; /* GPIO PDD0 */
+ gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
};
};
sdhci at 78000400 {
status = "okay";
- power-gpios = <&gpio 27 0>; /* gpio PD3 */
+ power-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index 51a24cc..ac1bb88 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -146,7 +146,7 @@
compatible = "isil,isl29028";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <88 0x04>; /*gpio PL0 */
+ interrupts = <TEGRA_GPIO(L, 0) 0x04>;
};
};
@@ -163,7 +163,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <179 0x04>; /* gpio PW3 */
+ interrupts = <TEGRA_GPIO(W, 3) 0x04>;
gpio-controller;
#gpio-cells = <2>;
@@ -311,9 +311,9 @@
sdhci at 78000000 {
status = "okay";
- cd-gpios = <&gpio 69 0>; /* gpio PI5 */
- wp-gpios = <&gpio 155 0>; /* gpio PT3 */
- power-gpios = <&gpio 31 0>; /* gpio PD7 */
+ cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
+ power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
@@ -343,7 +343,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
enable-active-high;
- gpio = <&gpio 220 0>; /* gpio PBB4 */
+ gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&vio_reg>;
};
@@ -368,7 +368,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 25 0>; /* gpio PD1 */
+ gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -379,7 +379,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
- gpio = <&gpio 30 0>; /* gpio PD6 */
+ gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
};
pex_hvdd_3v3_reg: regulator at 5 {
@@ -389,7 +389,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
- gpio = <&gpio 95 0>; /* gpio PL7 */
+ gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -400,7 +400,7 @@
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
- gpio = <&gpio 142 0>; /* gpio PR6 */
+ gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -411,7 +411,7 @@
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
enable-active-high;
- gpio = <&gpio 143 0>; /* gpio PR7 */
+ gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -422,7 +422,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
- gpio = <&gpio 144 0>; /* gpio PS0 */
+ gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -435,7 +435,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 24 0>; /* gpio PD0 */
+ gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -446,7 +446,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
- gpio = <&gpio 94 0>; /* gpio PL6 */
+ gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -459,7 +459,7 @@
regulator-always-on;
regulator-boot-on;
enable-active-high;
- gpio = <&gpio 92 0>; /* gpio PL4 */
+ gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
vin-supply = <&sys_3v3_reg>;
};
@@ -470,7 +470,7 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
- gpio = <&gpio 152 0>; /* GPIO PT0 */
+ gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
gpio-open-drain;
vin-supply = <&vdd_5v0_reg>;
};
@@ -495,6 +495,7 @@
nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 0>;
- nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
+ nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
+ GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index f474b6e..94b8cf4 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,3 +1,5 @@
+#include <dt-bindings/gpio/tegra-gpio.h>
+
#include "skeleton.dtsi"
/ {
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 6/6] ARM: tegra: convert device tree files to use IRQ defines
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
` (3 preceding siblings ...)
2013-03-06 18:28 ` [PATCH V2 5/6] ARM: tegra: convert device tree files to use GPIO defines Stephen Warren
@ 2013-03-06 18:28 ` Stephen Warren
2013-03-06 20:25 ` [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 18:28 UTC (permalink / raw)
To: linux-arm-kernel
From: Stephen Warren <swarren@nvidia.com>
Use the GIC and standard IRQ binding defines in all IRQ specifiers.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/boot/dts/tegra114.dtsi | 55 +++++----
arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +-
arch/arm/boot/dts/tegra20-harmony.dts | 4 +-
arch/arm/boot/dts/tegra20-medcom-wide.dts | 2 +-
arch/arm/boot/dts/tegra20-paz00.dts | 4 +-
arch/arm/boot/dts/tegra20-plutux.dts | 2 +-
arch/arm/boot/dts/tegra20-seaboard.dts | 10 +-
arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +-
arch/arm/boot/dts/tegra20-tec.dts | 2 +-
arch/arm/boot/dts/tegra20-ventana.dts | 6 +-
arch/arm/boot/dts/tegra20-whistler.dts | 2 +-
arch/arm/boot/dts/tegra20.dtsi | 138 +++++++++++-----------
arch/arm/boot/dts/tegra30-beaver.dts | 2 +-
arch/arm/boot/dts/tegra30-cardhu.dtsi | 6 +-
arch/arm/boot/dts/tegra30.dtsi | 174 ++++++++++++++--------------
15 files changed, 211 insertions(+), 200 deletions(-)
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
index 116a1b1..5e268be 100644
--- a/arch/arm/boot/dts/tegra114.dtsi
+++ b/arch/arm/boot/dts/tegra114.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -14,18 +15,19 @@
<0x50042000 0x1000>,
<0x50044000 0x2000>,
<0x50046000 0x2000>;
- interrupts = <1 9 0xf04>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
timer at 60005000 {
compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
- interrupts = <0 0 0x04
- 0 1 0x04
- 0 41 0x04
- 0 42 0x04
- 0 121 0x04
- 0 122 0x04>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
};
tegra_car: clock {
@@ -42,14 +44,14 @@
gpio: gpio {
compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
reg = <0x6000d000 0x1000>;
- interrupts = <0 32 0x04
- 0 33 0x04
- 0 34 0x04
- 0 35 0x04
- 0 55 0x04
- 0 87 0x04
- 0 89 0x04
- 0 125 0x04>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
@@ -66,7 +68,7 @@
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006000 0x40>;
reg-shift = <2>;
- interrupts = <0 36 0x04>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -74,7 +76,7 @@
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
- interrupts = <0 37 0x04>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -82,7 +84,7 @@
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
- interrupts = <0 46 0x04>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -90,14 +92,14 @@
compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
- interrupts = <0 90 0x04>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
rtc {
compatible = "nvidia,tegra114-rtc", "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
- interrupts = <0 2 0x04>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
};
pmc {
@@ -147,9 +149,14 @@
timer {
compatible = "arm,armv7-timer";
- interrupts = <1 13 0xf08>,
- <1 14 0xf08>,
- <1 11 0xf08>,
- <1 10 0xf08>;
+ interrupts =
+ <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
index d393f7a..af2b341 100644
--- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi
+++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi
@@ -218,7 +218,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts
index 746071f..6d6b5e5 100644
--- a/arch/arm/boot/dts/tegra20-harmony.dts
+++ b/arch/arm/boot/dts/tegra20-harmony.dts
@@ -263,7 +263,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
@@ -291,7 +291,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
diff --git a/arch/arm/boot/dts/tegra20-medcom-wide.dts b/arch/arm/boot/dts/tegra20-medcom-wide.dts
index 4ba8638..edd617d 100644
--- a/arch/arm/boot/dts/tegra20-medcom-wide.dts
+++ b/arch/arm/boot/dts/tegra20-medcom-wide.dts
@@ -11,7 +11,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 40c916b..5c6e06d 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -271,7 +271,7 @@
nvec {
compatible = "nvidia,nvec";
reg = <0x7000c500 0x100>;
- interrupts = <0 92 0x04>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <80000>;
@@ -288,7 +288,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
diff --git a/arch/arm/boot/dts/tegra20-plutux.dts b/arch/arm/boot/dts/tegra20-plutux.dts
index a26d487..769f188 100644
--- a/arch/arm/boot/dts/tegra20-plutux.dts
+++ b/arch/arm/boot/dts/tegra20-plutux.dts
@@ -17,7 +17,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index c5d3ffa..2b40132 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -314,7 +314,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
@@ -329,14 +329,14 @@
compatible = "isil,isl29018";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(Z, 2) 0x04>;
+ interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
};
gyrometer at 68 {
compatible = "invn,mpu3050";
reg = <0x68>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(Z, 4) 0x04>;
+ interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -389,7 +389,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
@@ -512,7 +512,7 @@
compatible = "ak,ak8975";
reg = <0xc>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(N, 5) 0x04>;
+ interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi
index 4ea5c90..de1c022 100644
--- a/arch/arm/boot/dts/tegra20-tamonten.dtsi
+++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi
@@ -322,7 +322,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
diff --git a/arch/arm/boot/dts/tegra20-tec.dts b/arch/arm/boot/dts/tegra20-tec.dts
index 6542806..5f554df 100644
--- a/arch/arm/boot/dts/tegra20-tec.dts
+++ b/arch/arm/boot/dts/tegra20-tec.dts
@@ -17,7 +17,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index ba746b8..c9d7516 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -311,7 +311,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(X, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
@@ -326,7 +326,7 @@
compatible = "isil,isl29018";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(Z, 2) 0x04>;
+ interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -372,7 +372,7 @@
pmic: tps6586x at 34 {
compatible = "ti,tps6586x";
reg = <0x34>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,system-power-controller;
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 867722c..366f147 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -282,7 +282,7 @@
max8907 at 3c {
compatible = "maxim,max8907";
reg = <0x3c>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
maxim,system-power-controller;
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 5d30e10..c0ddba0 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -17,8 +18,8 @@
host1x {
compatible = "nvidia,tegra20-host1x", "simple-bus";
reg = <0x50000000 0x00024000>;
- interrupts = <0 65 0x04 /* mpcore syncpt */
- 0 67 0x04>; /* mpcore general */
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car 28>;
#address-cells = <1>;
@@ -29,35 +30,35 @@
mpe {
compatible = "nvidia,tegra20-mpe";
reg = <0x54040000 0x00040000>;
- interrupts = <0 68 0x04>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 60>;
};
vi {
compatible = "nvidia,tegra20-vi";
reg = <0x54080000 0x00040000>;
- interrupts = <0 69 0x04>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 100>;
};
epp {
compatible = "nvidia,tegra20-epp";
reg = <0x540c0000 0x00040000>;
- interrupts = <0 70 0x04>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 19>;
};
isp {
compatible = "nvidia,tegra20-isp";
reg = <0x54100000 0x00040000>;
- interrupts = <0 71 0x04>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 23>;
};
gr2d {
compatible = "nvidia,tegra20-gr2d";
reg = <0x54140000 0x00040000>;
- interrupts = <0 72 0x04>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 21>;
};
@@ -70,7 +71,7 @@
dc at 54200000 {
compatible = "nvidia,tegra20-dc";
reg = <0x54200000 0x00040000>;
- interrupts = <0 73 0x04>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 27>, <&tegra_car 121>;
clock-names = "disp1", "parent";
@@ -82,7 +83,7 @@
dc at 54240000 {
compatible = "nvidia,tegra20-dc";
reg = <0x54240000 0x00040000>;
- interrupts = <0 74 0x04>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 26>, <&tegra_car 121>;
clock-names = "disp2", "parent";
@@ -94,7 +95,7 @@
hdmi {
compatible = "nvidia,tegra20-hdmi";
reg = <0x54280000 0x00040000>;
- interrupts = <0 75 0x04>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 51>, <&tegra_car 117>;
clock-names = "hdmi", "parent";
status = "disabled";
@@ -103,7 +104,7 @@
tvo {
compatible = "nvidia,tegra20-tvo";
reg = <0x542c0000 0x00040000>;
- interrupts = <0 76 0x04>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 102>;
status = "disabled";
};
@@ -119,7 +120,8 @@
timer at 50004600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
- interrupts = <1 13 0x304>;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car 132>;
};
@@ -143,10 +145,10 @@
timer at 60005000 {
compatible = "nvidia,tegra20-timer";
reg = <0x60005000 0x60>;
- interrupts = <0 0 0x04
- 0 1 0x04
- 0 41 0x04
- 0 42 0x04>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
tegra_car: clock {
@@ -158,22 +160,22 @@
apbdma: dma {
compatible = "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1200>;
- interrupts = <0 104 0x04
- 0 105 0x04
- 0 106 0x04
- 0 107 0x04
- 0 108 0x04
- 0 109 0x04
- 0 110 0x04
- 0 111 0x04
- 0 112 0x04
- 0 113 0x04
- 0 114 0x04
- 0 115 0x04
- 0 116 0x04
- 0 117 0x04
- 0 118 0x04
- 0 119 0x04>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 34>;
};
@@ -185,13 +187,13 @@
gpio: gpio {
compatible = "nvidia,tegra20-gpio";
reg = <0x6000d000 0x1000>;
- interrupts = <0 32 0x04
- 0 33 0x04
- 0 34 0x04
- 0 35 0x04
- 0 55 0x04
- 0 87 0x04
- 0 89 0x04>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
@@ -214,7 +216,7 @@
tegra_ac97: ac97 {
compatible = "nvidia,tegra20-ac97";
reg = <0x70002000 0x200>;
- interrupts = <0 81 0x04>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 12>;
clocks = <&tegra_car 3>;
status = "disabled";
@@ -223,7 +225,7 @@
tegra_i2s1: i2s at 70002800 {
compatible = "nvidia,tegra20-i2s";
reg = <0x70002800 0x200>;
- interrupts = <0 13 0x04>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 2>;
clocks = <&tegra_car 11>;
status = "disabled";
@@ -232,7 +234,7 @@
tegra_i2s2: i2s at 70002a00 {
compatible = "nvidia,tegra20-i2s";
reg = <0x70002a00 0x200>;
- interrupts = <0 3 0x04>;
+ interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 1>;
clocks = <&tegra_car 18>;
status = "disabled";
@@ -249,7 +251,7 @@
compatible = "nvidia,tegra20-uart";
reg = <0x70006000 0x40>;
reg-shift = <2>;
- interrupts = <0 36 0x04>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 8>;
clocks = <&tegra_car 6>;
status = "disabled";
@@ -259,7 +261,7 @@
compatible = "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
- interrupts = <0 37 0x04>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 9>;
clocks = <&tegra_car 96>;
status = "disabled";
@@ -269,7 +271,7 @@
compatible = "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
- interrupts = <0 46 0x04>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 10>;
clocks = <&tegra_car 55>;
status = "disabled";
@@ -279,7 +281,7 @@
compatible = "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
- interrupts = <0 90 0x04>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 19>;
clocks = <&tegra_car 65>;
status = "disabled";
@@ -289,7 +291,7 @@
compatible = "nvidia,tegra20-uart";
reg = <0x70006400 0x100>;
reg-shift = <2>;
- interrupts = <0 91 0x04>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 20>;
clocks = <&tegra_car 66>;
status = "disabled";
@@ -305,13 +307,13 @@
rtc {
compatible = "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
- interrupts = <0 2 0x04>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
};
i2c at 7000c000 {
compatible = "nvidia,tegra20-i2c";
reg = <0x7000c000 0x100>;
- interrupts = <0 38 0x04>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 12>, <&tegra_car 124>;
@@ -322,7 +324,7 @@
spi at 7000c380 {
compatible = "nvidia,tegra20-sflash";
reg = <0x7000c380 0x80>;
- interrupts = <0 39 0x04>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 11>;
#address-cells = <1>;
#size-cells = <0>;
@@ -333,7 +335,7 @@
i2c at 7000c400 {
compatible = "nvidia,tegra20-i2c";
reg = <0x7000c400 0x100>;
- interrupts = <0 84 0x04>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 54>, <&tegra_car 124>;
@@ -344,7 +346,7 @@
i2c at 7000c500 {
compatible = "nvidia,tegra20-i2c";
reg = <0x7000c500 0x100>;
- interrupts = <0 92 0x04>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 67>, <&tegra_car 124>;
@@ -355,7 +357,7 @@
i2c at 7000d000 {
compatible = "nvidia,tegra20-i2c-dvc";
reg = <0x7000d000 0x200>;
- interrupts = <0 53 0x04>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 47>, <&tegra_car 124>;
@@ -366,7 +368,7 @@
spi at 7000d400 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d400 0x200>;
- interrupts = <0 59 0x04>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 15>;
#address-cells = <1>;
#size-cells = <0>;
@@ -377,7 +379,7 @@
spi at 7000d600 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d600 0x200>;
- interrupts = <0 82 0x04>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 16>;
#address-cells = <1>;
#size-cells = <0>;
@@ -388,7 +390,7 @@
spi at 7000d800 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
- interrupts = <0 83 0x04>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
#size-cells = <0>;
@@ -399,7 +401,7 @@
spi at 7000da00 {
compatible = "nvidia,tegra20-slink";
reg = <0x7000da00 0x200>;
- interrupts = <0 93 0x04>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 18>;
#address-cells = <1>;
#size-cells = <0>;
@@ -410,7 +412,7 @@
kbc {
compatible = "nvidia,tegra20-kbc";
reg = <0x7000e200 0x100>;
- interrupts = <0 85 0x04>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 36>;
status = "disabled";
};
@@ -424,7 +426,7 @@
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;
- interrupts = <0 77 0x04>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
iommu {
@@ -443,7 +445,7 @@
usb at c5000000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5000000 0x4000>;
- interrupts = <0 20 0x04>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
nvidia,has-legacy-mode;
clocks = <&tegra_car 22>;
@@ -464,7 +466,7 @@
usb at c5004000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5004000 0x4000>;
- interrupts = <0 21 0x04>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "ulpi";
clocks = <&tegra_car 58>;
nvidia,phy = <&phy2>;
@@ -482,7 +484,7 @@
usb at c5008000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5008000 0x4000>;
- interrupts = <0 97 0x04>;
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
phy_type = "utmi";
clocks = <&tegra_car 59>;
nvidia,phy = <&phy3>;
@@ -500,7 +502,7 @@
sdhci at c8000000 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000000 0x200>;
- interrupts = <0 14 0x04>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 14>;
status = "disabled";
};
@@ -508,7 +510,7 @@
sdhci at c8000200 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000200 0x200>;
- interrupts = <0 15 0x04>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 9>;
status = "disabled";
};
@@ -516,7 +518,7 @@
sdhci at c8000400 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000400 0x200>;
- interrupts = <0 19 0x04>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 69>;
status = "disabled";
};
@@ -524,7 +526,7 @@
sdhci at c8000600 {
compatible = "nvidia,tegra20-sdhci";
reg = <0xc8000600 0x200>;
- interrupts = <0 31 0x04>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 15>;
status = "disabled";
};
@@ -548,7 +550,7 @@
pmu {
compatible = "arm,cortex-a9-pmu";
- interrupts = <0 56 0x04
- 0 57 0x04>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts
index 6a52822..e350c67 100644
--- a/arch/arm/boot/dts/tegra30-beaver.dts
+++ b/arch/arm/boot/dts/tegra30-beaver.dts
@@ -133,7 +133,7 @@
compatible = "ti,tps65911";
reg = <0x2d>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index ac1bb88..b3de6a3 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -146,7 +146,7 @@
compatible = "isil,isl29028";
reg = <0x44>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(L, 0) 0x04>;
+ interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -163,7 +163,7 @@
compatible = "wlf,wm8903";
reg = <0x1a>;
interrupt-parent = <&gpio>;
- interrupts = <TEGRA_GPIO(W, 3) 0x04>;
+ interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
@@ -190,7 +190,7 @@
compatible = "ti,tps65911";
reg = <0x2d>;
- interrupts = <0 86 0x4>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <2>;
interrupt-controller;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 94b8cf4..ed4f140 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
@@ -17,8 +18,8 @@
host1x {
compatible = "nvidia,tegra30-host1x", "simple-bus";
reg = <0x50000000 0x00024000>;
- interrupts = <0 65 0x04 /* mpcore syncpt */
- 0 67 0x04>; /* mpcore general */
+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
clocks = <&tegra_car 28>;
#address-cells = <1>;
@@ -29,35 +30,35 @@
mpe {
compatible = "nvidia,tegra30-mpe";
reg = <0x54040000 0x00040000>;
- interrupts = <0 68 0x04>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 60>;
};
vi {
compatible = "nvidia,tegra30-vi";
reg = <0x54080000 0x00040000>;
- interrupts = <0 69 0x04>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 164>;
};
epp {
compatible = "nvidia,tegra30-epp";
reg = <0x540c0000 0x00040000>;
- interrupts = <0 70 0x04>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 19>;
};
isp {
compatible = "nvidia,tegra30-isp";
reg = <0x54100000 0x00040000>;
- interrupts = <0 71 0x04>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 23>;
};
gr2d {
compatible = "nvidia,tegra30-gr2d";
reg = <0x54140000 0x00040000>;
- interrupts = <0 72 0x04>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 21>;
};
@@ -71,7 +72,7 @@
dc at 54200000 {
compatible = "nvidia,tegra30-dc";
reg = <0x54200000 0x00040000>;
- interrupts = <0 73 0x04>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 27>, <&tegra_car 179>;
clock-names = "disp1", "parent";
@@ -83,7 +84,7 @@
dc at 54240000 {
compatible = "nvidia,tegra30-dc";
reg = <0x54240000 0x00040000>;
- interrupts = <0 74 0x04>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 26>, <&tegra_car 179>;
clock-names = "disp2", "parent";
@@ -95,7 +96,7 @@
hdmi {
compatible = "nvidia,tegra30-hdmi";
reg = <0x54280000 0x00040000>;
- interrupts = <0 75 0x04>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 51>, <&tegra_car 189>;
clock-names = "hdmi", "parent";
status = "disabled";
@@ -104,7 +105,7 @@
tvo {
compatible = "nvidia,tegra30-tvo";
reg = <0x542c0000 0x00040000>;
- interrupts = <0 76 0x04>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 169>;
status = "disabled";
};
@@ -120,7 +121,8 @@
timer at 50004600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x50040600 0x20>;
- interrupts = <1 13 0xf04>;
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&tegra_car 214>;
};
@@ -144,12 +146,12 @@
timer at 60005000 {
compatible = "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
- interrupts = <0 0 0x04
- 0 1 0x04
- 0 41 0x04
- 0 42 0x04
- 0 121 0x04
- 0 122 0x04>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
};
tegra_car: clock {
@@ -161,38 +163,38 @@
apbdma: dma {
compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1400>;
- interrupts = <0 104 0x04
- 0 105 0x04
- 0 106 0x04
- 0 107 0x04
- 0 108 0x04
- 0 109 0x04
- 0 110 0x04
- 0 111 0x04
- 0 112 0x04
- 0 113 0x04
- 0 114 0x04
- 0 115 0x04
- 0 116 0x04
- 0 117 0x04
- 0 118 0x04
- 0 119 0x04
- 0 128 0x04
- 0 129 0x04
- 0 130 0x04
- 0 131 0x04
- 0 132 0x04
- 0 133 0x04
- 0 134 0x04
- 0 135 0x04
- 0 136 0x04
- 0 137 0x04
- 0 138 0x04
- 0 139 0x04
- 0 140 0x04
- 0 141 0x04
- 0 142 0x04
- 0 143 0x04>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 34>;
};
@@ -204,14 +206,14 @@
gpio: gpio {
compatible = "nvidia,tegra30-gpio";
reg = <0x6000d000 0x1000>;
- interrupts = <0 32 0x04
- 0 33 0x04
- 0 34 0x04
- 0 35 0x04
- 0 55 0x04
- 0 87 0x04
- 0 89 0x04
- 0 125 0x04>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
@@ -236,7 +238,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006000 0x40>;
reg-shift = <2>;
- interrupts = <0 36 0x04>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 8>;
clocks = <&tegra_car 6>;
status = "disabled";
@@ -246,7 +248,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
- interrupts = <0 37 0x04>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 9>;
clocks = <&tegra_car 160>;
status = "disabled";
@@ -256,7 +258,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
- interrupts = <0 46 0x04>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 10>;
clocks = <&tegra_car 55>;
status = "disabled";
@@ -266,7 +268,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
- interrupts = <0 90 0x04>;
+ interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 19>;
clocks = <&tegra_car 65>;
status = "disabled";
@@ -276,7 +278,7 @@
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006400 0x100>;
reg-shift = <2>;
- interrupts = <0 91 0x04>;
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 20>;
clocks = <&tegra_car 66>;
status = "disabled";
@@ -292,13 +294,13 @@
rtc {
compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
- interrupts = <0 2 0x04>;
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
};
i2c at 7000c000 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c000 0x100>;
- interrupts = <0 38 0x04>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 12>, <&tegra_car 182>;
@@ -309,7 +311,7 @@
i2c at 7000c400 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c400 0x100>;
- interrupts = <0 84 0x04>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 54>, <&tegra_car 182>;
@@ -320,7 +322,7 @@
i2c at 7000c500 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c500 0x100>;
- interrupts = <0 92 0x04>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 67>, <&tegra_car 182>;
@@ -331,7 +333,7 @@
i2c at 7000c700 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000c700 0x100>;
- interrupts = <0 120 0x04>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 103>, <&tegra_car 182>;
@@ -342,7 +344,7 @@
i2c at 7000d000 {
compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
reg = <0x7000d000 0x100>;
- interrupts = <0 53 0x04>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 47>, <&tegra_car 182>;
@@ -353,7 +355,7 @@
spi at 7000d400 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000d400 0x200>;
- interrupts = <0 59 0x04>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 15>;
#address-cells = <1>;
#size-cells = <0>;
@@ -364,7 +366,7 @@
spi at 7000d600 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000d600 0x200>;
- interrupts = <0 82 0x04>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 16>;
#address-cells = <1>;
#size-cells = <0>;
@@ -375,7 +377,7 @@
spi at 7000d800 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000d480 0x200>;
- interrupts = <0 83 0x04>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
#size-cells = <0>;
@@ -386,7 +388,7 @@
spi at 7000da00 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000da00 0x200>;
- interrupts = <0 93 0x04>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 18>;
#address-cells = <1>;
#size-cells = <0>;
@@ -397,7 +399,7 @@
spi at 7000dc00 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000dc00 0x200>;
- interrupts = <0 94 0x04>;
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 27>;
#address-cells = <1>;
#size-cells = <0>;
@@ -408,7 +410,7 @@
spi at 7000de00 {
compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
reg = <0x7000de00 0x200>;
- interrupts = <0 79 0x04>;
+ interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 28>;
#address-cells = <1>;
#size-cells = <0>;
@@ -419,7 +421,7 @@
kbc {
compatible = "nvidia,tegra30-kbc", "nvidia,tegra20-kbc";
reg = <0x7000e200 0x100>;
- interrupts = <0 85 0x04>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 36>;
status = "disabled";
};
@@ -435,7 +437,7 @@
0x7000f03c 0x1b4
0x7000f200 0x028
0x7000f284 0x17c>;
- interrupts = <0 77 0x04>;
+ interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
iommu {
@@ -452,7 +454,7 @@
compatible = "nvidia,tegra30-ahub";
reg = <0x70080000 0x200
0x70080200 0x100>;
- interrupts = <0 103 0x04>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
nvidia,dma-request-selector = <&apbdma 1>;
clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
<&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
@@ -509,7 +511,7 @@
sdhci at 78000000 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000000 0x200>;
- interrupts = <0 14 0x04>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 14>;
status = "disabled";
};
@@ -517,7 +519,7 @@
sdhci at 78000200 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000200 0x200>;
- interrupts = <0 15 0x04>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 9>;
status = "disabled";
};
@@ -525,7 +527,7 @@
sdhci at 78000400 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000400 0x200>;
- interrupts = <0 19 0x04>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 69>;
status = "disabled";
};
@@ -533,7 +535,7 @@
sdhci at 78000600 {
compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
reg = <0x78000600 0x200>;
- interrupts = <0 31 0x04>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car 15>;
status = "disabled";
};
@@ -569,9 +571,9 @@
pmu {
compatible = "arm,cortex-a9-pmu";
- interrupts = <0 144 0x04
- 0 145 0x04
- 0 146 0x04
- 0 147 0x04>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
};
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
` (4 preceding siblings ...)
2013-03-06 18:28 ` [PATCH V2 6/6] ARM: tegra: convert device tree files to use IRQ defines Stephen Warren
@ 2013-03-06 20:25 ` Stephen Warren
5 siblings, 0 replies; 7+ messages in thread
From: Stephen Warren @ 2013-03-06 20:25 UTC (permalink / raw)
To: linux-arm-kernel
On 03/06/2013 11:28 AM, Stephen Warren wrote:
> Remove white-space from empty line; triggers checkpatch.
I've applied patches 1 and 2 to Tegra's for-next/cleanup-dt branch. The
rest of the series will wait for review, dependencies etc.
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2013-03-06 20:25 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-03-06 18:28 [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
2013-03-06 18:28 ` [PATCH V2 2/6] ARM: tegra: fix sort order of USB PHY nodes Stephen Warren
2013-03-06 18:28 ` [PATCH V2 3/6] ARM: tegra: use #include for all device trees Stephen Warren
2013-03-06 18:28 ` [PATCH V2 4/6] ARM: tegra: create a DT header defining GPIO IDs Stephen Warren
2013-03-06 18:28 ` [PATCH V2 5/6] ARM: tegra: convert device tree files to use GPIO defines Stephen Warren
2013-03-06 18:28 ` [PATCH V2 6/6] ARM: tegra: convert device tree files to use IRQ defines Stephen Warren
2013-03-06 20:25 ` [PATCH V2 1/6] ARM: tegra: device tree whitespace cleanup Stephen Warren
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