[PATCH v2 0/3] ARM: dts: imx6q: Add additional pinctrl entries

[PATCH v2 0/3] ARM: dts: imx6q: Add additional pinctrl entries

[Sean Cross]

Changes since v1:
	- Pull from shawnguo's imx/dt branch
	- Use macro names rather than hardcoded vlaues

This series adds imx6q dts pinctrl entries for ecspi3, i2c2, i2c3, and aud3.

Sean Cross (3):
  ARM: dts: imx6q: Add pinctrl for ecspi3
  ARM: dts: imx6q: Add pinctrl for i2c2 and i2c3
  ARM: dts: imx6q: Add pinctrl for audmix on AUD3

 arch/arm/boot/dts/imx6q.dtsip |   37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

-- 
1.7.9.5

[PATCH v2 1/3] ARM: dts: imx6q: Add pinctrl for ecspi3

[Sean Cross]

Add a group of pins to allow ecspi3 to be used on imx6q.
---
 arch/arm/boot/dts/imx6q.dtsip |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q.dtsip b/arch/arm/boot/dts/imx6q.dtsip
index 749c5c4..f318678 100644
--- a/arch/arm/boot/dts/imx6q.dtsip
+++ b/arch/arm/boot/dts/imx6q.dtsip
@@ -97,6 +97,16 @@
 					};
 				};
 
+				ecspi3 {
+					pinctrl_ecspi3_1: ecspi3grp-1 {
+						fsl,pins = <
+							MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
+							MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
+							MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
+						>;
+					};
+				};
+
 				enet {
 					pinctrl_enet_1: enetgrp-1 {
 						fsl,pins = <
-- 
1.7.9.5

[PATCH v2 2/3] ARM: dts: imx6q: Add pinctrl for i2c2 and i2c3

[Sean Cross]

Add groups to allow i2c2 and i2c3 to be used on imx6q.
---
 arch/arm/boot/dts/imx6q.dtsip |   18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q.dtsip b/arch/arm/boot/dts/imx6q.dtsip
index f318678..1b1f80b 100644
--- a/arch/arm/boot/dts/imx6q.dtsip
+++ b/arch/arm/boot/dts/imx6q.dtsip
@@ -185,6 +185,24 @@
 					};
 				};
 
+				i2c2 {
+					pinctrl_i2c2_1: i2c2grp-1 {
+						fsl,pins = <
+							MX6Q_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
+							MX6Q_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
+						>;
+					};
+				};
+
+				i2c3 {
+					pinctrl_i2c3_1: i2c3grp-1 {
+						fsl,pins = <
+							MX6Q_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
+							MX6Q_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+						>;
+					};
+				};
+
 				uart1 {
 					pinctrl_uart1_1: uart1grp-1 {
 						fsl,pins = <
-- 
1.7.9.5

[PATCH v2 3/3] ARM: dts: imx6q: Add pinctrl for audmix on AUD3

[Sean Cross]

Allow AUD3 to be used as audio output from the audmux block.
---
 arch/arm/boot/dts/imx6q.dtsip |    9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/imx6q.dtsip b/arch/arm/boot/dts/imx6q.dtsip
index 1b1f80b..dbc4b46 100644
--- a/arch/arm/boot/dts/imx6q.dtsip
+++ b/arch/arm/boot/dts/imx6q.dtsip
@@ -85,6 +85,15 @@
 							MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS 0x80000000
 						>;
 					};
+
+					pinctrl_audmux_2: audmux-2 {
+						fsl,pins = <
+							MX6Q_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD  0x80000000
+							MX6Q_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC  0x80000000
+							MX6Q_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD  0x80000000
+							MX6Q_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
+						>;
+					};
 				};
 
 				ecspi1 {
-- 
1.7.9.5

[PATCH v2 1/3] ARM: dts: imx6q: Add pinctrl for ecspi3

[Shawn Guo]

On Thu, Mar 07, 2013 at 06:00:08AM +0000, Sean Cross wrote:
> Add a group of pins to allow ecspi3 to be used on imx6q.

All 3 patches look good.  But you forgot adding your sign-off.
I added the following line and applied the patches this time.

Signed-off-by: Sean Cross <xobs@kosagi.com>

Shawn

> ---
>  arch/arm/boot/dts/imx6q.dtsip |   10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/imx6q.dtsip b/arch/arm/boot/dts/imx6q.dtsip
> index 749c5c4..f318678 100644
> --- a/arch/arm/boot/dts/imx6q.dtsip
> +++ b/arch/arm/boot/dts/imx6q.dtsip
> @@ -97,6 +97,16 @@
>  					};
>  				};
>  
> +				ecspi3 {
> +					pinctrl_ecspi3_1: ecspi3grp-1 {
> +						fsl,pins = <
> +							MX6Q_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
> +							MX6Q_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
> +							MX6Q_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
> +						>;
> +					};
> +				};
> +
>  				enet {
>  					pinctrl_enet_1: enetgrp-1 {
>  						fsl,pins = <
> -- 
> 1.7.9.5
>