[PATCH 0/6] Add support for NXP LPC18xx family

[PATCH 0/6] Add support for NXP LPC18xx family

[Joachim Eastwood]

This patch set adds minimal support for the LPC18xx/43xx family of
Cortex-M3/4 MCUs from NXP.

Patch set is based on Linus master v4.0-rc6. I assume it's too late
for 4.1 now, so the target for these patches is 4.2.

To keep the amount of dependencies down the PLL1 clock has been hard
coded in the lpc18xx.dtsi file. The clock system of LPC18xx is quite
advanced for a MCU and requires two clk drivers to work. A patch set
with these drivers and update to the dtsi files will be posted
separately.

Drivers for pinctrl, gpio, ethernet, i2c, rtc and emc (external
memories) are also coming for LPC18xx.  Right now these can found on:
https://github.com/manabian/linux-lpc

I don't know the policy on new kernel configs, but if this is a no go
the last patch can be dropped.

For zImage support: https://patchwork.kernel.org/patch/5505741/

Sucessfuly tested on Embedded Artist LPC4357 Developers Kit.

Joachim Eastwood (6):
  ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs
  clocksource: add lpc32xx timer driver
  doc: dt: add documentation for lpc3250-timer
  ARM: dts: Add base DT for NXP LPC18xx and LPC4357
  ARM: dts: Add DT for Embedded Artist LPC4357 Developers Kit
  ARM: lpc18xx: add kernel config

 .../bindings/timer/nxp,lpc3250-timer.txt           |  25 +++
 arch/arm/Kconfig                                   |  20 ++
 arch/arm/Kconfig.debug                             |   8 +-
 arch/arm/Makefile                                  |   1 +
 arch/arm/boot/dts/Makefile                         |   2 +
 arch/arm/boot/dts/lpc18xx.dtsi                     | 117 ++++++++++
 arch/arm/boot/dts/lpc4357-ea4357.dts               |  34 +++
 arch/arm/boot/dts/lpc4357.dtsi                     |  39 ++++
 arch/arm/configs/lpc18xx_defconfig                 | 135 +++++++++++
 arch/arm/mach-lpc18xx/Makefile                     |   1 +
 arch/arm/mach-lpc18xx/Makefile.boot                |   3 +
 arch/arm/mach-lpc18xx/board-dt.c                   |  24 ++
 drivers/clocksource/Kconfig                        |  10 +
 drivers/clocksource/Makefile                       |   1 +
 drivers/clocksource/time-lpc32xx.c                 | 249 +++++++++++++++++++++
 15 files changed, 666 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/nxp,lpc3250-timer.txt
 create mode 100644 arch/arm/boot/dts/lpc18xx.dtsi
 create mode 100644 arch/arm/boot/dts/lpc4357-ea4357.dts
 create mode 100644 arch/arm/boot/dts/lpc4357.dtsi
 create mode 100644 arch/arm/configs/lpc18xx_defconfig
 create mode 100644 arch/arm/mach-lpc18xx/Makefile
 create mode 100644 arch/arm/mach-lpc18xx/Makefile.boot
 create mode 100644 arch/arm/mach-lpc18xx/board-dt.c
 create mode 100644 drivers/clocksource/time-lpc32xx.c

-- 
1.8.0

[PATCH 1/6] ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs

[Joachim Eastwood]

Add support for NXP's LPC18xx (Cortex-M3) and LPC43xx (Cortex-M4)
SoCs. These SoCs are NXP's high preformance MCU line and can run at
clock speeds up to 180 MHz for LPC18xx and 204 MHz for LPC43xx.

LPC43xx is more or less a LPC18xx with a Cortex-M4F core and a few
extra peripherals. The LPC43xx series also features one or two
Cortex-M0 cores that can be used to offload the main M4 core.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 arch/arm/Kconfig                    | 20 ++++++++++++++++++++
 arch/arm/Kconfig.debug              |  8 +++++---
 arch/arm/Makefile                   |  1 +
 arch/arm/mach-lpc18xx/Makefile      |  1 +
 arch/arm/mach-lpc18xx/Makefile.boot |  3 +++
 arch/arm/mach-lpc18xx/board-dt.c    | 24 ++++++++++++++++++++++++
 6 files changed, 54 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-lpc18xx/Makefile
 create mode 100644 arch/arm/mach-lpc18xx/Makefile.boot
 create mode 100644 arch/arm/mach-lpc18xx/board-dt.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cf4c0c99aa25..056921e6fccb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -593,6 +593,26 @@ config ARCH_W90X900
 	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
 		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
 
+config ARCH_LPC18XX
+	bool "NXP LPC18xx/LPC43xx"
+	depends on !MMU
+	select ARCH_HAS_RESET_CONTROLLER
+	select ARCH_REQUIRE_GPIOLIB
+	select ARM_AMBA
+	select ARM_NVIC
+	select AUTO_ZRELADDR
+	select CLKSRC_OF
+	select COMMON_CLK
+	select CPU_V7M
+	select GENERIC_CLOCKEVENTS
+	select NO_IOPORT_MAP
+	select PINCTRL
+	select SPARSE_IRQ
+	select USE_OF
+	help
+	  Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
+	  high performance microcontrollers.
+
 config ARCH_LPC32XX
 	bool "NXP LPC32XX"
 	select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 970de7518341..348adb414a66 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1329,8 +1329,9 @@ config DEBUG_UART_8250
 	def_bool ARCH_DOVE || ARCH_EBSA110 || \
 		(FOOTBRIDGE && !DEBUG_DC21285_PORT) || \
 		ARCH_GEMINI || ARCH_IOP13XX || ARCH_IOP32X || \
-		ARCH_IOP33X || ARCH_IXP4XX || \
-		ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC
+		ARCH_IOP33X || ARCH_IXP4XX || ARCH_LPC18XX || \
+		ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || \
+		ARCH_RPC
 
 # Compatibility options for BCM63xx
 config DEBUG_UART_BCM63XX
@@ -1371,6 +1372,7 @@ config DEBUG_UART_PHYS
 	default 0x20201000 if DEBUG_BCM2835
 	default 0x3e000000 if DEBUG_BCM_KONA_UART
 	default 0x4000e400 if DEBUG_LL_UART_EFM32
+	default 0x40081000 if ARCH_LPC18XX
 	default 0x40090000 if ARCH_LPC32XX
 	default 0x40100000 if DEBUG_PXA_UART1
 	default 0x42000000 if ARCH_GEMINI
@@ -1573,7 +1575,7 @@ config DEBUG_UNCOMPRESS
 config UNCOMPRESS_INCLUDE
 	string
 	default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM || \
-					PLAT_SAMSUNG || ARCH_EFM32
+					PLAT_SAMSUNG || ARCH_EFM32 || ARCH_LPC18XX
 	default "mach/uncompress.h"
 
 config EARLY_PRINTK
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index eb7bb511f853..0bf3fe30ac5e 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -167,6 +167,7 @@ machine-$(CONFIG_ARCH_IOP33X)		+= iop33x
 machine-$(CONFIG_ARCH_IXP4XX)		+= ixp4xx
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 machine-$(CONFIG_ARCH_KS8695)		+= ks8695
+machine-$(CONFIG_ARCH_LPC18XX)		+= lpc18xx
 machine-$(CONFIG_ARCH_LPC32XX)		+= lpc32xx
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MMP)		+= mmp
diff --git a/arch/arm/mach-lpc18xx/Makefile b/arch/arm/mach-lpc18xx/Makefile
new file mode 100644
index 000000000000..bd0b7b5d6e9d
--- /dev/null
+++ b/arch/arm/mach-lpc18xx/Makefile
@@ -0,0 +1 @@
+obj-y += board-dt.o
diff --git a/arch/arm/mach-lpc18xx/Makefile.boot b/arch/arm/mach-lpc18xx/Makefile.boot
new file mode 100644
index 000000000000..eacfc3f5c33e
--- /dev/null
+++ b/arch/arm/mach-lpc18xx/Makefile.boot
@@ -0,0 +1,3 @@
+# Empty file waiting for deletion once Makefile.boot isn't needed any more.
+# Patch waits for application at
+# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 .
diff --git a/arch/arm/mach-lpc18xx/board-dt.c b/arch/arm/mach-lpc18xx/board-dt.c
new file mode 100644
index 000000000000..082881aab49d
--- /dev/null
+++ b/arch/arm/mach-lpc18xx/board-dt.c
@@ -0,0 +1,24 @@
+/*
+ * Device Tree board file for NXP LPC18xx/43xx
+ *
+ * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+
+#include <asm/v7m.h>
+#include <asm/mach/arch.h>
+
+static const char *const lpc18xx_43xx_compat[] __initconst = {
+	"ea,lpc4357-developers-kit",
+	NULL
+};
+
+DT_MACHINE_START(LPC18XXDT, "NXP LPC18xx/43xx (Device Tree Support)")
+	.dt_compat = lpc18xx_43xx_compat,
+	.restart = armv7m_restart,
+MACHINE_END
-- 
1.8.0

[PATCH 2/6] clocksource: add lpc32xx timer driver

[Joachim Eastwood]

Add support for using the NXP LPC timer as clocksource and
clock event. These timers are present on many NXP devices
including LPC32xx, LPC17xx, LPC18xx and LPC43xx.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 drivers/clocksource/Kconfig        |  10 ++
 drivers/clocksource/Makefile       |   1 +
 drivers/clocksource/time-lpc32xx.c | 249 +++++++++++++++++++++++++++++++++++++
 3 files changed, 260 insertions(+)
 create mode 100644 drivers/clocksource/time-lpc32xx.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index a0b036ccb118..5fa8a28ebf35 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -106,6 +106,16 @@ config CLKSRC_EFM32
 	  Support to use the timers of EFM32 SoCs as clock source and clock
 	  event device.
 
+config CLKSRC_LPC32XX
+	bool "Clocksource for NXP's LPC SoC series" if !ARCH_LPC18XX
+	depends on OF && ARM && (ARCH_LPC18XX || COMPILE_TEST)
+	select CLKSRC_MMIO
+	default ARCH_LPC18XX
+	help
+	  Support to use the timers of LPC SoCs as clock source and clock
+	  event device. These timers are present on many NXP devices
+	  including LPC32xx, LPC17xx, LPC18xx and LPC43xx.
+
 config ARM_ARCH_TIMER
 	bool
 	select CLKSRC_OF if OF
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 752d5c70b0ef..c3f0ae067802 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_ARCH_BCM_MOBILE)	+= bcm_kona_timer.o
 obj-$(CONFIG_CADENCE_TTC_TIMER)	+= cadence_ttc_timer.o
 obj-$(CONFIG_CLKSRC_EFM32)	+= time-efm32.o
 obj-$(CONFIG_CLKSRC_EXYNOS_MCT)	+= exynos_mct.o
+obj-$(CONFIG_CLKSRC_LPC32XX)	+= time-lpc32xx.o
 obj-$(CONFIG_CLKSRC_SAMSUNG_PWM)	+= samsung_pwm_timer.o
 obj-$(CONFIG_FSL_FTM_TIMER)	+= fsl_ftm_timer.o
 obj-$(CONFIG_VF_PIT_TIMER)	+= vf_pit_timer.o
diff --git a/drivers/clocksource/time-lpc32xx.c b/drivers/clocksource/time-lpc32xx.c
new file mode 100644
index 000000000000..294fb0bcb712
--- /dev/null
+++ b/drivers/clocksource/time-lpc32xx.c
@@ -0,0 +1,249 @@
+/*
+ * Clocksource driver for NXP LPC32xx/18xx/43xx timer
+ *
+ * Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
+ *
+ * Based on:
+ * time-efm32 Copyright (C) 2013 Pengutronix
+ * mach-lpc32xx/timer.c Copyright (C) 2009 - 2010 NXP Semiconductors
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+
+#define LPC32XX_TIMER_IR		0x000
+#define  LPC32XX_TIMER_IR_MR0INT	BIT(0)
+#define LPC32XX_TIMER_TCR		0x004
+#define  LPC32XX_TIMER_TCR_CEN		BIT(0)
+#define  LPC32XX_TIMER_TCR_CRST		BIT(1)
+#define LPC32XX_TIMER_TC		0x008
+#define LPC32XX_TIMER_PR		0x00c
+#define LPC32XX_TIMER_MCR		0x014
+#define  LPC32XX_TIMER_MCR_MR0I		BIT(0)
+#define  LPC32XX_TIMER_MCR_MR0R		BIT(1)
+#define  LPC32XX_TIMER_MCR_MR0S		BIT(2)
+#define LPC32XX_TIMER_MR0		0x018
+
+struct lpc32xx_clock_event_ddata {
+	struct clock_event_device evtdev;
+	void __iomem *base;
+};
+
+static int lpc32xx_clkevt_next_event(unsigned long delta,
+				     struct clock_event_device *evtdev)
+{
+	struct lpc32xx_clock_event_ddata *ddata =
+		container_of(evtdev, struct lpc32xx_clock_event_ddata, evtdev);
+
+	writel_relaxed(LPC32XX_TIMER_TCR_CRST, ddata->base + LPC32XX_TIMER_TCR);
+	writel_relaxed(delta, ddata->base + LPC32XX_TIMER_PR);
+	writel_relaxed(LPC32XX_TIMER_TCR_CEN, ddata->base + LPC32XX_TIMER_TCR);
+
+	return 0;
+}
+
+static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
+				struct clock_event_device *evtdev)
+{
+	struct lpc32xx_clock_event_ddata *ddata =
+		container_of(evtdev, struct lpc32xx_clock_event_ddata, evtdev);
+
+	switch (mode) {
+	case CLOCK_EVT_MODE_PERIODIC:
+		WARN_ON(1);
+		break;
+
+	case CLOCK_EVT_MODE_ONESHOT:
+	case CLOCK_EVT_MODE_SHUTDOWN:
+		/*
+		 * Disable the timer. When using oneshot, we must also
+		 * disable the timer to wait for the first call to
+		 * set_next_event().
+		 */
+		writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR);
+		break;
+
+	case CLOCK_EVT_MODE_UNUSED:
+	case CLOCK_EVT_MODE_RESUME:
+		break;
+	}
+}
+
+static irqreturn_t lpc32xx_clock_event_handler(int irq, void *dev_id)
+{
+	struct lpc32xx_clock_event_ddata *ddata = dev_id;
+
+	/* Clear match */
+	writel_relaxed(LPC32XX_TIMER_IR_MR0INT, ddata->base + LPC32XX_TIMER_IR);
+
+	ddata->evtdev.event_handler(&ddata->evtdev);
+
+	return IRQ_HANDLED;
+}
+
+static struct lpc32xx_clock_event_ddata lpc32xx_clk_event_ddata = {
+	.evtdev = {
+		.name           = "lpc3250 clockevent",
+		.features       = CLOCK_EVT_FEAT_ONESHOT,
+		.rating         = 300,
+		.set_next_event = lpc32xx_clkevt_next_event,
+		.set_mode       = lpc32xx_clkevt_mode,
+	},
+};
+
+static struct irqaction lpc32xx_clock_event_irq = {
+	.name		= "lpc3250 clockevent",
+	.flags		= IRQF_TIMER | IRQF_IRQPOLL,
+	.handler	= lpc32xx_clock_event_handler,
+	.dev_id		= &lpc32xx_clk_event_ddata,
+};
+
+static int __init lpc32xx_clocksource_init(struct device_node *np)
+{
+	void __iomem *base;
+	unsigned long rate;
+	struct clk *clk;
+	int ret;
+
+	clk = of_clk_get(np, 0);
+	if (IS_ERR(clk)) {
+		pr_err("%s: clock get failed (%lu)\n", __func__, PTR_ERR(clk));
+		return PTR_ERR(clk);
+	}
+
+	ret = clk_prepare_enable(clk);
+	if (ret) {
+		pr_err("%s: clock enable failed (%d)\n", __func__, ret);
+		goto err_clk_enable;
+	}
+
+	rate = clk_get_rate(clk);
+
+	base = of_iomap(np, 0);
+	if (!base) {
+		pr_err("%s: unable to map registers\n", __func__);
+		ret = -EADDRNOTAVAIL;
+		goto err_iomap;
+	}
+
+	writel_relaxed(LPC32XX_TIMER_TCR_CRST, base + LPC32XX_TIMER_TCR);
+	writel_relaxed(0, base + LPC32XX_TIMER_PR);
+	writel_relaxed(0, base + LPC32XX_TIMER_MCR);
+	writel_relaxed(LPC32XX_TIMER_TCR_CEN, base + LPC32XX_TIMER_TCR);
+
+	ret = clocksource_mmio_init(base + LPC32XX_TIMER_TC, "lpc3250 timer",
+				    rate, 300, 32, clocksource_mmio_readl_up);
+	if (ret) {
+		pr_err("failed to init clocksource (%d)\n", ret);
+		goto err_clocksource_init;
+	}
+
+	return 0;
+
+err_clocksource_init:
+	iounmap(base);
+err_iomap:
+	clk_disable_unprepare(clk);
+err_clk_enable:
+	clk_put(clk);
+	return ret;
+}
+
+static int __init lpc32xx_clockevent_init(struct device_node *np)
+{
+	void __iomem *base;
+	unsigned long rate;
+	struct clk *clk;
+	int ret, irq;
+
+	clk = of_clk_get(np, 0);
+	if (IS_ERR(clk)) {
+		pr_err("%s: clock get failed (%lu)\n", __func__, PTR_ERR(clk));
+		return PTR_ERR(clk);
+	}
+
+	ret = clk_prepare_enable(clk);
+	if (ret) {
+		pr_err("%s: clock enable failed (%d)\n", __func__, ret);
+		goto err_clk_enable;
+	}
+
+	rate = clk_get_rate(clk);
+
+	base = of_iomap(np, 0);
+	if (!base) {
+		pr_err("%s: unable to map registers\n", __func__);
+		ret = -EADDRNOTAVAIL;
+		goto err_iomap;
+	}
+
+	irq = irq_of_parse_and_map(np, 0);
+	if (!irq) {
+		pr_err("%s: get irq failed\n", __func__);
+		ret = -ENOENT;
+		goto err_get_irq;
+	}
+
+	/* Initial timer setup */
+	writel_relaxed(0, base + LPC32XX_TIMER_TCR);
+	writel_relaxed(LPC32XX_TIMER_IR_MR0INT, base + LPC32XX_TIMER_IR);
+	writel_relaxed(1, base + LPC32XX_TIMER_MR0);
+	writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R |
+		       LPC32XX_TIMER_MCR_MR0S, base + LPC32XX_TIMER_MCR);
+
+	lpc32xx_clk_event_ddata.base = base;
+
+	setup_irq(irq, &lpc32xx_clock_event_irq);
+
+	clockevents_config_and_register(&lpc32xx_clk_event_ddata.evtdev,
+					rate, 1, -1);
+
+	return 0;
+
+err_get_irq:
+	iounmap(base);
+err_iomap:
+	clk_disable_unprepare(clk);
+err_clk_enable:
+	clk_put(clk);
+	return ret;
+}
+
+/*
+ * This function asserts that we have exactly one clocksource and one
+ * clock_event_device in the end.
+ */
+static void __init lpc32xx_timer_init(struct device_node *np)
+{
+	static int has_clocksource, has_clockevent;
+	int ret;
+
+	if (!has_clocksource) {
+		ret = lpc32xx_clocksource_init(np);
+		if (!ret) {
+			has_clocksource = 1;
+			return;
+		}
+	}
+
+	if (!has_clockevent) {
+		ret = lpc32xx_clockevent_init(np);
+		if (!ret) {
+			has_clockevent = 1;
+			return;
+		}
+	}
+}
+CLOCKSOURCE_OF_DECLARE(lpc32xx_timer, "nxp,lpc3250-timer", lpc32xx_timer_init);
-- 
1.8.0

[PATCH 3/6] doc: dt: add documentation for lpc3250-timer

[Joachim Eastwood]

Add DT bindings documentation for lpc3250-timer. This timer is
used as clocksource on many NXP platforms.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 .../bindings/timer/nxp,lpc3250-timer.txt           | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nxp,lpc3250-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/nxp,lpc3250-timer.txt b/Documentation/devicetree/bindings/timer/nxp,lpc3250-timer.txt
new file mode 100644
index 000000000000..9381c3e1d5aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/nxp,lpc3250-timer.txt
@@ -0,0 +1,25 @@
+* NXP LPC3250 timer
+
+The NXP LPC3250 timer is used on a wide range of NXP SoCs. This
+includes LPC32xx, LPC178x, LPC18xx and LPC43xx parts.
+
+Required properties:
+- compatible:
+	Should be "nxp,lpc3250-timer".
+- reg:
+	Address and length of the register set.
+- interrupts:
+	Reference to the timer interrupt
+- clocks:
+	Should contain a reference to the timer clock.
+
+
+Example:
+
+timer1: timer at 40085000 {
+	compatible = "nxp,lpc3250-timer";
+	reg = <0x40085000 0x1000>;
+	interrupts = <13>;
+	clocks = <&ccu1 CLK_CPU_TIMER1>;
+};
+
-- 
1.8.0

[PATCH 4/6] ARM: dts: Add base DT for NXP LPC18xx and LPC4357

[Joachim Eastwood]

NXP LPC18xx/43xx SoCs are very similar devices and should be able to
share a common base (lpc18xx.dtsi). Diffences between the devices are
put in a dtsi which is specific to that device.

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 arch/arm/boot/dts/lpc18xx.dtsi | 117 +++++++++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/lpc4357.dtsi |  39 ++++++++++++++
 2 files changed, 156 insertions(+)
 create mode 100644 arch/arm/boot/dts/lpc18xx.dtsi
 create mode 100644 arch/arm/boot/dts/lpc4357.dtsi

diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
new file mode 100644
index 000000000000..161e98b442e0
--- /dev/null
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -0,0 +1,117 @@
+/*
+ * Common base for NXP LPC18xx and LPC43xx devices.
+ *
+ * Copyright 2015 Joachim Eastwood <manabian@gmail.com>
+ *
+ * This code is released using a dual license strategy: BSD/GPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of 3-clause BSD License
+ * Released under the terms of GNU General Public License Version 2.0
+ *
+ */
+
+#include "armv7-m.dtsi"
+
+/ {
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial2 = &uart2;
+		serial3 = &uart3;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu at 0 {
+			compatible = "arm,cortex-m3";
+			device_type = "cpu";
+			reg = <0x0>;
+		};
+	};
+
+	clocks {
+		xtal: xtal {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <12000000>;
+		};
+
+		/* Temporary hardcode PLL1 until clk drivers are merged */
+		pll1: pll1 {
+			compatible = "fixed-factor-clock";
+			clocks = <&xtal>;
+			#clock-cells = <0>;
+			clock-div = <1>;
+			clock-mult = <12>;
+		};
+	};
+
+	soc {
+		uart0: serial at 40081000 {
+			compatible = "ns16550a";
+			reg = <0x40081000 0x1000>;
+			reg-shift = <2>;
+			interrupts = <24>;
+			clocks = <&pll1>;
+			status = "disabled";
+		};
+
+		uart1: serial at 40082000 {
+			compatible = "ns16550a";
+			reg = <0x40082000 0x1000>;
+			reg-shift = <2>;
+			interrupts = <25>;
+			clocks = <&pll1>;
+			status = "disabled";
+		};
+
+		timer0: timer at 40084000 {
+			compatible = "nxp,lpc3250-timer";
+			reg = <0x40084000 0x1000>;
+			interrupts = <12>;
+			clocks = <&pll1>;
+		};
+
+		timer1: timer at 40085000 {
+			compatible = "nxp,lpc3250-timer";
+			reg = <0x40085000 0x1000>;
+			interrupts = <13>;
+			clocks = <&pll1>;
+		};
+
+		uart2: serial at 400c1000 {
+			compatible = "ns16550a";
+			reg = <0x400c1000 0x1000>;
+			reg-shift = <2>;
+			interrupts = <26>;
+			clocks = <&pll1>;
+			status = "disabled";
+		};
+
+		uart3: serial at 400c2000 {
+			compatible = "ns16550a";
+			reg = <0x400c2000 0x1000>;
+			reg-shift = <2>;
+			interrupts = <27>;
+			clocks = <&pll1>;
+			status = "disabled";
+		};
+
+		timer2: timer at 400c3000 {
+			compatible = "nxp,lpc3250-timer";
+			reg = <0x400c3000 0x1000>;
+			interrupts = <14>;
+			clocks = <&pll1>;
+		};
+
+		timer3: timer at 400c4000 {
+			compatible = "nxp,lpc3250-timer";
+			reg = <0x400c4000 0x1000>;
+			interrupts = <15>;
+			clocks = <&pll1>;
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/lpc4357.dtsi b/arch/arm/boot/dts/lpc4357.dtsi
new file mode 100644
index 000000000000..9a3ec7663419
--- /dev/null
+++ b/arch/arm/boot/dts/lpc4357.dtsi
@@ -0,0 +1,39 @@
+/*
+ * NXP LPC4357 SoC
+ *
+ * Copyright 2015 Joachim Eastwood <manabian@gmail.com>
+ *
+ * This code is released using a dual license strategy: BSD/GPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of 3-clause BSD License
+ * Released under the terms of GNU General Public License Version 2.0
+ *
+ */
+
+/ {
+	compatible = "nxp,lpc4357";
+
+	cpus {
+		cpu at 0 {
+			compatible = "arm,cortex-m4";
+		};
+	};
+
+	soc {
+		sram0: sram at 10000000 {
+			compatible = "mmio-sram";
+			reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
+		};
+
+		sram1: sram at 10080000 {
+			compatible = "mmio-sram";
+			reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
+		};
+
+		sram2: sram at 20000000 {
+			compatible = "mmio-sram";
+			reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
+		};
+	};
+};
-- 
1.8.0

[PATCH 5/6] ARM: dts: Add DT for Embedded Artist LPC4357 Developers Kit

[Joachim Eastwood]

Adds basic support for Embedded Artist' LPC4357 Developer's Kit. Board
features a LPC4357 Soc, 32 MB SDRAM, 128 MB NAND Flash, 16 MB SPI
Flash, USB and Ethernet.

More information can be found on:
http://www.embeddedartists.com/products/kits/lpc4357_kit.php

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 arch/arm/boot/dts/Makefile           |  2 ++
 arch/arm/boot/dts/lpc4357-ea4357.dts | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100644 arch/arm/boot/dts/lpc4357-ea4357.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a1c776b8dcec..cae9917a4198 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -195,6 +195,8 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
 	kirkwood-ts219-6282.dtb \
 	kirkwood-ts419-6281.dtb \
 	kirkwood-ts419-6282.dtb
+dtb-$(CONFIG_ARCH_LPC18XX) += \
+	lpc4357-ea4357.dtb
 dtb-$(CONFIG_ARCH_LPC32XX) += \
 	ea3250.dtb phy3250.dtb
 dtb-$(CONFIG_MACH_MESON6) += \
diff --git a/arch/arm/boot/dts/lpc4357-ea4357.dts b/arch/arm/boot/dts/lpc4357-ea4357.dts
new file mode 100644
index 000000000000..39340e355b0a
--- /dev/null
+++ b/arch/arm/boot/dts/lpc4357-ea4357.dts
@@ -0,0 +1,34 @@
+/*
+ * Embedded Artist LPC4357 Developer's Kit
+ *
+ * Copyright 2015 Joachim Eastwood <manabian@gmail.com>
+ *
+ * This code is released using a dual license strategy: BSD/GPL
+ * You can choose the licence that better fits your requirements.
+ *
+ * Released under the terms of 3-clause BSD License
+ * Released under the terms of GNU General Public License Version 2.0
+ *
+ */
+/dts-v1/;
+
+#include "lpc18xx.dtsi"
+#include "lpc4357.dtsi"
+
+/ {
+	model = "Embedded Artist LPC4357 Developer's Kit";
+	compatible = "ea,lpc4357-developers-kit", "nxp,lpc4357";
+
+	chosen {
+		stdout-path = &uart0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x28000000 0x2000000>; /* 32 MB */
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
1.8.0

[PATCH 6/6] ARM: lpc18xx: add kernel config

[Joachim Eastwood]

Signed-off-by: Joachim Eastwood <manabian@gmail.com>
---
 arch/arm/configs/lpc18xx_defconfig | 135 +++++++++++++++++++++++++++++++++++++
 1 file changed, 135 insertions(+)
 create mode 100644 arch/arm/configs/lpc18xx_defconfig

diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig
new file mode 100644
index 000000000000..0d03853fe462
--- /dev/null
+++ b/arch/arm/configs/lpc18xx_defconfig
@@ -0,0 +1,135 @@
+CONFIG_CROSS_COMPILE="arm-linux-gnueabihf-"
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_UID16 is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_EVENTFD is not set
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_SLUB_DEBUG is not set
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_MMU is not set
+CONFIG_ARCH_LPC18XX=y
+CONFIG_SET_MEM_PARAM=y
+CONFIG_DRAM_BASE=0x28000000
+CONFIG_DRAM_SIZE=0x02000000
+CONFIG_FLASH_MEM_BASE=0x1b000000
+CONFIG_FLASH_SIZE=0x00080000
+CONFIG_PREEMPT=y
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+CONFIG_BINFMT_SHARED_FLAT=y
+# CONFIG_COREDUMP is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FW_LOADER is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_SRAM=y
+CONFIG_EEPROM_AT24=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+CONFIG_STMMAC_ETH=y
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_DEVKMEM is not set
+CONFIG_SERIAL_8250=y
+# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_SPI=y
+CONFIG_SPI_PL022=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_SENSORS_LM75=y
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_MMC=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_PCA9532=y
+CONFIG_LEDS_PCA9532_GPIO=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_AMBA_PL08X=y
+CONFIG_EXT2_FS=y
+# CONFIG_FILE_LOCKING is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_RCU_CPU_STALL_INFO is not set
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_LL_UART_8250=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC7=y
-- 
1.8.0

[PATCH 1/6] ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs

[Arnd Bergmann]

On Wednesday 01 April 2015 23:20:38 Joachim Eastwood wrote:
> +static const char *const lpc18xx_43xx_compat[] __initconst = {
> +       "ea,lpc4357-developers-kit",
> +       NULL
> 

I don't see 'ea' in Documentation/devicetree/bindings/vendor-prefixes.txt,
can you add a patch for that?

It's probably better to make the string we match against the most
generic one here, so we don't have to update the list for every
new dts file that gets added.

	Arnd

[PATCH 2/6] clocksource: add lpc32xx timer driver

[Arnd Bergmann]

On Wednesday 01 April 2015 23:20:39 Joachim Eastwood wrote:
> Add support for using the NXP LPC timer as clocksource and
> clock event. These timers are present on many NXP devices
> including LPC32xx, LPC17xx, LPC18xx and LPC43xx.
> 
> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
> 

Would it make sense to change mach-lpc32xx as a follow-up to use
the same driver? It currently hardcodes a driver instead of using
DT.

	Arnd

[PATCH 4/6] ARM: dts: Add base DT for NXP LPC18xx and LPC4357

[Arnd Bergmann]

On Wednesday 01 April 2015 23:20:41 Joachim Eastwood wrote:
> +/ {
> +       aliases {
> +               serial0 = &uart0;
> +               serial1 = &uart1;
> +               serial2 = &uart2;
> +               serial3 = &uart3;
> +       };

Better move these to the board specific file.

	Arnd

[PATCH 0/6] Add support for NXP LPC18xx family

[Arnd Bergmann]

On Wednesday 01 April 2015 23:20:37 Joachim Eastwood wrote:
> This patch set adds minimal support for the LPC18xx/43xx family of
> Cortex-M3/4 MCUs from NXP.
> 
> Patch set is based on Linus master v4.0-rc6. I assume it's too late
> for 4.1 now, so the target for these patches is 4.2.
> 
> To keep the amount of dependencies down the PLL1 clock has been hard
> coded in the lpc18xx.dtsi file. The clock system of LPC18xx is quite
> advanced for a MCU and requires two clk drivers to work. A patch set
> with these drivers and update to the dtsi files will be posted
> separately.
> 
> Drivers for pinctrl, gpio, ethernet, i2c, rtc and emc (external
> memories) are also coming for LPC18xx.  Right now these can found on:
> https://github.com/manabian/linux-lpc
> 
> I don't know the policy on new kernel configs, but if this is a no go
> the last patch can be dropped.
> 
> For zImage support: https://patchwork.kernel.org/patch/5505741/
> 
> Sucessfuly tested on Embedded Artist LPC4357 Developers Kit.
> 

Looks very nice overall, I just have a few very minor comments.

Generally speaking, I think we need to address how no-MMU targets
relate to ARCH_MULTIPLATFORM soon, to improve build testing with
all of them enabled (yes, I realize that won't run on real hardware).

	Arnd

[PATCH 2/6] clocksource: add lpc32xx timer driver

[Joachim Eastwood]

On 2 April 2015 at 16:24, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday 01 April 2015 23:20:39 Joachim Eastwood wrote:
>> Add support for using the NXP LPC timer as clocksource and
>> clock event. These timers are present on many NXP devices
>> including LPC32xx, LPC17xx, LPC18xx and LPC43xx.
>>
>> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
>>
>
> Would it make sense to change mach-lpc32xx as a follow-up to use
> the same driver? It currently hardcodes a driver instead of using
> DT.

I believe it would be hard since mach-lpc32xx currently lacks a proper
clk driver. mach-lpc32xx/timer.c currently does a lot of SoC specific
init.

But if a better clk driver comes along for mach-lpc32xx the swap should be easy.

regards,
Joachim Eastwood

[PATCH 4/6] ARM: dts: Add base DT for NXP LPC18xx and LPC4357

[Joachim Eastwood]

On 2 April 2015 at 16:25, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday 01 April 2015 23:20:41 Joachim Eastwood wrote:
>> +/ {
>> +       aliases {
>> +               serial0 = &uart0;
>> +               serial1 = &uart1;
>> +               serial2 = &uart2;
>> +               serial3 = &uart3;
>> +       };
>
> Better move these to the board specific file.

Okay.

Looking at arch/arm/boot/dts/ it seems to be very common to have
aliases setup in SoC dtsi files, though.

regards,
Joachim Eastwood

[PATCH 1/6] ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs

[Joachim Eastwood]

On 2 April 2015 at 16:21, Arnd Bergmann <arnd@arndb.de> wrote:
> On Wednesday 01 April 2015 23:20:38 Joachim Eastwood wrote:
>> +static const char *const lpc18xx_43xx_compat[] __initconst = {
>> +       "ea,lpc4357-developers-kit",
>> +       NULL
>>
>
> I don't see 'ea' in Documentation/devicetree/bindings/vendor-prefixes.txt,
> can you add a patch for that?

Sure. I'll add it to the next version.

> It's probably better to make the string we match against the most
> generic one here, so we don't have to update the list for every
> new dts file that gets added.

Okey.

Could I just use a SoC string here (like "nxp.lpc1850")?

regards,
Joachim Eastwood

[PATCH 1/6] ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs

[Ezequiel Garcia]

On 04/02/2015 01:48 PM, Joachim Eastwood wrote:
> On 2 April 2015 at 16:21, Arnd Bergmann <arnd@arndb.de> wrote:
>> On Wednesday 01 April 2015 23:20:38 Joachim Eastwood wrote:
>>> +static const char *const lpc18xx_43xx_compat[] __initconst = {
>>> +       "ea,lpc4357-developers-kit",
>>> +       NULL
>>>
>>
>> I don't see 'ea' in Documentation/devicetree/bindings/vendor-prefixes.txt,
>> can you add a patch for that?
> 
> Sure. I'll add it to the next version.
> 
>> It's probably better to make the string we match against the most
>> generic one here, so we don't have to update the list for every
>> new dts file that gets added.
> 
> Okey.
> 
> Could I just use a SoC string here (like "nxp.lpc1850")?
> 

Yeah, that should work. Or maybe you can use "nxp,lpc18xx" and use that
compatible as a generic compatible for all LPC18xx/LPC43xx MCUs.

-- 
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar

[PATCH 1/6] ARM: lpc18xx: add basic support for NXP LPC18xx/43xx SoCs

[Arnd Bergmann]

On Thursday 02 April 2015 19:25:35 Ezequiel Garcia wrote:
> On 04/02/2015 01:48 PM, Joachim Eastwood wrote:
> > On 2 April 2015 at 16:21, Arnd Bergmann <arnd@arndb.de> wrote:
> >> On Wednesday 01 April 2015 23:20:38 Joachim Eastwood wrote:
> >>> +static const char *const lpc18xx_43xx_compat[] __initconst = {
> >>> +       "ea,lpc4357-developers-kit",
> >>> +       NULL
> >>>
> >>
> >> I don't see 'ea' in Documentation/devicetree/bindings/vendor-prefixes.txt,
> >> can you add a patch for that?
> > 
> > Sure. I'll add it to the next version.
> > 
> >> It's probably better to make the string we match against the most
> >> generic one here, so we don't have to update the list for every
> >> new dts file that gets added.
> > 
> > Okey.
> > 
> > Could I just use a SoC string here (like "nxp.lpc1850")?
> > 
> 
> Yeah, that should work. Or maybe you can use "nxp,lpc18xx" and use that
> compatible as a generic compatible for all LPC18xx/LPC43xx MCUs.
> 

Sorry for the late follow-up. nxp,lpc18xx would not be appropriate here,
because compatible strings are supposed to be specific models, not wildcards.
nxp,lpc1850 is fine.

	Arnd

[PATCH 2/6] clocksource: add lpc32xx timer driver

[Arnd Bergmann]

On Thursday 02 April 2015 18:35:33 Joachim Eastwood wrote:
> On 2 April 2015 at 16:24, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Wednesday 01 April 2015 23:20:39 Joachim Eastwood wrote:
> >> Add support for using the NXP LPC timer as clocksource and
> >> clock event. These timers are present on many NXP devices
> >> including LPC32xx, LPC17xx, LPC18xx and LPC43xx.
> >>
> >> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
> >>
> >
> > Would it make sense to change mach-lpc32xx as a follow-up to use
> > the same driver? It currently hardcodes a driver instead of using
> > DT.
> 
> I believe it would be hard since mach-lpc32xx currently lacks a proper
> clk driver. mach-lpc32xx/timer.c currently does a lot of SoC specific
> init.
> 
> But if a better clk driver comes along for mach-lpc32xx the swap should be easy.

Right, makes sense.

	Arnd

[PATCH 2/6] clocksource: add lpc32xx timer driver

[Joachim Eastwood]

On 9 April 2015 at 22:24, Arnd Bergmann <arnd@arndb.de> wrote:
> On Thursday 02 April 2015 18:35:33 Joachim Eastwood wrote:
>> On 2 April 2015 at 16:24, Arnd Bergmann <arnd@arndb.de> wrote:
>> > On Wednesday 01 April 2015 23:20:39 Joachim Eastwood wrote:
>> >> Add support for using the NXP LPC timer as clocksource and
>> >> clock event. These timers are present on many NXP devices
>> >> including LPC32xx, LPC17xx, LPC18xx and LPC43xx.
>> >>
>> >> Signed-off-by: Joachim Eastwood <manabian@gmail.com>
>> >>
>> >
>> > Would it make sense to change mach-lpc32xx as a follow-up to use
>> > the same driver? It currently hardcodes a driver instead of using
>> > DT.
>>
>> I believe it would be hard since mach-lpc32xx currently lacks a proper
>> clk driver. mach-lpc32xx/timer.c currently does a lot of SoC specific
>> init.
>>
>> But if a better clk driver comes along for mach-lpc32xx the swap should be easy.
>
> Right, makes sense.

I will be getting a LPC3250 board soon so I can take a look at the clk
stuff. But from what I can see the clk register layout (system control
block) on lpc32xx seems very hairy.

btw, I noticed that the lpc32xx timer really has two clk inputs. On
lpc18xx both are feed by the same clk, but not on lpc32xx. So I will
update the driver and DT bindings to reflect this in the next version.


best regards,
Joachim Eastwood