[PATCH 0/5] pinctrl: meson: new pins and fixes round 2

[PATCH 0/5] pinctrl: meson: new pins and fixes round 2

[Neil Armstrong]

This patchset follow [1] ("pinctrl: meson: Add SPICC pins") and [2]
("pinctrl: meson: Add missing GPIODV_18 pin for GXBB and GXL") to :
 - Add the CEC pins for GXL and GXBB
 - Add the GXL PHY link/activity leds pins
 - Fix typo for the GXL I2S/SPDIF pins

[1] http://lkml.kernel.org/r/1495457966-2359-1-git-send-email-narmstrong at baylibre.com
[2] http://lkml.kernel.org/r/1495548559-22261-1-git-send-email-narmstrong at baylibre.com

Neil Armstrong (5):
  pinctrl: meson-gxl: Fix typo in AO I2S pins
  pinctrl: meson-gxl: Fix typo in AO SPDIF pins
  pinctrl: meson-gxbb: Add CEC pins
  pinctrl: meson-gxl: Add CEC pins
  pinctrl: meson-gxl: Add Ethernet PHY LEDS pins

 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 10 ++++++++++
 drivers/pinctrl/meson/pinctrl-meson-gxl.c  | 28 ++++++++++++++++++++++++----
 2 files changed, 34 insertions(+), 4 deletions(-)

-- 
1.9.1

[PATCH 1/5] pinctrl: meson-gxl: Fix typo in AO I2S pins

[Neil Armstrong]

The AO I2S pins were incorrectly defined with the EE pin offset.

Cc: Jerome Brunet <jbrunet@baylibre.com>
Fixes: 2899adf0422 ("pinctrl: meson: gxl: add i2s output pins")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 719ff1b..9af8e6a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -276,8 +276,8 @@
 static const unsigned int pwm_ao_b_pins[]	= { PIN(GPIOAO_9, 0) };
 static const unsigned int pwm_ao_b_6_pins[]	= { PIN(GPIOAO_6, 0) };
 
-static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, EE_OFF) };
-static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, EE_OFF) };
+static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, 0) };
+static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, 0) };
 
 static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, EE_OFF) };
 static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, EE_OFF) };
-- 
1.9.1

[PATCH 1/5] pinctrl: meson-gxl: Fix typo in AO I2S pins

[Jerome Brunet]

On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> The AO I2S pins were incorrectly defined with the EE pin offset.

Thx for catching this!
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

> 
> Cc: Jerome Brunet <jbrunet@baylibre.com>
> Fixes: 2899adf0422 ("pinctrl: meson: gxl: add i2s output pins")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> ?drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
> ?1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 719ff1b..9af8e6a 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -276,8 +276,8 @@
> ?static const unsigned int pwm_ao_b_pins[]	= { PIN(GPIOAO_9, 0) };
> ?static const unsigned int pwm_ao_b_6_pins[]	= { PIN(GPIOAO_6, 0) };
> ?
> -static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, EE_OFF) };
> -static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, EE_OFF) };
> +static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, 0) };
> +static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, 0) };
> ?
> ?static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6,
> EE_OFF) };
> ?static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9,
> EE_OFF) };

[PATCH 1/5] pinctrl: meson-gxl: Fix typo in AO I2S pins

[Linus Walleij]

On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
<narmstrong@baylibre.com> wrote:

> The AO I2S pins were incorrectly defined with the EE pin offset.
>
> Cc: Jerome Brunet <jbrunet@baylibre.com>
> Fixes: 2899adf0422 ("pinctrl: meson: gxl: add i2s output pins")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Patch applied with Jerome's review tag.

Yours,
Linus Walleij

[PATCH 2/5] pinctrl: meson-gxl: Fix typo in AO SPDIF pins

[Neil Armstrong]

The AO SPDIF pins were incorrectly defined with the EE pin offset.

Cc: Jerome Brunet <jbrunet@baylibre.com>
Fixes: b840d649f9ec ("pinctrl: meson: gxl: add spdif output pins")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 9af8e6a..454d73f 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -279,8 +279,8 @@
 static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, 0) };
 static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, 0) };
 
-static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, EE_OFF) };
-static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, EE_OFF) };
+static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0) };
+static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, 0) };
 
 static struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0, EE_OFF),
-- 
1.9.1

[PATCH 2/5] pinctrl: meson-gxl: Fix typo in AO SPDIF pins

[Jerome Brunet]

On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> The AO SPDIF pins were incorrectly defined with the EE pin offset.
> 

Thx for catching this !
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

> Cc: Jerome Brunet <jbrunet@baylibre.com>
> Fixes: b840d649f9ec ("pinctrl: meson: gxl: add spdif output pins")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> ?drivers/pinctrl/meson/pinctrl-meson-gxl.c | 4 ++--
> ?1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 9af8e6a..454d73f 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -279,8 +279,8 @@
> ?static const unsigned int i2s_out_ch23_ao_pins[] = { PIN(GPIOAO_8, 0) };
> ?static const unsigned int i2s_out_ch45_ao_pins[] = { PIN(GPIOAO_9, 0) };
> ?
> -static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6,
> EE_OFF) };
> -static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9,
> EE_OFF) };
> +static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0)
> };
> +static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, 0)
> };
> ?
> ?static struct meson_pmx_group meson_gxl_periphs_groups[] = {
> ?	GPIO_GROUP(GPIOZ_0, EE_OFF),

[PATCH 2/5] pinctrl: meson-gxl: Fix typo in AO SPDIF pins

[Linus Walleij]

On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
<narmstrong@baylibre.com> wrote:

> The AO SPDIF pins were incorrectly defined with the EE pin offset.
>
> Cc: Jerome Brunet <jbrunet@baylibre.com>
> Fixes: b840d649f9ec ("pinctrl: meson: gxl: add spdif output pins")
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Patch applied with Jerome's review tag.

Yours,
Linus Walleij

[PATCH 3/5] pinctrl: meson-gxbb: Add CEC pins

[Neil Armstrong]

Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 3ccb0f4f..b44314a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -295,6 +295,9 @@
 static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0) };
 static const unsigned int spdif_out_ao_13_pins[] = { PIN(GPIOAO_13, 0) };
 
+static const unsigned int ao_cec_pins[]          = { PIN(GPIOAO_12, 0) };
+static const unsigned int ee_cec_pins[]          = { PIN(GPIOAO_12, 0) };
+
 static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0, EE_OFF),
 	GPIO_GROUP(GPIOZ_1, EE_OFF),
@@ -560,6 +563,8 @@
 	GROUP(i2s_out_ch45_ao,	1,	1),
 	GROUP(spdif_out_ao_6,	0,	16),
 	GROUP(spdif_out_ao_13,	0,	4),
+	GROUP(ao_cec,           0,      15),
+	GROUP(ee_cec,           0,      14),
 };
 
 static const char * const gpio_periphs_groups[] = {
@@ -752,6 +757,10 @@
 	"spdif_out_ao_6", "spdif_out_ao_13",
 };
 
+static const char * const cec_ao_groups[] = {
+	"ao_cec", "ee_cec",
+};
+
 static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
@@ -793,6 +802,7 @@
 	FUNCTION(pwm_ao_b),
 	FUNCTION(i2s_out_ao),
 	FUNCTION(spdif_out_ao),
+	FUNCTION(cec_ao),
 };
 
 static struct meson_bank meson_gxbb_periphs_banks[] = {
-- 
1.9.1

[PATCH 3/5] pinctrl: meson-gxbb: Add CEC pins

[Jerome Brunet]

On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs.

The patch is correct but a slightly longer blurb would have been nice :)

Here AO and EE are not referring to the GPIO controller like they usually do in
our patches to pinctrl.
They refer to the 2 different CEC controllers, located in each power domain and
both connected to AO GPIO controller (same pin actually)

Not sure if this worth a resent though.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> ?drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 10 ++++++++++
> ?1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> index 3ccb0f4f..b44314a 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
> @@ -295,6 +295,9 @@
> ?static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0)
> };
> ?static const unsigned int spdif_out_ao_13_pins[] = { PIN(GPIOAO_13, 0) };
> ?
> +static const unsigned int ao_cec_pins[]??????????= { PIN(GPIOAO_12, 0) };
> +static const unsigned int ee_cec_pins[]??????????= { PIN(GPIOAO_12, 0) };
> +
> ?static struct meson_pmx_group meson_gxbb_periphs_groups[] = {
> ?	GPIO_GROUP(GPIOZ_0, EE_OFF),
> ?	GPIO_GROUP(GPIOZ_1, EE_OFF),
> @@ -560,6 +563,8 @@
> ?	GROUP(i2s_out_ch45_ao,	1,	1),
> ?	GROUP(spdif_out_ao_6,	0,	16),
> ?	GROUP(spdif_out_ao_13,	0,	4),
> +	GROUP(ao_cec,???????????0,??????15),
> +	GROUP(ee_cec,???????????0,??????14),
> ?};
> ?
> ?static const char * const gpio_periphs_groups[] = {
> @@ -752,6 +757,10 @@
> ?	"spdif_out_ao_6", "spdif_out_ao_13",
> ?};
> ?
> +static const char * const cec_ao_groups[] = {
> +	"ao_cec", "ee_cec",
> +};
> +
> ?static struct meson_pmx_func meson_gxbb_periphs_functions[] = {
> ?	FUNCTION(gpio_periphs),
> ?	FUNCTION(emmc),
> @@ -793,6 +802,7 @@
> ?	FUNCTION(pwm_ao_b),
> ?	FUNCTION(i2s_out_ao),
> ?	FUNCTION(spdif_out_ao),
> +	FUNCTION(cec_ao),
> ?};
> ?
> ?static struct meson_bank meson_gxbb_periphs_banks[] = {

[PATCH 3/5] pinctrl: meson-gxbb: Add CEC pins

[Linus Walleij]

On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
<narmstrong@baylibre.com> wrote:

> Add the AO and EE domain CEC pins for the Amlogic Meson GXBB SoCs.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Patch applied with Jerome's review tag.

Yours,
Linus Walleij

[PATCH 4/5] pinctrl: meson-gxl: Add CEC pins

[Neil Armstrong]

Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 454d73f..7d81287 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -282,6 +282,9 @@
 static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0) };
 static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, 0) };
 
+static const unsigned int ao_cec_pins[]		= { PIN(GPIOAO_8, 0) };
+static const unsigned int ee_cec_pins[]		= { PIN(GPIOAO_8, 0) };
+
 static struct meson_pmx_group meson_gxl_periphs_groups[] = {
 	GPIO_GROUP(GPIOZ_0, EE_OFF),
 	GPIO_GROUP(GPIOZ_1, EE_OFF),
@@ -527,6 +530,8 @@
 	GROUP(i2s_out_ch45_ao,	1,	1),
 	GROUP(spdif_out_ao_6,	0,	16),
 	GROUP(spdif_out_ao_9,	0,	4),
+	GROUP(ao_cec,		0,	15),
+	GROUP(ee_cec,		0,	14),
 };
 
 static const char * const gpio_periphs_groups[] = {
@@ -702,6 +707,10 @@
 	"spdif_out_ao_6", "spdif_out_ao_9",
 };
 
+static const char * const cec_ao_groups[] = {
+	"ao_cec", "ee_cec",
+};
+
 static struct meson_pmx_func meson_gxl_periphs_functions[] = {
 	FUNCTION(gpio_periphs),
 	FUNCTION(emmc),
@@ -740,6 +749,7 @@
 	FUNCTION(pwm_ao_b),
 	FUNCTION(i2s_out_ao),
 	FUNCTION(spdif_out_ao),
+	FUNCTION(cec_ao),
 };
 
 static struct meson_bank meson_gxl_periphs_banks[] = {
-- 
1.9.1

[PATCH 4/5] pinctrl: meson-gxl: Add CEC pins

[Jerome Brunet]

On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.

Same comment as patch 3 in the same series

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> ?drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
> ?1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 454d73f..7d81287 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -282,6 +282,9 @@
> ?static const unsigned int spdif_out_ao_6_pins[]	= { PIN(GPIOAO_6, 0)
> };
> ?static const unsigned int spdif_out_ao_9_pins[]	= { PIN(GPIOAO_9, 0)
> };
> ?
> +static const unsigned int ao_cec_pins[]		= { PIN(GPIOAO_8, 0)
> };
> +static const unsigned int ee_cec_pins[]		= { PIN(GPIOAO_8, 0)
> };
> +
> ?static struct meson_pmx_group meson_gxl_periphs_groups[] = {
> ?	GPIO_GROUP(GPIOZ_0, EE_OFF),
> ?	GPIO_GROUP(GPIOZ_1, EE_OFF),
> @@ -527,6 +530,8 @@
> ?	GROUP(i2s_out_ch45_ao,	1,	1),
> ?	GROUP(spdif_out_ao_6,	0,	16),
> ?	GROUP(spdif_out_ao_9,	0,	4),
> +	GROUP(ao_cec,		0,	15),
> +	GROUP(ee_cec,		0,	14),
> ?};
> ?
> ?static const char * const gpio_periphs_groups[] = {
> @@ -702,6 +707,10 @@
> ?	"spdif_out_ao_6", "spdif_out_ao_9",
> ?};
> ?
> +static const char * const cec_ao_groups[] = {
> +	"ao_cec", "ee_cec",
> +};
> +
> ?static struct meson_pmx_func meson_gxl_periphs_functions[] = {
> ?	FUNCTION(gpio_periphs),
> ?	FUNCTION(emmc),
> @@ -740,6 +749,7 @@
> ?	FUNCTION(pwm_ao_b),
> ?	FUNCTION(i2s_out_ao),
> ?	FUNCTION(spdif_out_ao),
> +	FUNCTION(cec_ao),
> ?};
> ?
> ?static struct meson_bank meson_gxl_periphs_banks[] = {

[PATCH 4/5] pinctrl: meson-gxl: Add CEC pins

[Linus Walleij]

On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
<narmstrong@baylibre.com> wrote:

> Add the AO and EE domain CEC pins for the Amlogic Meson GXL SoCs.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Patch applied with Jerome's review tag.

Yours,
Linus Walleij

[PATCH 5/5] pinctrl: meson-gxl: Add Ethernet PHY LEDS pins

[Neil Armstrong]

The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables
the Link and Activity LEDs signals.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
index 7d81287..78a9af5 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
@@ -239,6 +239,9 @@
 
 static const unsigned int spdif_out_h_pins[]	= { PIN(GPIOH_4, EE_OFF) };
 
+static const unsigned int eth_link_led_pins[]	= { PIN(GPIOZ_14, EE_OFF) };
+static const unsigned int eth_act_led_pins[]	= { PIN(GPIOZ_15, EE_OFF) };
+
 static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {
 	MESON_PIN(GPIOAO_0, 0),
 	MESON_PIN(GPIOAO_1, 0),
@@ -437,6 +440,8 @@
 	GROUP(i2s_out_ch23_z,	3,	26),
 	GROUP(i2s_out_ch45_z,	3,	25),
 	GROUP(i2s_out_ch67_z,	3,	24),
+	GROUP(eth_link_led,	4,	25),
+	GROUP(eth_act_led,	4,	24),
 
 	/* Bank H */
 	GROUP(hdmi_hpd,		6,	31),
@@ -665,6 +670,10 @@
 	"spdif_out_h",
 };
 
+static const char * const eth_led_groups[] = {
+	"eth_link_led", "eth_act_led",
+};
+
 static const char * const gpio_aobus_groups[] = {
 	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
 	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
@@ -736,6 +745,7 @@
 	FUNCTION(hdmi_i2c),
 	FUNCTION(i2s_out),
 	FUNCTION(spdif_out),
+	FUNCTION(eth_led),
 };
 
 static struct meson_pmx_func meson_gxl_aobus_functions[] = {
-- 
1.9.1

[PATCH 5/5] pinctrl: meson-gxl: Add Ethernet PHY LEDS pins

[Jerome Brunet]

On Wed, 2017-05-24 at 10:20 +0200, Neil Armstrong wrote:
> The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables
> the Link and Activity LEDs signals.

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>

> 
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> ?drivers/pinctrl/meson/pinctrl-meson-gxl.c | 10 ++++++++++
> ?1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> index 7d81287..78a9af5 100644
> --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c
> @@ -239,6 +239,9 @@
> ?
> ?static const unsigned int spdif_out_h_pins[]	= { PIN(GPIOH_4, EE_OFF)
> };
> ?
> +static const unsigned int eth_link_led_pins[]	= { PIN(GPIOZ_14,
> EE_OFF) };
> +static const unsigned int eth_act_led_pins[]	= { PIN(GPIOZ_15, EE_OFF)
> };
> +
> ?static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = {
> ?	MESON_PIN(GPIOAO_0, 0),
> ?	MESON_PIN(GPIOAO_1, 0),
> @@ -437,6 +440,8 @@
> ?	GROUP(i2s_out_ch23_z,	3,	26),
> ?	GROUP(i2s_out_ch45_z,	3,	25),
> ?	GROUP(i2s_out_ch67_z,	3,	24),
> +	GROUP(eth_link_led,	4,	25),
> +	GROUP(eth_act_led,	4,	24),
> ?
> ?	/* Bank H */
> ?	GROUP(hdmi_hpd,		6,	31),
> @@ -665,6 +670,10 @@
> ?	"spdif_out_h",
> ?};
> ?
> +static const char * const eth_led_groups[] = {
> +	"eth_link_led", "eth_act_led",
> +};
> +
> ?static const char * const gpio_aobus_groups[] = {
> ?	"GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4",
> ?	"GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9",
> @@ -736,6 +745,7 @@
> ?	FUNCTION(hdmi_i2c),
> ?	FUNCTION(i2s_out),
> ?	FUNCTION(spdif_out),
> +	FUNCTION(eth_led),
> ?};
> ?
> ?static struct meson_pmx_func meson_gxl_aobus_functions[] = {

[PATCH 5/5] pinctrl: meson-gxl: Add Ethernet PHY LEDS pins

[Linus Walleij]

On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
<narmstrong@baylibre.com> wrote:

> The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables
> the Link and Activity LEDs signals.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

Patch applied with Jerome's review tag.

Yours,
Linus Walleij

[PATCH 5/5] pinctrl: meson-gxl: Add Ethernet PHY LEDS pins

[Neil Armstrong]

On 05/29/2017 11:01 AM, Linus Walleij wrote:
> On Wed, May 24, 2017 at 10:20 AM, Neil Armstrong
> <narmstrong@baylibre.com> wrote:
> 
>> The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs enables
>> the Link and Activity LEDs signals.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> 
> Patch applied with Jerome's review tag.
> 
> Yours,
> Linus Walleij
> 

Thanks Linus !

Neil