* [GIT PULL] Allwinner clock fixes for 5.0
@ 2019-02-08 10:45 Maxime Ripard
2019-02-13 17:52 ` Stephen Boyd
0 siblings, 1 reply; 2+ messages in thread
From: Maxime Ripard @ 2019-02-08 10:45 UTC (permalink / raw)
To: Mike Turquette, Stephen Boyd
Cc: Maxime Ripard, Chen-Yu Tsai, linux-clk, linux-arm-kernel
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Hi Mike, Stephen,
Please pull the following PR for the current release.
Thanks!
Maxime
The following changes since commit bfeffd155283772bbe78c6a05dec7c0128ee500c:
Linux 5.0-rc1 (2019-01-06 17:08:20 -0800)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git tags/sunxi-clk-fixes-for-5.0
for you to fetch changes up to ee0b27a3a4da0b0ed2318aa092f8856896e9450b:
clk: sunxi: A31: Fix wrong AHB gate number (2019-01-28 09:26:32 +0100)
----------------------------------------------------------------
Allwinner clock fixes for 5.0
Two fixes for clock indices, one for the A31 and one for the V3s.
----------------------------------------------------------------
Andre Przywara (1):
clk: sunxi: A31: Fix wrong AHB gate number
Paul Kocialkowski (1):
clk: sunxi-ng: v3s: Fix TCON reset de-assert bit
drivers/clk/sunxi-ng/ccu-sun6i-a31.c | 4 ++--
drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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* Re: [GIT PULL] Allwinner clock fixes for 5.0
2019-02-08 10:45 [GIT PULL] Allwinner clock fixes for 5.0 Maxime Ripard
@ 2019-02-13 17:52 ` Stephen Boyd
0 siblings, 0 replies; 2+ messages in thread
From: Stephen Boyd @ 2019-02-13 17:52 UTC (permalink / raw)
To: Maxime Ripard, Mike Turquette, Stephen Boyd
Cc: Maxime Ripard, Chen-Yu Tsai, linux-clk, linux-arm-kernel
Quoting Maxime Ripard (2019-02-08 02:45:19)
> Hi Mike, Stephen,
>
> Please pull the following PR for the current release.
>
Ok. It's sort of late but I'll try to send it off this coming Friday.
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