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From: CK Hu <ck.hu@mediatek.com>
To: <yongqiang.niu@mediatek.com>
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
	Bibby.Hsieh@mediatek.com, airlied@linux.ie,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	yt.shen@mediatek.com, robh+dt@kernel.org,
	linux-mediatek@lists.infradead.org, p.zabel@pengutronix.de,
	matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l
Date: Tue, 16 Apr 2019 15:38:17 +0800	[thread overview]
Message-ID: <1555400297.29874.2.camel@mtksdaap41> (raw)
In-Reply-To: <1553667561-25447-18-git-send-email-yongqiang.niu@mediatek.com>

Hi, Yongqiang:

On Wed, 2019-03-27 at 14:19 +0800, yongqiang.niu@mediatek.com wrote:
> From: Yongqiang Niu <yongqiang.niu@mediatek.com>
> 
> This patch add background color input select function for ovl/ovl_2l
> 
> ovl include 4 DRAM layer and 1 background color layer
> ovl_2l include 4 DRAM layer and 1 background color layer
> DRAM layer frame buffer data from render hardware, GPU for example.
> backgournd color layer is embed in ovl/ovl_2l, we can only set
> it color, but not support DRAM frame buffer.
> 
> for ovl0->ovl0_2l direct link usecase,
> we need set ovl0_2l background color intput select from ovl0
> if render send DRAM buffer layer number <=4, all these layer read
> by ovl.
> layer0 is at the bottom of all layers.
> layer3 is at the top of all layers.
> if render send DRAM buffer layer numbfer >=4 && <=6
> ovl0 read layer0~3
> ovl0_2l read layer4~5
> layer5 is at the top ot all these layers.
> 
> the decision of how to setting ovl0/ovl0_2l read these layer data
> is controlled in mtk crtc, which will be another patch
> 
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index a0ab760..c226284 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -27,6 +27,8 @@
>  #define DISP_REG_OVL_EN				0x000c
>  #define DISP_REG_OVL_RST			0x0014
>  #define DISP_REG_OVL_ROI_SIZE			0x0020
> +#define DISP_REG_OVL_DATAPATH_CON		0x0024
> +#define OVL_BGCLR_SEL_IN                        BIT(2)
>  #define DISP_REG_OVL_ROI_BGCLR			0x0028
>  #define DISP_REG_OVL_SRC_CON			0x002c
>  #define DISP_REG_OVL_CON(n)			(0x0030 + 0x20 * (n))
> @@ -245,6 +247,26 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  		mtk_ovl_layer_on(comp, idx);
>  }
>  
> +static void mtk_ovl_bgclr_in_on(struct mtk_ddp_comp *comp,
> +				enum mtk_ddp_comp_id prev)
> +{
> +	int is_ovl = 0;
> +
> +        if (prev == DDP_COMPONENT_OVL0 ||
> +            prev == DDP_COMPONENT_OVL0_2L ||
> +            prev == DDP_COMPONENT_OVL1_2L)
> +		is_ovl = 1;

I think this logic should be moved to mtk crtc and OVL need not to care
about which component is in front of it.

Regards,
CK

> +
> +	mtk_ddp_write_mask((is_ovl << 2), comp,
> +			   DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN);
> +}
> +
> +static void mtk_ovl_bgclr_in_off(struct mtk_ddp_comp *comp)
> +{
> +        mtk_ddp_write_mask(0, comp,
> +                           DISP_REG_OVL_DATAPATH_CON, OVL_BGCLR_SEL_IN);
> +}
> +
>  static const struct mtk_ddp_comp_funcs mtk_disp_ovl_funcs = {
>  	.config = mtk_ovl_config,
>  	.start = mtk_ovl_start,
> @@ -255,6 +277,8 @@ static void mtk_ovl_layer_config(struct mtk_ddp_comp *comp, unsigned int idx,
>  	.layer_on = mtk_ovl_layer_on,
>  	.layer_off = mtk_ovl_layer_off,
>  	.layer_config = mtk_ovl_layer_config,
> +	.bgclr_in_on = mtk_ovl_bgclr_in_on,
> +	.bgclr_in_off = mtk_ovl_bgclr_in_off,
>  };
>  
>  static int mtk_disp_ovl_bind(struct device *dev, struct device *master,



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  reply	other threads:[~2019-04-16  7:38 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-27  6:18 [PATCH v2 00/25] add drm support for MT8183 yongqiang.niu
2019-03-27  6:18 ` [PATCH v2 01/25] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-03-28  3:18   ` CK Hu
2019-03-27  6:18 ` [PATCH v2 02/25] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-03-27  9:39   ` CK Hu
2019-03-31  6:42   ` Rob Herring
2019-03-27  6:18 ` [PATCH v2 03/25] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-03-28  1:33   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 04/25] drm/mediatek: add mutex sof " yongqiang.niu
2019-03-28  3:02   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 05/25] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-03-28  3:37   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 06/25] drm/mediatek: redefine mtk_ddp_sout_sel yongqiang.niu
2019-04-11  6:09   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 07/25] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-04-11  5:30   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 08/25] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-04-11  5:57   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 09/25] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-04-11 10:42   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 10/25] drm/mediatek: add commponent OVL0_2L yongqiang.niu
2019-04-11  6:14   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 11/25] drm/mediatek: add component OVL1_2L yongqiang.niu
2019-03-27  6:19 ` [PATCH v2 12/25] drm/mediatek: add component DITHER yongqiang.niu
2019-04-11  6:28   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 13/25] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-04-11  6:48   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 14/25] drm/medaitek: add layer_nr " yongqiang.niu
2019-04-11 10:57   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 15/25] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-04-11 11:01   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 16/25] drm/mediatek: add ddp write register common api yongqiang.niu
2019-04-11 11:15   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 17/25] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-04-16  7:38   ` CK Hu [this message]
2019-03-27  6:19 ` [PATCH v2 18/25] drm/mediatek: add RDMA fifo size error handle yongqiang.niu
2019-04-16  8:00   ` CK Hu
2019-04-16  8:37     ` Yongqiang Niu
2019-04-16 11:31       ` YT Shen
2019-03-27  6:19 ` [PATCH v2 19/25] drm/mediatek: add function mtk_ddp_comp_get_type yongqiang.niu
2019-03-27  6:19 ` [PATCH v2 20/25] drm/mediatek: add ovl0/ovl0_2l usecase yongqiang.niu
2019-04-16  8:20   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 21/25] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-04-11 10:33   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 22/25] drm/mediatek: adjust ddp clock control flow yongqiang.niu
2019-04-16  8:24   ` CK Hu
2019-05-28  5:35     ` CK Hu
2019-03-27  6:19 ` [PATCH v2 23/25] drm/mediatek: add vmap support for mediatek drm yongqiang.niu
2019-04-16  8:30   ` CK Hu
2019-03-27  6:19 ` [PATCH v2 24/25] drm/mediatek: respect page offset for PRIME mmap calls yongqiang.niu
2019-04-16  8:33   ` CK Hu
2019-05-28  5:35     ` CK Hu
2019-03-27  6:19 ` [PATCH v2 25/25] drm/mediatek: enable allow_fb_modifiers for mediatek drm yongqiang.niu

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