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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
	chao.hao@mediatek.com, linux-kernel@vger.kernel.org,
	Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org, yong.wu@mediatek.com,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Matthias Kaehlcke <mka@chromium.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v10 17/23] iommu/mediatek: Add mt8183 IOMMU support
Date: Wed, 21 Aug 2019 21:53:20 +0800
Message-ID: <1566395606-7975-18-git-send-email-yong.wu@mediatek.com> (raw)
In-Reply-To: <1566395606-7975-1-git-send-email-yong.wu@mediatek.com>

The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
the ARM Short-descriptor like mt8173, and most of the HW registers
are the same.

Here list main differences between mt8183 and mt8173/mt2712:
1) mt8183 has only one M4U HW like mt8173 while mt2712 has two.
2) mt8183 don't have the "bclk" clock, it use the EMI clock instead.
3) mt8183 can support the dram over 4GB, but it doesn't call this "4GB
mode".
4) mt8183 pgtable base register(0x0) extend bit[1:0] which represent
the bit[33:32] in the physical address of the pgtable base, But the
standard ttbr0[1] means the S bit which is enabled defaultly, Hence,
we add a mask.
5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
6) mt8183 need reset_axi like mt8173.
7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
---
 drivers/iommu/mtk_iommu.c | 15 ++++++++++++---
 drivers/iommu/mtk_iommu.h |  1 +
 drivers/memory/mtk-smi.c  | 20 ++++++++++++++++++++
 3 files changed, 33 insertions(+), 3 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index eaf6a23..ee3a664 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -28,6 +28,7 @@
 #include "mtk_iommu.h"
 
 #define REG_MMU_PT_BASE_ADDR			0x000
+#define MMU_PT_ADDR_MASK			GENMASK(31, 7)
 
 #define REG_MMU_INVALIDATE			0x020
 #define F_ALL_INVLD				0x2
@@ -357,7 +358,7 @@ static int mtk_iommu_attach_device(struct iommu_domain *domain,
 	/* Update the pgtable base address register of the M4U HW */
 	if (!data->m4u_dom) {
 		data->m4u_dom = dom;
-		writel(dom->cfg.arm_v7s_cfg.ttbr[0],
+		writel(dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
 		       data->base + REG_MMU_PT_BASE_ADDR);
 	}
 
@@ -737,6 +738,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
 {
 	struct mtk_iommu_data *data = dev_get_drvdata(dev);
 	struct mtk_iommu_suspend_reg *reg = &data->reg;
+	struct mtk_iommu_domain *m4u_dom = data->m4u_dom;
 	void __iomem *base = data->base;
 	int ret;
 
@@ -752,8 +754,8 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
 	writel_relaxed(reg->int_control0, base + REG_MMU_INT_CONTROL0);
 	writel_relaxed(reg->int_main_control, base + REG_MMU_INT_MAIN_CONTROL);
 	writel_relaxed(reg->ivrp_paddr, base + REG_MMU_IVRP_PADDR);
-	if (data->m4u_dom)
-		writel(data->m4u_dom->cfg.arm_v7s_cfg.ttbr[0],
+	if (m4u_dom)
+		writel(m4u_dom->cfg.arm_v7s_cfg.ttbr[0] & MMU_PT_ADDR_MASK,
 		       base + REG_MMU_PT_BASE_ADDR);
 	return 0;
 }
@@ -778,9 +780,16 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
 	.larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
 };
 
+static const struct mtk_iommu_plat_data mt8183_data = {
+	.m4u_plat     = M4U_MT8183,
+	.reset_axi    = true,
+	.larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
 	{ .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
 	{ .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
+	{ .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
 	{}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 973d6e0..6b1f833 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -30,6 +30,7 @@ enum mtk_iommu_plat {
 	M4U_MT2701,
 	M4U_MT2712,
 	M4U_MT8173,
+	M4U_MT8183,
 };
 
 struct mtk_iommu_plat_data {
diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index 53bd379..3dd05de 100644
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memory/mtk-smi.c
@@ -277,6 +277,13 @@ static void mtk_smi_larb_config_port_gen1(struct device *dev)
 	.larb_direct_to_common_mask = BIT(8) | BIT(9),      /* bdpsys */
 };
 
+static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183 = {
+	.has_gals                   = true,
+	.config_port                = mtk_smi_larb_config_port_gen2_general,
+	.larb_direct_to_common_mask = BIT(2) | BIT(3) | BIT(7),
+				      /* IPU0 | IPU1 | CCU */
+};
+
 static const struct of_device_id mtk_smi_larb_of_ids[] = {
 	{
 		.compatible = "mediatek,mt8173-smi-larb",
@@ -290,6 +297,10 @@ static void mtk_smi_larb_config_port_gen1(struct device *dev)
 		.compatible = "mediatek,mt2712-smi-larb",
 		.data = &mtk_smi_larb_mt2712
 	},
+	{
+		.compatible = "mediatek,mt8183-smi-larb",
+		.data = &mtk_smi_larb_mt8183
+	},
 	{}
 };
 
@@ -383,6 +394,11 @@ static int mtk_smi_larb_remove(struct platform_device *pdev)
 	.gen = MTK_SMI_GEN2,
 };
 
+static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
+	.gen      = MTK_SMI_GEN2,
+	.has_gals = true,
+};
+
 static const struct of_device_id mtk_smi_common_of_ids[] = {
 	{
 		.compatible = "mediatek,mt8173-smi-common",
@@ -396,6 +412,10 @@ static int mtk_smi_larb_remove(struct platform_device *pdev)
 		.compatible = "mediatek,mt2712-smi-common",
 		.data = &mtk_smi_common_gen2,
 	},
+	{
+		.compatible = "mediatek,mt8183-smi-common",
+		.data = &mtk_smi_common_mt8183,
+	},
 	{}
 };
 
-- 
1.9.1


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  parent reply index

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-21 13:53 [PATCH v10 00/23] MT8183 IOMMU SUPPORT Yong Wu
2019-08-21 13:53 ` [PATCH v10 01/23] dt-bindings: mediatek: Add binding for mt8183 IOMMU and SMI Yong Wu
2019-08-21 13:53 ` [PATCH v10 02/23] iommu/mediatek: Use a struct as the platform data Yong Wu
2019-08-21 13:53 ` [PATCH v10 03/23] memory: mtk-smi: Use a general config_port interface Yong Wu
2019-08-21 13:53 ` [PATCH v10 04/23] memory: mtk-smi: Use a struct for the platform data for smi-common Yong Wu
2019-08-21 13:53 ` [PATCH v10 05/23] iommu/mediatek: Fix iova_to_phys PA start for 4GB mode Yong Wu
2019-08-21 13:53 ` [PATCH v10 06/23] iommu/io-pgtable-arm-v7s: Add paddr_to_iopte and iopte_to_paddr helpers Yong Wu
2019-08-21 13:53 ` [PATCH v10 07/23] iommu/io-pgtable-arm-v7s: Use ias/oas to check the valid iova/pa Yong Wu
2019-08-21 15:25   ` Will Deacon
2019-08-21 13:53 ` [PATCH v10 08/23] iommu/io-pgtable-arm-v7s: Rename the quirk from MTK_4GB to MTK_EXT Yong Wu
2019-08-21 15:25   ` Will Deacon
2019-08-21 13:53 ` [PATCH v10 09/23] iommu/io-pgtable-arm-v7s: Extend to support PA[33:32] for MediaTek Yong Wu
2019-08-21 15:24   ` Will Deacon
2019-08-21 15:34     ` Robin Murphy
2019-08-21 16:35       ` Will Deacon
2019-08-22  8:59       ` Yong Wu
2019-08-22  8:56     ` Yong Wu
2019-08-22 10:08       ` Will Deacon
2019-08-22 10:08       ` Robin Murphy
2019-08-22 10:17         ` Will Deacon
2019-08-22 10:57           ` Robin Murphy
2019-08-22 11:28             ` Will Deacon
2019-08-22 12:05               ` Yong Wu
2019-08-22 17:14                 ` Will Deacon
2019-08-21 13:53 ` [PATCH v10 10/23] iommu/mediatek: Adjust the PA for the 4GB Mode Yong Wu
2019-08-21 13:53 ` [PATCH v10 11/23] iommu/mediatek: Add bclk can be supported optionally Yong Wu
2019-08-21 13:53 ` [PATCH v10 12/23] iommu/mediatek: Add larb-id remapped support Yong Wu
2019-08-21 13:53 ` [PATCH v10 13/23] iommu/mediatek: Refine protect memory definition Yong Wu
2019-08-21 13:53 ` [PATCH v10 14/23] iommu/mediatek: Move reset_axi into plat_data Yong Wu
2019-08-21 13:53 ` [PATCH v10 15/23] iommu/mediatek: Move vld_pa_rng " Yong Wu
2019-08-21 13:53 ` [PATCH v10 16/23] memory: mtk-smi: Add gals support Yong Wu
2019-08-21 13:53 ` Yong Wu [this message]
2019-08-21 13:53 ` [PATCH v10 18/23] iommu/mediatek: Add mmu1 support Yong Wu
2019-08-21 13:53 ` [PATCH v10 19/23] memory: mtk-smi: Invoke pm runtime_callback to enable clocks Yong Wu
2019-08-21 13:53 ` [PATCH v10 20/23] memory: mtk-smi: Add bus_sel for mt8183 Yong Wu
2019-08-21 13:53 ` [PATCH v10 21/23] iommu/mediatek: Fix VLD_PA_RNG register backup when suspend Yong Wu
2019-08-21 13:53 ` [PATCH v10 22/23] memory: mtk-smi: Get rid of need_larbid Yong Wu
2019-08-21 13:53 ` [PATCH v10 23/23] iommu/mediatek: Clean up struct mtk_smi_iommu Yong Wu
2019-08-22 14:07   ` Matthias Brugger

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