* [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family
@ 2019-09-12 8:19 Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
` (5 more replies)
0 siblings, 6 replies; 7+ messages in thread
From: Jianxin Pan @ 2019-09-12 8:19 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
A1 is an application processor designed for smart audio and IoT applications,
with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
there is no Cortex-M3 AO CPU in it.
This serial add basic support for the Amlogic A1 based Amlogic AD401 board:
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.
The pclk for uart_AO_B need to be fixed once A1 clock driver is merged.
In this version, it rely on bootloader to enable the pclk gate
Changes since v3 at [2]:
- remove 0x in bus
Changes since v2 at [1]:
- add bus in dts according Martin's suggestion
- remove useless comment line
Changes since v1 at [0]:
- fix coding style
- collect Reviewed-by
[0] https://lore.kernel.org/linux-amlogic/1567493475-75451-1-git-send-email-jianxin.pan@amlogic.com
[1] https://lore.kernel.org/linux-amlogic/1567667251-33466-1-git-send-email-jianxin.pan@amlogic.com
[2] https://lore.kernel.org/linux-amlogic/1568216290-84219-1-git-send-email-jianxin.pan@amlogic.com
Jianxin Pan (4):
soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
dt-bindings: arm: amlogic: add A1 bindings
dt-bindings: arm: amlogic: add Amlogic AD401 bindings
arm64: dts: add support for A1 based Amlogic AD401
Documentation/devicetree/bindings/arm/amlogic.yaml | 6 +
arch/arm64/boot/dts/amlogic/Makefile | 1 +
arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts | 30 +++++
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 130 +++++++++++++++++++++
drivers/soc/amlogic/meson-gx-socinfo.c | 2 +
5 files changed, 169 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1.dtsi
--
2.7.4
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
@ 2019-09-12 8:19 ` Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 2/4] dt-bindings: arm: amlogic: add A1 bindings Jianxin Pan
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jianxin Pan @ 2019-09-12 8:19 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
Add the SoC IDs for the A113L Amlogic A1 SoC.
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
---
drivers/soc/amlogic/meson-gx-socinfo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c
index 6d0d04f..3c86d8d 100644
--- a/drivers/soc/amlogic/meson-gx-socinfo.c
+++ b/drivers/soc/amlogic/meson-gx-socinfo.c
@@ -40,6 +40,7 @@ static const struct meson_gx_soc_id {
{ "G12A", 0x28 },
{ "G12B", 0x29 },
{ "SM1", 0x2b },
+ { "A1", 0x2c },
};
static const struct meson_gx_package_id {
@@ -68,6 +69,7 @@ static const struct meson_gx_package_id {
{ "S922X", 0x29, 0x40, 0xf0 },
{ "A311D", 0x29, 0x10, 0xf0 },
{ "S905X3", 0x2b, 0x5, 0xf },
+ { "A113L", 0x2c, 0x0, 0xf8 },
};
static inline unsigned int socinfo_to_major(u32 socinfo)
--
2.7.4
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v4 2/4] dt-bindings: arm: amlogic: add A1 bindings
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
@ 2019-09-12 8:19 ` Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings Jianxin Pan
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jianxin Pan @ 2019-09-12 8:19 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
Add bindings for the new Amlogic A1 SoC family.
A1 is an application processor designed for smart audio and IoT applications,
with dual core Cortex-A35.
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 99015ce..0ef45ac 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -156,4 +156,8 @@ properties:
- seirobotics,sei610
- khadas,vim3l
- const: amlogic,sm1
+
+ - description: Boards with the Amlogic Meson A1 A113L SoC
+ items:
+ - const: amlogic,a1
...
--
2.7.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v4 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 2/4] dt-bindings: arm: amlogic: add A1 bindings Jianxin Pan
@ 2019-09-12 8:19 ` Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 4/4] arm64: dts: add support for A1 based Amlogic AD401 Jianxin Pan
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Jianxin Pan @ 2019-09-12 8:19 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
Add the compatible for the Amlogic A1 Based AD401 board.
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/arm/amlogic.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
index 0ef45ac..ee5703c 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.yaml
+++ b/Documentation/devicetree/bindings/arm/amlogic.yaml
@@ -159,5 +159,7 @@ properties:
- description: Boards with the Amlogic Meson A1 A113L SoC
items:
+ - enum:
+ - amlogic,ad401
- const: amlogic,a1
...
--
2.7.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v4 4/4] arm64: dts: add support for A1 based Amlogic AD401
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
` (2 preceding siblings ...)
2019-09-12 8:19 ` [PATCH v4 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings Jianxin Pan
@ 2019-09-12 8:19 ` Jianxin Pan
2019-09-14 17:28 ` [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Martin Blumenstingl
2019-09-24 19:07 ` Kevin Hilman
5 siblings, 0 replies; 7+ messages in thread
From: Jianxin Pan @ 2019-09-12 8:19 UTC (permalink / raw)
To: Kevin Hilman, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
Add basic support for the Amlogic A1 based Amlogic AD401 board:
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm64/boot/dts/amlogic/Makefile | 1 +
arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts | 30 ++++++
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 130 +++++++++++++++++++++++++
3 files changed, 161 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1.dtsi
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 84afecb..a90be52 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -36,3 +36,4 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
+dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts b/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
new file mode 100644
index 00000000..69c25c6
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+/dts-v1/;
+
+#include "meson-a1.dtsi"
+
+/ {
+ compatible = "amlogic,ad401", "amlogic,a1";
+ model = "Amlogic Meson A1 AD401 Development Board";
+
+ aliases {
+ serial0 = &uart_AO_B;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000000>;
+ };
+};
+
+&uart_AO_B {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
new file mode 100644
index 00000000..7210ad0
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "amlogic,a1";
+
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a35";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0x0 0x800000>;
+ alignment = <0x0 0x400000>;
+ linux,cma-default;
+ };
+ };
+
+ sm: secure-monitor {
+ compatible = "amlogic,meson-gxbb-sm";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ apb: bus@fe000000 {
+ compatible = "simple-bus";
+ reg = <0x0 0xfe000000 0x0 0x1000000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
+
+ uart_AO: serial@1c00 {
+ compatible = "amlogic,meson-gx-uart",
+ "amlogic,meson-ao-uart";
+ reg = <0x0 0x1c00 0x0 0x18>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&xtal>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+
+ uart_AO_B: serial@2000 {
+ compatible = "amlogic,meson-gx-uart",
+ "amlogic,meson-ao-uart";
+ reg = <0x0 0x2000 0x0 0x18>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&xtal>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+ };
+
+ gic: interrupt-controller@ff901000 {
+ compatible = "arm,gic-400";
+ reg = <0x0 0xff901000 0x0 0x1000>,
+ <0x0 0xff902000 0x0 0x2000>,
+ <0x0 0xff904000 0x0 0x2000>,
+ <0x0 0xff906000 0x0 0x2000>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13
+ (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14
+ (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11
+ (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10
+ (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ xtal: xtal-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "xtal";
+ #clock-cells = <0>;
+ };
+};
--
2.7.4
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^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
` (3 preceding siblings ...)
2019-09-12 8:19 ` [PATCH v4 4/4] arm64: dts: add support for A1 based Amlogic AD401 Jianxin Pan
@ 2019-09-14 17:28 ` Martin Blumenstingl
2019-09-24 19:07 ` Kevin Hilman
5 siblings, 0 replies; 7+ messages in thread
From: Martin Blumenstingl @ 2019-09-14 17:28 UTC (permalink / raw)
To: Jianxin Pan
Cc: devicetree, Hanjie Lin, Victor Wan, Neil Armstrong, Kevin Hilman,
linux-kernel, Qiufang Dai, Rob Herring, Jian Hu, Xingyu Chen,
Tao Zeng, Carlo Caione, linux-amlogic, linux-arm-kernel,
Jerome Brunet
Hi Jianxin,
On Thu, Sep 12, 2019 at 10:20 AM Jianxin Pan <jianxin.pan@amlogic.com> wrote:
>
> A1 is an application processor designed for smart audio and IoT applications,
> with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
> there is no Cortex-M3 AO CPU in it.
it will be interesting to see which devices will use this SoC
[...]
> Jianxin Pan (4):
> soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
> dt-bindings: arm: amlogic: add A1 bindings
> dt-bindings: arm: amlogic: add Amlogic AD401 bindings
> arm64: dts: add support for A1 based Amlogic AD401
for the whole series:
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family
2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
` (4 preceding siblings ...)
2019-09-14 17:28 ` [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Martin Blumenstingl
@ 2019-09-24 19:07 ` Kevin Hilman
5 siblings, 0 replies; 7+ messages in thread
From: Kevin Hilman @ 2019-09-24 19:07 UTC (permalink / raw)
To: Jianxin Pan, linux-amlogic
Cc: devicetree, Hanjie Lin, Victor Wan, Jianxin Pan, Neil Armstrong,
Martin Blumenstingl, linux-kernel, Qiufang Dai, Rob Herring,
Jian Hu, Xingyu Chen, Carlo Caione, Tao Zeng, linux-arm-kernel,
Jerome Brunet
Jianxin Pan <jianxin.pan@amlogic.com> writes:
> A1 is an application processor designed for smart audio and IoT applications,
> with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
> there is no Cortex-M3 AO CPU in it.
>
> This serial add basic support for the Amlogic A1 based Amlogic AD401 board:
> which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
> Timer, UART. It's capable of booting up into the serial console.
>
> The pclk for uart_AO_B need to be fixed once A1 clock driver is merged.
> In this version, it rely on bootloader to enable the pclk gate
Queued for v5.5,
Thanks for the new SoC support,
Kevin
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^ permalink raw reply [flat|nested] 7+ messages in thread
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2019-09-12 8:19 [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 2/4] dt-bindings: arm: amlogic: add A1 bindings Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings Jianxin Pan
2019-09-12 8:19 ` [PATCH v4 4/4] arm64: dts: add support for A1 based Amlogic AD401 Jianxin Pan
2019-09-14 17:28 ` [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family Martin Blumenstingl
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