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* [PATCH v2 0/5] Add support for iMX8MQ Display Controller Subsystem
@ 2019-10-02 14:04 Laurentiu Palcu
  2019-10-02 14:04 ` [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock Laurentiu Palcu
                   ` (2 more replies)
  0 siblings, 3 replies; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-02 14:04 UTC (permalink / raw)
  To: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
	dri-devel, linux-arm-kernel
  Cc: devicetree, agx, linux-kernel, Laurentiu Palcu, linux-clk, l.stach

Hi,

This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).

Support for the rest of the features will be added incrementally, in subsequent
patches.

The patchset was tested with both HDP driver (not yet upstreamed) and MIPI-DSI
(drivers already on the dri-devel ML).

Thanks,
Laurentiu

Changes in v2:
 * Removed '0x' in node's unit-address both in DT and yaml;
 * Made the address region size lowercase, to be consistent;
 * Removed some left-over references to P010;
 * Added a Kconfig dependency of DRM && ARCH_MXC. This will also silence compilation
   issues reported by kbuild for other architectures;


Laurentiu Palcu (5):
  clk: imx8mq: Add VIDEO2_PLL clock
  drm/imx: compile imx directory by default
  drm/imx: Add initial support for DCSS on iMX8MQ
  dt-bindings: display: imx: add bindings for DCSS
  arm64: dts: imx8mq: add DCSS node

 .../bindings/display/imx/nxp,imx8mq-dcss.yaml      |  86 +++
 arch/arm64/boot/dts/freescale/imx8mq.dtsi          |  25 +
 drivers/clk/imx/clk-imx8mq.c                       |   4 +
 drivers/gpu/drm/Makefile                           |   2 +-
 drivers/gpu/drm/imx/Kconfig                        |   2 +
 drivers/gpu/drm/imx/Makefile                       |   1 +
 drivers/gpu/drm/imx/dcss/Kconfig                   |   8 +
 drivers/gpu/drm/imx/dcss/Makefile                  |   6 +
 drivers/gpu/drm/imx/dcss/dcss-blkctl.c             |  75 ++
 drivers/gpu/drm/imx/dcss/dcss-crtc.c               | 223 ++++++
 drivers/gpu/drm/imx/dcss/dcss-ctxld.c              | 447 +++++++++++
 drivers/gpu/drm/imx/dcss/dcss-dev.c                | 286 +++++++
 drivers/gpu/drm/imx/dcss/dcss-dev.h                | 195 +++++
 drivers/gpu/drm/imx/dcss/dcss-dpr.c                | 548 ++++++++++++++
 drivers/gpu/drm/imx/dcss/dcss-drv.c                | 182 +++++
 drivers/gpu/drm/imx/dcss/dcss-dtg.c                | 438 +++++++++++
 drivers/gpu/drm/imx/dcss/dcss-kms.c                | 321 ++++++++
 drivers/gpu/drm/imx/dcss/dcss-kms.h                |  52 ++
 drivers/gpu/drm/imx/dcss/dcss-plane.c              | 418 +++++++++++
 drivers/gpu/drm/imx/dcss/dcss-scaler.c             | 826 +++++++++++++++++++++
 drivers/gpu/drm/imx/dcss/dcss-ss.c                 | 179 +++++
 include/dt-bindings/clock/imx8mq-clock.h           |   4 +-
 22 files changed, 4326 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
 create mode 100644 drivers/gpu/drm/imx/dcss/Kconfig
 create mode 100644 drivers/gpu/drm/imx/dcss/Makefile
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-blkctl.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-crtc.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ctxld.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dev.h
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dpr.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-drv.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-dtg.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-kms.h
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-plane.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-scaler.c
 create mode 100644 drivers/gpu/drm/imx/dcss/dcss-ss.c

-- 
2.7.4


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^ permalink raw reply	[flat|nested] 9+ messages in thread
* [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock
  2019-10-02 14:04 [PATCH v2 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
@ 2019-10-02 14:04 ` Laurentiu Palcu
  2019-10-14 11:27   ` Shawn Guo
  2019-10-02 14:04 ` [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
  2019-10-02 14:04 ` [PATCH v2 5/5] arm64: dts: imx8mq: add DCSS node Laurentiu Palcu
  2 siblings, 1 reply; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-02 14:04 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team
  Cc: devicetree, Abel Vesa, agx, linux-kernel, Laurentiu Palcu,
	linux-clk, linux-arm-kernel, l.stach

This clock is needed by DCSS when high resolutions are used.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
CC: Abel Vesa <abel.vesa@nxp.com>
---
 drivers/clk/imx/clk-imx8mq.c             | 4 ++++
 include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 41fc9c6..05ece7b 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -38,6 +38,7 @@ static const char * const sys1_pll_out_sels[] = {"sys1_pll1_ref_sel", };
 static const char * const sys2_pll_out_sels[] = {"sys1_pll1_ref_sel", "sys2_pll1_ref_sel", };
 static const char * const sys3_pll_out_sels[] = {"sys3_pll1_ref_sel", "sys2_pll1_ref_sel", };
 static const char * const dram_pll_out_sels[] = {"dram_pll1_ref_sel", };
+static const char * const video2_pll_out_sels[] = {"video2_pll1_ref_sel", };
 
 /* CCM ROOT */
 static const char * const imx8mq_a53_sels[] = {"osc_25m", "arm_pll_out", "sys2_pll_500m", "sys2_pll_1000m",
@@ -311,6 +312,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
 	clks[IMX8MQ_SYS2_PLL1_REF_SEL]	= imx_clk_mux("sys2_pll1_ref_sel", base + 0x3c, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
 	clks[IMX8MQ_SYS3_PLL1_REF_SEL]	= imx_clk_mux("sys3_pll1_ref_sel", base + 0x48, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
 	clks[IMX8MQ_DRAM_PLL1_REF_SEL]	= imx_clk_mux("dram_pll1_ref_sel", base + 0x60, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
+	clks[IMX8MQ_VIDEO2_PLL1_REF_SEL] = imx_clk_mux("video2_pll1_ref_sel", base + 0x54, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
 
 	clks[IMX8MQ_ARM_PLL_REF_DIV]	= imx_clk_divider("arm_pll_ref_div", "arm_pll_ref_sel", base + 0x28, 5, 6);
 	clks[IMX8MQ_GPU_PLL_REF_DIV]	= imx_clk_divider("gpu_pll_ref_div", "gpu_pll_ref_sel", base + 0x18, 5, 6);
@@ -346,6 +348,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
 	clks[IMX8MQ_SYS2_PLL_OUT] = imx_clk_sccg_pll("sys2_pll_out", sys2_pll_out_sels, ARRAY_SIZE(sys2_pll_out_sels), 0, 0, 1, base + 0x3c, CLK_IS_CRITICAL);
 	clks[IMX8MQ_SYS3_PLL_OUT] = imx_clk_sccg_pll("sys3_pll_out", sys3_pll_out_sels, ARRAY_SIZE(sys3_pll_out_sels), 0, 0, 1, base + 0x48, CLK_IS_CRITICAL);
 	clks[IMX8MQ_DRAM_PLL_OUT] = imx_clk_sccg_pll("dram_pll_out", dram_pll_out_sels, ARRAY_SIZE(dram_pll_out_sels), 0, 0, 0, base + 0x60, CLK_IS_CRITICAL);
+	clks[IMX8MQ_VIDEO2_PLL_OUT] = imx_clk_sccg_pll("video2_pll_out", video2_pll_out_sels, ARRAY_SIZE(video2_pll_out_sels), 0, 0, 0, base + 0x54, 0);
+
 	/* SYS PLL fixed output */
 	clks[IMX8MQ_SYS1_PLL_40M] = imx_clk_fixed_factor("sys1_pll_40m", "sys1_pll_out", 1, 20);
 	clks[IMX8MQ_SYS1_PLL_80M] = imx_clk_fixed_factor("sys1_pll_80m", "sys1_pll_out", 1, 10);
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 6546367..35b9ed9 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -403,5 +403,7 @@
 #define IMX8MQ_CLK_SNVS_ROOT			264
 #define IMX8MQ_CLK_GIC				265
 
-#define IMX8MQ_CLK_END				266
+#define IMX8MQ_VIDEO2_PLL1_REF_SEL		266
+
+#define IMX8MQ_CLK_END				267
 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
-- 
2.7.4


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^ permalink raw reply related	[flat|nested] 9+ messages in thread
* [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS
  2019-10-02 14:04 [PATCH v2 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
  2019-10-02 14:04 ` [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock Laurentiu Palcu
@ 2019-10-02 14:04 ` Laurentiu Palcu
  2019-10-11 14:50   ` Rob Herring
  2019-10-02 14:04 ` [PATCH v2 5/5] arm64: dts: imx8mq: add DCSS node Laurentiu Palcu
  2 siblings, 1 reply; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-02 14:04 UTC (permalink / raw)
  To: Philipp Zabel, Shawn Guo, Sascha Hauer, Pengutronix Kernel Team,
	Fabio Estevam, NXP Linux Team
  Cc: devicetree, agx, linux-kernel, dri-devel, Laurentiu Palcu,
	linux-arm-kernel, l.stach

Add bindings for iMX8MQ Display Controller Subsystem.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
 .../bindings/display/imx/nxp,imx8mq-dcss.yaml      | 86 ++++++++++++++++++++++
 1 file changed, 86 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml

diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
new file mode 100644
index 00000000..efd2494
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2019 NXP
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: iMX8MQ Display Controller Subsystem (DCSS)
+
+maintainers:
+  - Laurentiu Palcu <laurentiu.palcu@nxp.com>
+
+description:
+
+  The DCSS (display controller sub system) is used to source up to three
+  display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
+  2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
+  image processing capabilities are included to provide a solution capable of
+  driving next generation high dynamic range displays.
+
+properties:
+  compatible:
+    const: nxp,imx8mq-dcss
+
+  reg:
+    maxItems: 2
+
+  interrupts:
+    maxItems: 3
+    items:
+      - description: Context loader completion and error interrupt
+      - description: DTG interrupt used to signal context loader trigger time
+      - description: DTG interrupt for Vblank
+
+  interrupt-names:
+    maxItems: 3
+    items:
+      - const: ctx_ld
+      - const: ctxld_kick
+      - const: vblank
+
+  clocks:
+    maxItems: 5
+    items:
+      - description: Display APB clock for all peripheral PIO access interfaces
+      - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL
+      - description: RTRAM clock
+      - description: Pixel clock, can be driver either by HDMI phy clock or MIPI
+      - description: DTRC clock, needed by video decompressor
+
+  clock-names:
+    items:
+      - const: apb
+      - const: axi
+      - const: rtrm
+      - const: pix
+      - const: dtrc
+
+  port@0:
+    type: object
+    description: A port node pointing to a hdmi_in or mipi_in port node.
+
+examples:
+  - |
+    dcss: display-controller@32e00000 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        compatible = "nxp,imx8mq-dcss";
+        reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
+        interrupts = <6>, <8>, <9>;
+        interrupt-names = "ctx_ld", "ctxld_kick", "vblank";
+        interrupt-parent = <&irqsteer>;
+        clocks = <&clk 248>, <&clk 247>, <&clk 249>,
+                 <&clk 254>,<&clk 122>;
+        clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+        assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>;
+        assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>;
+        assigned-clock-rates = <800000000>,
+                               <400000000>;
+        port@0 {
+            dcss_out: endpoint {
+                remote-endpoint = <&hdmi_in>;
+            };
+        };
+    };
+
-- 
2.7.4


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^ permalink raw reply related	[flat|nested] 9+ messages in thread
* [PATCH v2 5/5] arm64: dts: imx8mq: add DCSS node
  2019-10-02 14:04 [PATCH v2 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
  2019-10-02 14:04 ` [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock Laurentiu Palcu
  2019-10-02 14:04 ` [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
@ 2019-10-02 14:04 ` Laurentiu Palcu
  2 siblings, 0 replies; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-02 14:04 UTC (permalink / raw)
  To: Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team
  Cc: devicetree, agx, linux-kernel, Laurentiu Palcu, linux-arm-kernel,
	l.stach

This patch adds the node for iMX8MQ Display Controller Subsystem.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 04115ca..7f4bfb4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -938,6 +938,31 @@
 				interrupt-controller;
 				#interrupt-cells = <1>;
 			};
+
+			dcss: display-controller@32e00000 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "nxp,imx8mq-dcss";
+				reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
+				interrupts = <6>, <8>, <9>;
+				interrupt-names = "ctx_ld", "ctxld_kick", "vblank";
+				interrupt-parent = <&irqsteer>;
+				clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
+					 <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+					 <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
+					 <&clk IMX8MQ_VIDEO2_PLL_OUT>,
+					 <&clk IMX8MQ_CLK_DISP_DTRC>;
+				clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+				assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>,
+						  <&clk IMX8MQ_CLK_DISP_RTRM>,
+						  <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
+				assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>,
+							 <&clk IMX8MQ_SYS1_PLL_800M>,
+							 <&clk IMX8MQ_CLK_27M>;
+				assigned-clock-rates = <800000000>,
+							   <400000000>;
+				status = "disabled";
+			};
 		};
 
 		gpu: gpu@38000000 {
-- 
2.7.4


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^ permalink raw reply related	[flat|nested] 9+ messages in thread
* Re: [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS
  2019-10-02 14:04 ` [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
@ 2019-10-11 14:50   ` Rob Herring
  2019-10-14  8:03     ` Laurentiu Palcu
  0 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2019-10-11 14:50 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: devicetree, Philipp Zabel, Shawn Guo, Sascha Hauer, linux-kernel,
	dri-devel, NXP Linux Team, Pengutronix Kernel Team,
	Laurentiu Palcu, Fabio Estevam, agx, linux-arm-kernel

:u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????#\x17??\x03??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.?\x1a\?oۊwb?\v?v+)????l\x7f?\x1ab?\x1f&??,?&??ξ????????????????W???!jx\x1ew΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb?\v?v+)????l\x7f?\x1ab?\x1f&??,?&??\x17???\x1eu????ޮ????^[?G???h

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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: Re: [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS
  2019-10-11 14:50   ` Rob Herring
@ 2019-10-14  8:03     ` Laurentiu Palcu
  2019-10-14 13:23       ` Rob Herring
  0 siblings, 1 reply; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-14  8:03 UTC (permalink / raw)
  To: Rob Herring
  Cc: devicetree, Philipp Zabel, Shawn Guo, Sascha Hauer, linux-kernel,
	dri-devel, dl-linux-imx, Pengutronix Kernel Team, Fabio Estevam,
	agx, linux-arm-kernel

Hi Rob,

On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????#\x17??\x03??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.?\x1a\?oۊwb? ?v+)????l\x7f?\x1ab?\x1f&??,?&??ξ????????????????W???!jx\x1ew΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l\x7f?\x1ab?\x1f&??,?&??\x17???\x1eu????ޮ????^[?G???h

Ok! Not sure how to address this though... :)

Thanks,
laurentiu
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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock
  2019-10-02 14:04 ` [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock Laurentiu Palcu
@ 2019-10-14 11:27   ` Shawn Guo
  0 siblings, 0 replies; 9+ messages in thread
From: Shawn Guo @ 2019-10-14 11:27 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: devicetree, Abel Vesa, Sascha Hauer, linux-kernel, linux-clk,
	NXP Linux Team, Pengutronix Kernel Team, Fabio Estevam, agx,
	linux-arm-kernel, l.stach

On Wed, Oct 02, 2019 at 05:04:53PM +0300, Laurentiu Palcu wrote:
> This clock is needed by DCSS when high resolutions are used.
> 
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
> CC: Abel Vesa <abel.vesa@nxp.com>

Applied, thanks.

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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: Re: [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS
  2019-10-14  8:03     ` Laurentiu Palcu
@ 2019-10-14 13:23       ` Rob Herring
  2019-10-15  5:50         ` Laurentiu Palcu
  0 siblings, 1 reply; 9+ messages in thread
From: Rob Herring @ 2019-10-14 13:23 UTC (permalink / raw)
  To: Laurentiu Palcu
  Cc: devicetree, Philipp Zabel, Shawn Guo, Sascha Hauer, linux-kernel,
	dri-devel, dl-linux-imx, Pengutronix Kernel Team, Fabio Estevam,
	agx, linux-arm-kernel

On Mon, Oct 14, 2019 at 3:03 AM Laurentiu Palcu <laurentiu.palcu@nxp.com> wrote:
>
> Hi Rob,
>
> On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> > :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????# ?? ??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.? \?oۊwb? ?v+)????l ? b? &??,?&??ξ????????????????W???!jx w΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l ? b? &??,?&?? ??? u????ޮ???? ?G???h
>
> Ok! Not sure how to address this though... :)

Your mail was base64 which ideally should be avoided on maillists. My
scripting tries to deal with it, but failed obviously. What I said
was:

Reviewed-by: Rob Herring <robh@kernel.org>

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^ permalink raw reply	[flat|nested] 9+ messages in thread
* Re: Re: Re: [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS
  2019-10-14 13:23       ` Rob Herring
@ 2019-10-15  5:50         ` Laurentiu Palcu
  0 siblings, 0 replies; 9+ messages in thread
From: Laurentiu Palcu @ 2019-10-15  5:50 UTC (permalink / raw)
  To: Rob Herring
  Cc: devicetree, Philipp Zabel, Shawn Guo, Sascha Hauer, linux-kernel,
	dri-devel, dl-linux-imx, Pengutronix Kernel Team, Fabio Estevam,
	agx, linux-arm-kernel

Hi Rob,

On Mon, Oct 14, 2019 at 08:23:51AM -0500, Rob Herring wrote:
> On Mon, Oct 14, 2019 at 3:03 AM Laurentiu Palcu <laurentiu.palcu@nxp.com> wrote:
> >
> > Hi Rob,
> >
> > On Fri, Oct 11, 2019 at 09:50:42AM -0500, Rob Herring wrote:
> > > :u?wc??m5?^?㞾?}4-??z{b???r?+?׀u???ا????# ?? ??ek ?????W?J????^?(???h}??-??z{b???r?Z????+?jW.? \?oۊwb? ?v+)????l ? b? &??,?&??ξ????????????????W???!jx w΢?ǫ?*'??+y?^??^?M:???r鞞֭???u??q?ky?ۊwb? ?v+)????l ? b? &??,?&?? ??? u????ޮ???? ?G???h
> >
> > Ok! Not sure how to address this though... :)
> 
> Your mail was base64 which ideally should be avoided on maillists. My
> scripting tries to deal with it, but failed obviously.

Sorry about that... :/ We've had this issue for a while now and I
thought it got fixed. Our email server being too "smart"...

Thanks,
Laurentiu

> What I said
> was:
> 
> Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-10-15  5:51 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-02 14:04 [PATCH v2 0/5] Add support for iMX8MQ Display Controller Subsystem Laurentiu Palcu
2019-10-02 14:04 ` [PATCH v2 1/5] clk: imx8mq: Add VIDEO2_PLL clock Laurentiu Palcu
2019-10-14 11:27   ` Shawn Guo
2019-10-02 14:04 ` [PATCH v2 4/5] dt-bindings: display: imx: add bindings for DCSS Laurentiu Palcu
2019-10-11 14:50   ` Rob Herring
2019-10-14  8:03     ` Laurentiu Palcu
2019-10-14 13:23       ` Rob Herring
2019-10-15  5:50         ` Laurentiu Palcu
2019-10-02 14:04 ` [PATCH v2 5/5] arm64: dts: imx8mq: add DCSS node Laurentiu Palcu

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