From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Enric Balletbo Serra <eballetbo@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Nicolas Boichat <drinkcat@chromium.org>,
"Rob Herring" <robh@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>
Cc: James Liao <jamesjj.liao@mediatek.com>,
Weiyi Lu <weiyi.lu@mediatek.com>,
srv_heupstream@mediatek.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Fan Chen <fan.chen@mediatek.com>,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v17 05/12] dt-bindings: soc: Add MT8183 power dt-bindings
Date: Thu, 6 Aug 2020 17:21:48 +0800 [thread overview]
Message-ID: <1596705715-15320-6-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1596705715-15320-1-git-send-email-weiyi.lu@mediatek.com>
Add power dt-bindings of MT8183.
Add an optional "mediatek,smi" property for phandle to smi-common
node for power controller.
Introduce properties for power domain sub nodes.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
.../devicetree/bindings/soc/mediatek/scpsys.txt | 81 ++++++++++++++++++++--
include/dt-bindings/power/mt8183-power.h | 26 +++++++
2 files changed, 102 insertions(+), 5 deletions(-)
create mode 100644 include/dt-bindings/power/mt8183-power.h
diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
index 2bc3677..efe2025 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
@@ -15,8 +15,9 @@ power/power-domain.yaml. It provides the power domains defined in
- include/dt-bindings/power/mt2701-power.h
- include/dt-bindings/power/mt2712-power.h
- include/dt-bindings/power/mt7622-power.h
+- include/dt-bindings/power/mt8183-power.h
-Required properties:
+Required properties for power controller:
- compatible: Should be one of:
- "mediatek,mt2701-scpsys"
- "mediatek,mt2712-scpsys"
@@ -27,12 +28,15 @@ Required properties:
- "mediatek,mt7623a-scpsys": For MT7623A SoC
- "mediatek,mt7629-scpsys", "mediatek,mt7622-scpsys": For MT7629 SoC
- "mediatek,mt8173-scpsys"
+ - "mediatek,mt8183-scpsys"
- #power-domain-cells: Must be 1
+- #address-cells: Should be 1
+- #size-cells: Should be 0
- reg: Address range of the SCPSYS unit
- infracfg: must contain a phandle to the infracfg controller
-- clock, clock-names: clocks according to the common clock binding.
- These are clocks which hardware needs to be
- enabled before enabling certain power domains.
+- clocks, clock-names: clocks according to the common clock binding.
+ These are clocks which hardware needs to be
+ enabled before enabling certain power domains.
Required clocks for MT2701 or MT7623: "mm", "mfg", "ethif"
Required clocks for MT2712: "mm", "mfg", "venc", "jpgdec", "audio", "vdec"
Required clocks for MT6765: MUX: "mm", "mfg"
@@ -43,8 +47,11 @@ Required properties:
Required clocks for MT7622 or MT7629: "hif_sel"
Required clocks for MT7623A: "ethif"
Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt"
+ Required clocks for MT8183: "audio", "audio1", "audio2", "mfg", "mm",
+ "cam", "isp", "vpu", "vpu1", "vpu2",
+ "vpu3";
-Optional properties:
+Optional properties for power controller:
- vdec-supply: Power supply for the vdec power domain
- venc-supply: Power supply for the venc power domain
- isp-supply: Power supply for the isp power domain
@@ -55,6 +62,16 @@ Optional properties:
- mfg_async-supply: Power supply for the mfg_async power domain
- mfg_2d-supply: Power supply for the mfg_2d power domain
- mfg-supply: Power supply for the mfg power domain
+- mediatek,smi : A phandle to the smi_common node
+
+Required properties for power domain sub nodes:
+- reg: index of the power domain, should use macros in:
+ "include/dt-bindings/power/mt8192-power.h" - for power domain of MT8192.
+
+Optional properties for power domain sub nodes:
+- clocks: clocks according to the common clock binding.
+ These are clocks which hardware needs to be enabled before
+ releasing the bus protection.
Example:
@@ -70,6 +87,60 @@ Example:
clock-names = "mfg", "mm", "venc", "venc_lt";
};
+Example(power domain sub node within power controller):
+
+ scpsys: power-controller@10006000 {
+ compatible = "mediatek,mt8183-scpsys", "syscon";
+ reg = <0 0x10006000 0 0x1000>;
+ clocks = <&topckgen CLK_TOP_MUX_MM>,
+ <&topckgen CLK_TOP_MUX_IPU_IF>,
+ <&topckgen CLK_TOP_MUX_DSP>,
+ <&topckgen CLK_TOP_MUX_DSP1>,
+ <&topckgen CLK_TOP_MUX_DSP2>;
+ clock-names = "mm", "vpu", "vpu1", "vpu2", "vpu3";
+ infracfg = <&infracfg>;
+ mediatek,smi = <&smi_common>;
+ #power-domain-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ conn@MT8183_POWER_DOMAIN_CONN {
+ reg = <MT8183_POWER_DOMAIN_CONN>;
+ };
+
+ disp@MT8183_POWER_DOMAIN_DISP {
+ reg = <MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_SMI_COMMON>,
+ <&mmsys CLK_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_SMI_LARB1>,
+ <&mmsys CLK_MM_GALS_COMM0>,
+ <&mmsys CLK_MM_GALS_COMM1>,
+ <&mmsys CLK_MM_GALS_CCU2MM>,
+ <&mmsys CLK_MM_GALS_IPU12MM>,
+ <&mmsys CLK_MM_GALS_IMG2MM>,
+ <&mmsys CLK_MM_GALS_CAM2MM>,
+ <&mmsys CLK_MM_GALS_IPU2MM>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vpu_top@MT8183_POWER_DOMAIN_VPU_TOP {
+ reg = <MT8183_POWER_DOMAIN_VPU_TOP>;
+ clocks = <&ipu_conn CLK_IPU_CONN_IPU>,
+ <&ipu_conn CLK_IPU_CONN_AHB>,
+ <&ipu_conn CLK_IPU_CONN_AXI>,
+ <&ipu_conn CLK_IPU_CONN_ISP>,
+ <&ipu_conn CLK_IPU_CONN_CAM_ADL>,
+ <&ipu_conn CLK_IPU_CONN_IMG_ADL>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ vpu_core0@MT8183_POWER_DOMAIN_VPU_CORE0 {
+ reg = <MT8183_POWER_DOMAIN_VPU_CORE0>;
+ };
+ };
+ };
+ };
+
Example consumer:
afe: mt8173-afe-pcm@11220000 {
diff --git a/include/dt-bindings/power/mt8183-power.h b/include/dt-bindings/power/mt8183-power.h
new file mode 100644
index 0000000..d1ab387
--- /dev/null
+++ b/include/dt-bindings/power/mt8183-power.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2020 MediaTek Inc.
+ * Author: Weiyi Lu <weiyi.lu@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT8183_POWER_H
+#define _DT_BINDINGS_POWER_MT8183_POWER_H
+
+#define MT8183_POWER_DOMAIN_AUDIO 0
+#define MT8183_POWER_DOMAIN_CONN 1
+#define MT8183_POWER_DOMAIN_MFG_ASYNC 2
+#define MT8183_POWER_DOMAIN_MFG 3
+#define MT8183_POWER_DOMAIN_MFG_CORE0 4
+#define MT8183_POWER_DOMAIN_MFG_CORE1 5
+#define MT8183_POWER_DOMAIN_MFG_2D 6
+#define MT8183_POWER_DOMAIN_DISP 7
+#define MT8183_POWER_DOMAIN_CAM 8
+#define MT8183_POWER_DOMAIN_ISP 9
+#define MT8183_POWER_DOMAIN_VDEC 10
+#define MT8183_POWER_DOMAIN_VENC 11
+#define MT8183_POWER_DOMAIN_VPU_TOP 12
+#define MT8183_POWER_DOMAIN_VPU_CORE0 13
+#define MT8183_POWER_DOMAIN_VPU_CORE1 14
+
+#endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */
--
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-08-06 12:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-06 9:21 [PATCH v17 00/12] Mediatek MT8183 scpsys support Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 01/12] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 02/12] soc: mediatek: Add basic_clk_name to scp_power_data Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 03/12] soc: mediatek: Remove infracfg misc driver support Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 04/12] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2020-08-06 9:21 ` Weiyi Lu [this message]
2020-08-17 21:53 ` [PATCH v17 05/12] dt-bindings: soc: Add MT8183 power dt-bindings Rob Herring
2020-08-06 9:21 ` [PATCH v17 06/12] soc: mediatek: Add support for hierarchical scpsys device node Weiyi Lu
2020-09-28 7:14 ` Nicolas Boichat
2020-09-30 3:37 ` Weiyi Lu
2020-10-01 14:33 ` Matthias Brugger
2020-08-06 9:21 ` [PATCH v17 07/12] soc: mediatek: Add subsys clock control for bus protection Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 08/12] soc: mediatek: Add extra sram control Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 09/12] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 10/12] soc: mediatek: Add a comma at the end Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 11/12] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2020-08-06 9:21 ` [PATCH v17 12/12] arm64: dts: Add power-domains property to mfgcfg Weiyi Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1596705715-15320-6-git-send-email-weiyi.lu@mediatek.com \
--to=weiyi.lu@mediatek.com \
--cc=devicetree@vger.kernel.org \
--cc=drinkcat@chromium.org \
--cc=eballetbo@gmail.com \
--cc=fan.chen@mediatek.com \
--cc=jamesjj.liao@mediatek.com \
--cc=kernel@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=matthias.bgg@gmail.com \
--cc=robh@kernel.org \
--cc=srv_heupstream@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).