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From: Weiyi Lu <weiyi.lu@mediatek.com>
To: Enric Balletbo Serra <eballetbo@gmail.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Nicolas Boichat <drinkcat@chromium.org>,
	"Rob Herring" <robh@kernel.org>,
	Sascha Hauer <kernel@pengutronix.de>
Cc: James Liao <jamesjj.liao@mediatek.com>,
	Weiyi Lu <weiyi.lu@mediatek.com>,
	srv_heupstream@mediatek.com, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Fan Chen <fan.chen@mediatek.com>,
	linux-mediatek@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v17 07/12] soc: mediatek: Add subsys clock control for bus protection
Date: Thu, 6 Aug 2020 17:21:50 +0800	[thread overview]
Message-ID: <1596705715-15320-8-git-send-email-weiyi.lu@mediatek.com> (raw)
In-Reply-To: <1596705715-15320-1-git-send-email-weiyi.lu@mediatek.com>

For the bus protection operations, some subsys clocks need to be enabled
before releasing the protection, and vice versa.
But those subsys clocks could only be controlled once its corresponding
power domain is turned on first.
In this patch, we add the subsys clock control into its relevant steps.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
---
 drivers/soc/mediatek/mtk-scpsys.c | 39 +++++++++++++++++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c
index 502b66f..ec62143 100644
--- a/drivers/soc/mediatek/mtk-scpsys.c
+++ b/drivers/soc/mediatek/mtk-scpsys.c
@@ -7,6 +7,7 @@
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/mfd/syscon.h>
+#include <linux/of_clk.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
@@ -97,6 +98,7 @@
 #define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT	BIT(23)
 
 #define MAX_CLKS	3
+#define MAX_SUBSYS_CLKS 10
 
 #define MAX_STEPS	5
 
@@ -165,6 +167,7 @@ struct scp_domain {
 	struct generic_pm_domain genpd;
 	struct scp *scp;
 	struct clk *clk[MAX_CLKS];
+	struct clk *subsys_clk[MAX_SUBSYS_CLKS];
 	const struct scp_domain_data *data;
 	struct regulator *supply;
 };
@@ -427,16 +430,22 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
 	val |= PWR_RST_B_BIT;
 	writel(val, ctl_addr);
 
-	ret = scpsys_sram_enable(scpd, ctl_addr);
+	ret = scpsys_clk_enable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
 	if (ret < 0)
 		goto err_pwr_ack;
 
+	ret = scpsys_sram_enable(scpd, ctl_addr);
+	if (ret < 0)
+		goto err_sram;
+
 	ret = scpsys_bus_protect_disable(scpd);
 	if (ret < 0)
-		goto err_pwr_ack;
+		goto err_sram;
 
 	return 0;
 
+err_sram:
+	scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
 err_pwr_ack:
 	scpsys_clk_disable(scpd->clk, MAX_CLKS);
 err_clk:
@@ -463,6 +472,8 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
 	if (ret < 0)
 		goto out;
 
+	scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS);
+
 	/* subsys power off */
 	val = readl(ctl_addr);
 	val |= PWR_ISO_BIT;
@@ -500,6 +511,24 @@ static int scpsys_power_off(struct generic_pm_domain *genpd)
 	return ret;
 }
 
+static int init_subsys_clks(struct device_node *np,
+		struct clk **clk)
+{
+	int sub_clk_cnt = of_clk_get_parent_count(np);
+	int i;
+
+	BUG_ON(sub_clk_cnt > MAX_SUBSYS_CLKS);
+
+	for (i = 0; i < sub_clk_cnt; i++) {
+		clk[i] = of_clk_get(np, i);
+
+		if (IS_ERR(clk[i]))
+			return PTR_ERR(clk[i]);
+	}
+
+	return 0;
+}
+
 static int init_basic_clks(struct platform_device *pdev, struct clk **clk,
 			const char * const *name)
 {
@@ -533,11 +562,17 @@ static int scpsys_get_domain(struct platform_device *pdev, struct scp *scp,
 	struct device_node *sub;
 	u32 parent_id, child_id;
 	int ret;
+	struct scp_domain *scpd;
 
 	ret = scpsys_get_domain_id(node, &parent_id);
 	if (ret)
 		return ret;
 
+	scpd = &scp->domains[parent_id];
+	ret = init_subsys_clks(node, scpd->subsys_clk);
+	if (ret)
+		return ret;
+
 	for_each_child_of_node(node, sub) {
 		ret = scpsys_get_domain_id(sub, &child_id);
 		if (ret)
-- 
1.8.1.1.dirty
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  parent reply	other threads:[~2020-08-06 12:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-06  9:21 [PATCH v17 00/12] Mediatek MT8183 scpsys support Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 01/12] dt-bindings: mediatek: Add property to mt8183 smi-common Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 02/12] soc: mediatek: Add basic_clk_name to scp_power_data Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 03/12] soc: mediatek: Remove infracfg misc driver support Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 04/12] soc: mediatek: Add multiple step bus protection control Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 05/12] dt-bindings: soc: Add MT8183 power dt-bindings Weiyi Lu
2020-08-17 21:53   ` Rob Herring
2020-08-06  9:21 ` [PATCH v17 06/12] soc: mediatek: Add support for hierarchical scpsys device node Weiyi Lu
2020-09-28  7:14   ` Nicolas Boichat
2020-09-30  3:37     ` Weiyi Lu
2020-10-01 14:33       ` Matthias Brugger
2020-08-06  9:21 ` Weiyi Lu [this message]
2020-08-06  9:21 ` [PATCH v17 08/12] soc: mediatek: Add extra sram control Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 09/12] soc: mediatek: Add MT8183 scpsys support Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 10/12] soc: mediatek: Add a comma at the end Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 11/12] arm64: dts: Add power controller device node of MT8183 Weiyi Lu
2020-08-06  9:21 ` [PATCH v17 12/12] arm64: dts: Add power-domains property to mfgcfg Weiyi Lu

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