* [PATCH v2 1/5] spi: stm32h7: fix race condition at end of transfer
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
@ 2020-08-10 7:12 ` Alain Volmat
2020-08-10 7:12 ` [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer Alain Volmat
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Alain Volmat @ 2020-08-10 7:12 UTC (permalink / raw)
To: broonie, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, alain.volmat,
mcoquelin.stm32, fabrice.gasnier, linux-stm32, linux-arm-kernel
From: Antonio Borneo <antonio.borneo@st.com>
The caller of stm32_spi_transfer_one(), spi_transfer_one_message(),
is waiting for us to call spi_finalize_current_transfer() and will
eventually schedule a new transfer, if available.
We should guarantee that the spi controller is really available
before calling spi_finalize_current_transfer().
Move the call to spi_finalize_current_transfer() _after_ the call
to stm32_spi_disable().
Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
v2: identical to v1
drivers/spi/spi-stm32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 4a21feae0103..814a3ec3b8ad 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -971,8 +971,8 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
spin_unlock_irqrestore(&spi->lock, flags);
if (end) {
- spi_finalize_current_transfer(master);
stm32h7_spi_disable(spi);
+ spi_finalize_current_transfer(master);
}
return IRQ_HANDLED;
--
2.7.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
2020-08-10 7:12 ` [PATCH v2 1/5] spi: stm32h7: fix race condition at end of transfer Alain Volmat
@ 2020-08-10 7:12 ` Alain Volmat
2020-09-14 10:33 ` Ludwig Zenz
2020-08-10 7:12 ` [PATCH v2 3/5] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate Alain Volmat
` (3 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Alain Volmat @ 2020-08-10 7:12 UTC (permalink / raw)
To: broonie, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, alain.volmat,
mcoquelin.stm32, fabrice.gasnier, linux-stm32, linux-arm-kernel
From: Amelie Delaunay <amelie.delaunay@st.com>
When transfer is shorter than half of the fifo, set the data packet size
up to transfer size instead of up to half of the fifo.
Check also that threshold is set at least to 1 data frame.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
v2: fix conditional statement
drivers/spi/spi-stm32.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 814a3ec3b8ad..e5450233f3f8 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -467,20 +467,27 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
/**
* stm32h7_spi_prepare_fthlv - Determine FIFO threshold level
* @spi: pointer to the spi controller data structure
+ * @xfer_len: length of the message to be transferred
*/
-static u32 stm32h7_spi_prepare_fthlv(struct stm32_spi *spi)
+static u32 stm32h7_spi_prepare_fthlv(struct stm32_spi *spi, u32 xfer_len)
{
- u32 fthlv, half_fifo;
+ u32 fthlv, half_fifo, packet;
/* data packet should not exceed 1/2 of fifo space */
half_fifo = (spi->fifo_size / 2);
+ /* data_packet should not exceed transfer length */
+ if (half_fifo > xfer_len)
+ packet = xfer_len;
+ else
+ packet = half_fifo;
+
if (spi->cur_bpw <= 8)
- fthlv = half_fifo;
+ fthlv = packet;
else if (spi->cur_bpw <= 16)
- fthlv = half_fifo / 2;
+ fthlv = packet / 2;
else
- fthlv = half_fifo / 4;
+ fthlv = packet / 4;
/* align packet size with data registers access */
if (spi->cur_bpw > 8)
@@ -488,6 +495,9 @@ static u32 stm32h7_spi_prepare_fthlv(struct stm32_spi *spi)
else
fthlv -= (fthlv % 4); /* multiple of 4 */
+ if (!fthlv)
+ fthlv = 1;
+
return fthlv;
}
@@ -1393,7 +1403,7 @@ static void stm32h7_spi_set_bpw(struct stm32_spi *spi)
cfg1_setb |= (bpw << STM32H7_SPI_CFG1_DSIZE_SHIFT) &
STM32H7_SPI_CFG1_DSIZE;
- spi->cur_fthlv = stm32h7_spi_prepare_fthlv(spi);
+ spi->cur_fthlv = stm32h7_spi_prepare_fthlv(spi, spi->cur_xferlen);
fthlv = spi->cur_fthlv - 1;
cfg1_clrb |= STM32H7_SPI_CFG1_FTHLV;
@@ -1588,6 +1598,8 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
spin_lock_irqsave(&spi->lock, flags);
+ spi->cur_xferlen = transfer->len;
+
if (spi->cur_bpw != transfer->bits_per_word) {
spi->cur_bpw = transfer->bits_per_word;
spi->cfg->set_bpw(spi);
@@ -1635,8 +1647,6 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
goto out;
}
- spi->cur_xferlen = transfer->len;
-
dev_dbg(spi->dev, "transfer communication mode set to %d\n",
spi->cur_comm);
dev_dbg(spi->dev,
--
2.7.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer
2020-08-10 7:12 ` [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer Alain Volmat
@ 2020-09-14 10:33 ` Ludwig Zenz
0 siblings, 0 replies; 8+ messages in thread
From: Ludwig Zenz @ 2020-09-14 10:33 UTC (permalink / raw)
To: alain.volmat
Cc: marex, amelie.delaunay, alexandre.torgue, linux-kernel,
linux-spi, broonie, mcoquelin.stm32, fabrice.gasnier,
linux-stm32, linux-arm-kernel
> When transfer is shorter than half of the fifo, set the data packet size
> up to transfer size instead of up to half of the fifo.
> Check also that threshold is set at least to 1 data frame.
Through a git-bisect we have identified this patch as problematic. We have an application that uses a SPI protocol with telegrams of length 2 to 16 bytes. Due to this patch we have errors in the data transfer of the MOSI direction. We use SPI in PIO mode.
Please explain what this patch should improve or what exactly is changed in the behaviour.
best regards,
Ludwig Zenz
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 3/5] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
2020-08-10 7:12 ` [PATCH v2 1/5] spi: stm32h7: fix race condition at end of transfer Alain Volmat
2020-08-10 7:12 ` [PATCH v2 2/5] spi: stm32: fix fifo threshold level in case of short transfer Alain Volmat
@ 2020-08-10 7:12 ` Alain Volmat
2020-08-10 7:12 ` [PATCH v2 4/5] spi: stm32: fixes suspend/resume management Alain Volmat
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Alain Volmat @ 2020-08-10 7:12 UTC (permalink / raw)
To: broonie, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, alain.volmat,
mcoquelin.stm32, fabrice.gasnier, linux-stm32, linux-arm-kernel
From: Amelie Delaunay <amelie.delaunay@st.com>
Fix spi->clk_rate when it is odd to the nearest lowest even value because
minimum SPI divider is 2.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
v2: identical to v1
drivers/spi/spi-stm32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index e5450233f3f8..571dea72bf7e 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -441,7 +441,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
{
u32 div, mbrdiv;
- div = DIV_ROUND_UP(spi->clk_rate, speed_hz);
+ /* Ensure spi->clk_rate is even */
+ div = DIV_ROUND_UP(spi->clk_rate & ~0x1, speed_hz);
/*
* SPI framework set xfer->speed_hz to master->max_speed_hz if
--
2.7.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 4/5] spi: stm32: fixes suspend/resume management
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
` (2 preceding siblings ...)
2020-08-10 7:12 ` [PATCH v2 3/5] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate Alain Volmat
@ 2020-08-10 7:12 ` Alain Volmat
2020-08-10 7:12 ` [PATCH v2 5/5] spi: stm32: always perform registers configuration prior to transfer Alain Volmat
2020-08-10 18:58 ` [PATCH v2 0/5] spi: stm32: various driver fixes Mark Brown
5 siblings, 0 replies; 8+ messages in thread
From: Alain Volmat @ 2020-08-10 7:12 UTC (permalink / raw)
To: broonie, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, alain.volmat,
mcoquelin.stm32, fabrice.gasnier, linux-stm32, linux-arm-kernel
From: Amelie Delaunay <amelie.delaunay@st.com>
This patch adds pinctrl power management, and reconfigure spi controller
in case of resume.
Fixes: 038ac869c9d2 ("spi: stm32: add runtime PM support")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
v2: identical to v1
drivers/spi/spi-stm32.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 571dea72bf7e..9b90a22543fd 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -13,6 +13,7 @@
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/of_platform.h>
+#include <linux/pinctrl/consumer.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/spi/spi.h>
@@ -2007,6 +2008,8 @@ static int stm32_spi_remove(struct platform_device *pdev)
pm_runtime_disable(&pdev->dev);
+ pinctrl_pm_select_sleep_state(&pdev->dev);
+
return 0;
}
@@ -2018,13 +2021,18 @@ static int stm32_spi_runtime_suspend(struct device *dev)
clk_disable_unprepare(spi->clk);
- return 0;
+ return pinctrl_pm_select_sleep_state(dev);
}
static int stm32_spi_runtime_resume(struct device *dev)
{
struct spi_master *master = dev_get_drvdata(dev);
struct stm32_spi *spi = spi_master_get_devdata(master);
+ int ret;
+
+ ret = pinctrl_pm_select_default_state(dev);
+ if (ret)
+ return ret;
return clk_prepare_enable(spi->clk);
}
@@ -2054,10 +2062,23 @@ static int stm32_spi_resume(struct device *dev)
return ret;
ret = spi_master_resume(master);
- if (ret)
+ if (ret) {
clk_disable_unprepare(spi->clk);
+ return ret;
+ }
- return ret;
+ ret = pm_runtime_get_sync(dev);
+ if (ret) {
+ dev_err(dev, "Unable to power device:%d\n", ret);
+ return ret;
+ }
+
+ spi->cfg->config(spi);
+
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_put_autosuspend(dev);
+
+ return 0;
}
#endif
--
2.7.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 5/5] spi: stm32: always perform registers configuration prior to transfer
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
` (3 preceding siblings ...)
2020-08-10 7:12 ` [PATCH v2 4/5] spi: stm32: fixes suspend/resume management Alain Volmat
@ 2020-08-10 7:12 ` Alain Volmat
2020-08-10 18:58 ` [PATCH v2 0/5] spi: stm32: various driver fixes Mark Brown
5 siblings, 0 replies; 8+ messages in thread
From: Alain Volmat @ 2020-08-10 7:12 UTC (permalink / raw)
To: broonie, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, alain.volmat,
mcoquelin.stm32, fabrice.gasnier, linux-stm32, linux-arm-kernel
SPI registers content may have been lost upon suspend/resume sequence.
So, always compute and apply the necessary configuration in
stm32_spi_transfer_one_setup routine.
Signed-off-by: Alain Volmat <alain.volmat@st.com>
---
v2: identical to v1
drivers/spi/spi-stm32.c | 42 +++++++++++++++++-------------------------
1 file changed, 17 insertions(+), 25 deletions(-)
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 9b90a22543fd..d4b33b358a31 100644
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -1597,41 +1597,33 @@ static int stm32_spi_transfer_one_setup(struct stm32_spi *spi,
unsigned long flags;
unsigned int comm_type;
int nb_words, ret = 0;
+ int mbr;
spin_lock_irqsave(&spi->lock, flags);
spi->cur_xferlen = transfer->len;
- if (spi->cur_bpw != transfer->bits_per_word) {
- spi->cur_bpw = transfer->bits_per_word;
- spi->cfg->set_bpw(spi);
- }
-
- if (spi->cur_speed != transfer->speed_hz) {
- int mbr;
-
- /* Update spi->cur_speed with real clock speed */
- mbr = stm32_spi_prepare_mbr(spi, transfer->speed_hz,
- spi->cfg->baud_rate_div_min,
- spi->cfg->baud_rate_div_max);
- if (mbr < 0) {
- ret = mbr;
- goto out;
- }
+ spi->cur_bpw = transfer->bits_per_word;
+ spi->cfg->set_bpw(spi);
- transfer->speed_hz = spi->cur_speed;
- stm32_spi_set_mbr(spi, mbr);
+ /* Update spi->cur_speed with real clock speed */
+ mbr = stm32_spi_prepare_mbr(spi, transfer->speed_hz,
+ spi->cfg->baud_rate_div_min,
+ spi->cfg->baud_rate_div_max);
+ if (mbr < 0) {
+ ret = mbr;
+ goto out;
}
- comm_type = stm32_spi_communication_type(spi_dev, transfer);
- if (spi->cur_comm != comm_type) {
- ret = spi->cfg->set_mode(spi, comm_type);
+ transfer->speed_hz = spi->cur_speed;
+ stm32_spi_set_mbr(spi, mbr);
- if (ret < 0)
- goto out;
+ comm_type = stm32_spi_communication_type(spi_dev, transfer);
+ ret = spi->cfg->set_mode(spi, comm_type);
+ if (ret < 0)
+ goto out;
- spi->cur_comm = comm_type;
- }
+ spi->cur_comm = comm_type;
if (spi->cfg->set_data_idleness)
spi->cfg->set_data_idleness(spi, transfer->len);
--
2.7.4
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^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 0/5] spi: stm32: various driver fixes
2020-08-10 7:12 [PATCH v2 0/5] spi: stm32: various driver fixes Alain Volmat
` (4 preceding siblings ...)
2020-08-10 7:12 ` [PATCH v2 5/5] spi: stm32: always perform registers configuration prior to transfer Alain Volmat
@ 2020-08-10 18:58 ` Mark Brown
5 siblings, 0 replies; 8+ messages in thread
From: Mark Brown @ 2020-08-10 18:58 UTC (permalink / raw)
To: Alain Volmat, amelie.delaunay
Cc: alexandre.torgue, linux-kernel, linux-spi, mcoquelin.stm32,
fabrice.gasnier, linux-stm32, linux-arm-kernel
On Mon, 10 Aug 2020 09:12:33 +0200, Alain Volmat wrote:
> This serie is a reduced version of the serie
> [spi: stm32: various driver enhancements] previously sent.
>
> Alain Volmat (1):
> spi: stm32: always perform registers configuration prior to transfer
>
> Amelie Delaunay (3):
> spi: stm32: fix fifo threshold level in case of short transfer
> spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
> spi: stm32: fixes suspend/resume management
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/5] spi: stm32h7: fix race condition at end of transfer
commit: 135dd873d3c76d812ae64c668adef3f2c59ed27f
[2/5] spi: stm32: fix fifo threshold level in case of short transfer
commit: 3373e9004acc0603242622b4378c64bc01d21b5f
[3/5] spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
commit: 9cc61973bf9385b19ff5dda4a2a7e265fcba85e4
[4/5] spi: stm32: fixes suspend/resume management
commit: db96bf976a4fc65439be0b4524c0d41427d98814
[5/5] spi: stm32: always perform registers configuration prior to transfer
commit: 60ccb3515fc61a0124c70aa37317f75b67560024
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
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^ permalink raw reply [flat|nested] 8+ messages in thread