* Re: [PATCH v1] clk: rockchip: Optimize PLL table memory usage
[not found] <20210511090726.15146-1-zhangqing@rock-chips.com>
@ 2021-05-14 12:05 ` Heiko Stuebner
0 siblings, 0 replies; only message in thread
From: Heiko Stuebner @ 2021-05-14 12:05 UTC (permalink / raw)
To: mturquette, Elaine, sboyd
Cc: Heiko Stuebner, linux-arm-kernel, Elaine Zhang, linux-clk,
kever.yang, huangtao, tony.xie, linux-kernel, finley.xiao,
linux-rockchip
On Tue, 11 May 2021 17:07:26 +0800, Elaine@vger.kernel.org wrote:
> Before the change: The sizeof rk3568_pll_rates = 2544
> Use union: The sizeof rk3568_pll_rates = 1696
>
> In future Soc, more PLL types will be added, and the
> rockchip_pll_rate_table will add more members,
> and the space savings will be even more pronounced
> by using union.
Applied, thanks!
[1/1] clk: rockchip: Optimize PLL table memory usage
commit: 23029150a05b59ebacca6dd76f6c14dc67a95877
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
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