From: Catalin Marinas <catalin.marinas@arm.com>
To: linux-arm-kernel@lists.infradead.org,
Alexandru Elisei <alexandru.elisei@arm.com>,
will@kernel.org, suzuki.poulose@arm.com, james.morse@arm.com,
maz@kernel.org, kvmarm@lists.cs.columbia.edu, broonie@kernel.org
Subject: Re: [PATCH v2] arm64: Do not trap PMSNEVFR_EL1
Date: Thu, 26 Aug 2021 12:07:12 +0100 [thread overview]
Message-ID: <162997601443.30374.2606931123548634826.b4-ty@arm.com> (raw)
In-Reply-To: <20210824154523.906270-1-alexandru.elisei@arm.com>
On Tue, 24 Aug 2021 16:45:23 +0100, Alexandru Elisei wrote:
> Commit 31c00d2aeaa2 ("arm64: Disable fine grained traps on boot") zeroed
> the fine grained trap registers to prevent unwanted register traps from
> occuring. However, for the PMSNEVFR_EL1 register, the corresponding
> HDFG{R,W}TR_EL2.nPMSNEVFR_EL1 fields must be 1 to disable trapping. Set
> both fields to 1 if FEAT_SPEv1p2 is detected to disable read and write
> traps.
Applied to arm64 (for-next/misc), thanks!
[1/1] arm64: Do not trap PMSNEVFR_EL1
https://git.kernel.org/arm64/c/50cb99fa89aa
--
Catalin
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prev parent reply other threads:[~2021-08-26 11:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 15:45 [PATCH v2] arm64: Do not trap PMSNEVFR_EL1 Alexandru Elisei
2021-08-24 15:53 ` Mark Brown
2021-08-26 8:51 ` Marc Zyngier
2021-08-26 11:07 ` Catalin Marinas [this message]
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