From: Mark Brown <broonie@kernel.org>
To: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org,
james.morse@arm.com, suzuki.poulose@arm.com,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v2] arm64: Do not trap PMSNEVFR_EL1
Date: Tue, 24 Aug 2021 16:53:12 +0100 [thread overview]
Message-ID: <20210824155312.GD4393@sirena.org.uk> (raw)
In-Reply-To: <20210824154523.906270-1-alexandru.elisei@arm.com>
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On Tue, Aug 24, 2021 at 04:45:23PM +0100, Alexandru Elisei wrote:
> Commit 31c00d2aeaa2 ("arm64: Disable fine grained traps on boot") zeroed
> the fine grained trap registers to prevent unwanted register traps from
> occuring. However, for the PMSNEVFR_EL1 register, the corresponding
> HDFG{R,W}TR_EL2.nPMSNEVFR_EL1 fields must be 1 to disable trapping. Set
> both fields to 1 if FEAT_SPEv1p2 is detected to disable read and write
> traps.
Reviewed-by: Mark Brown <broonie@kernel.org>
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next prev parent reply other threads:[~2021-08-24 15:55 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 15:45 [PATCH v2] arm64: Do not trap PMSNEVFR_EL1 Alexandru Elisei
2021-08-24 15:53 ` Mark Brown [this message]
2021-08-26 8:51 ` Marc Zyngier
2021-08-26 11:07 ` Catalin Marinas
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