From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
To: <michal.simek@xilinx.com>, <nicolas.ferre@microchip.com>,
<claudiu.beznea@microchip.com>, <davem@davemloft.net>,
<edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>,
<gregkh@linuxfoundation.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>,
<git@amd.com>, <git@xilinx.com>,
Ronak Jain <ronak.jain@xilinx.com>,
Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Subject: [PATCH v2 net-next 1/2] firmware: xilinx: add support for sd/gem config
Date: Sat, 30 Jul 2022 01:05:49 +0530 [thread overview]
Message-ID: <1659123350-10638-2-git-send-email-radhey.shyam.pandey@amd.com> (raw)
In-Reply-To: <1659123350-10638-1-git-send-email-radhey.shyam.pandey@amd.com>
From: Ronak Jain <ronak.jain@xilinx.com>
Add new APIs in firmware to configure SD/GEM registers. Internally
it calls PM IOCTL for below SD/GEM register configuration:
- SD/EMMC select
- SD slot type
- SD base clock
- SD 8 bit support
- SD fixed config
- GEM SGMII Mode
- GEM fixed config
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
---
Changes for v2:
- Use tab indent for zynqmp_pm_set_sd/gem_config return documentation.
---
drivers/firmware/xilinx/zynqmp.c | 31 +++++++++++++++++++++++++++++++
include/linux/firmware/xlnx-zynqmp.h | 33 +++++++++++++++++++++++++++++++++
2 files changed, 64 insertions(+)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 7977a494a651..44c44077dfc5 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -1298,6 +1298,37 @@ int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
}
/**
+ * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
+ * @node: SD node ID
+ * @config: The config type of SD registers
+ * @value: Value to be set
+ *
+ * Return: Returns 0 on success or error value on failure.
+ */
+int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
+{
+ return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
+ config, value, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
+
+/**
+ * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
+ * @node: GEM node ID
+ * @config: The config type of GEM registers
+ * @value: Value to be set
+ *
+ * Return: Returns 0 on success or error value on failure.
+ */
+int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
+ u32 value)
+{
+ return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
+ config, value, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
+
+/**
* struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
* @subtype: Shutdown subtype
* @name: Matching string for scope argument
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 1ec73d5352c3..063a93c133f1 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -152,6 +152,9 @@ enum pm_ioctl_id {
/* Runtime feature configuration */
IOCTL_SET_FEATURE_CONFIG = 26,
IOCTL_GET_FEATURE_CONFIG = 27,
+ /* Dynamic SD/GEM configuration */
+ IOCTL_SET_SD_CONFIG = 30,
+ IOCTL_SET_GEM_CONFIG = 31,
};
enum pm_query_id {
@@ -393,6 +396,18 @@ enum pm_feature_config_id {
PM_FEATURE_EXTWDT_VALUE = 4,
};
+enum pm_sd_config_type {
+ SD_CONFIG_EMMC_SEL = 1, /* To set SD_EMMC_SEL in CTRL_REG_SD and SD_SLOTTYPE */
+ SD_CONFIG_BASECLK = 2, /* To set SD_BASECLK in SD_CONFIG_REG1 */
+ SD_CONFIG_8BIT = 3, /* To set SD_8BIT in SD_CONFIG_REG2 */
+ SD_CONFIG_FIXED = 4, /* To set fixed config registers */
+};
+
+enum pm_gem_config_type {
+ GEM_CONFIG_SGMII_MODE = 1, /* To set GEM_SGMII_MODE in GEM_CLK_CTRL register */
+ GEM_CONFIG_FIXED = 2, /* To set fixed config registers */
+};
+
/**
* struct zynqmp_pm_query_data - PM query data
* @qid: query ID
@@ -468,6 +483,9 @@ int zynqmp_pm_feature(const u32 api_id);
int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id);
int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value);
int zynqmp_pm_get_feature_config(enum pm_feature_config_id id, u32 *payload);
+int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value);
+int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
+ u32 value);
#else
static inline int zynqmp_pm_get_api_version(u32 *version)
{
@@ -733,6 +751,21 @@ static inline int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
{
return -ENODEV;
}
+
+static inline int zynqmp_pm_set_sd_config(u32 node,
+ enum pm_sd_config_type config,
+ u32 value)
+{
+ return -ENODEV;
+}
+
+static inline int zynqmp_pm_set_gem_config(u32 node,
+ enum pm_gem_config_type config,
+ u32 value)
+{
+ return -ENODEV;
+}
+
#endif
#endif /* __FIRMWARE_ZYNQMP_H__ */
--
2.1.1
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next prev parent reply other threads:[~2022-07-29 19:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-29 19:35 [PATCH v2 net-next 0/2] macb: add zynqmp SGMII dynamic configuration support Radhey Shyam Pandey
2022-07-29 19:35 ` Radhey Shyam Pandey [this message]
2022-08-01 9:56 ` [PATCH v2 net-next 1/2] firmware: xilinx: add support for sd/gem config Claudiu.Beznea
2022-08-01 12:52 ` Pandey, Radhey Shyam
2022-08-01 15:06 ` Claudiu.Beznea
2022-08-01 18:50 ` Pandey, Radhey Shyam
2022-07-29 19:35 ` [PATCH v2 net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support Radhey Shyam Pandey
2022-07-29 19:57 ` Conor.Dooley
2022-08-01 11:35 ` Claudiu.Beznea
2022-08-01 13:02 ` Pandey, Radhey Shyam
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