* [PATCHv2 0/2] mxc: mx51: Add support for efikamx nettop
@ 2010-10-07 15:06 Amit Kucheria
2010-10-07 15:07 ` [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file Amit Kucheria
2010-10-07 15:07 ` [PATCHv2 2/2] mx51: add support for genesi efikamx nettop Amit Kucheria
0 siblings, 2 replies; 4+ messages in thread
From: Amit Kucheria @ 2010-10-07 15:06 UTC (permalink / raw)
To: linux-arm-kernel
The following patches add basic support for the Genesi EfikaMX nettop[1].
Serial port, USB OTG and Ethernet works.
The new machine name has been agreed with Russell[2].
Kernel tested on babbage 3.0 and efikamx boards.
Patches apply to the imx git tree.
Regards,
Amit
[1] http://www.genesi-usa.com/
[2] http://www.spinics.net/lists/arm-kernel/msg98960.html
Amit Kucheria (2):
mx51: Move OTG initialisation for all boards to a single file
mx51: add support for genesi efikamx nettop
arch/arm/mach-mx5/Kconfig | 8 +++
arch/arm/mach-mx5/Makefile | 3 +-
arch/arm/mach-mx5/board-cpuimx51.c | 30 +---------
arch/arm/mach-mx5/board-mx51_babbage.c | 30 +---------
arch/arm/mach-mx5/board-mx51_efikamx.c | 95 ++++++++++++++++++++++++++++++++
arch/arm/mach-mx5/usb.c | 42 ++++++++++++++
arch/arm/mach-mx5/usb.h | 1 +
7 files changed, 154 insertions(+), 55 deletions(-)
create mode 100644 arch/arm/mach-mx5/board-mx51_efikamx.c
create mode 100644 arch/arm/mach-mx5/usb.c
create mode 100644 arch/arm/mach-mx5/usb.h
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file
2010-10-07 15:06 [PATCHv2 0/2] mxc: mx51: Add support for efikamx nettop Amit Kucheria
@ 2010-10-07 15:07 ` Amit Kucheria
2010-10-07 16:53 ` Sascha Hauer
2010-10-07 15:07 ` [PATCHv2 2/2] mx51: add support for genesi efikamx nettop Amit Kucheria
1 sibling, 1 reply; 4+ messages in thread
From: Amit Kucheria @ 2010-10-07 15:07 UTC (permalink / raw)
To: linux-arm-kernel
The OTG initialisation is the same for all MX51 boards currently known. Move
to a common file.
Fix the pll divider name while at it: MX51_USB_PLL_DIV_24_MHZ corresponds to
0x1, not MX51_USB_PLL_DIV_19_2_MHZ
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm/mach-mx5/Makefile | 2 +-
arch/arm/mach-mx5/board-cpuimx51.c | 30 ++--------------------
arch/arm/mach-mx5/board-mx51_babbage.c | 30 ++--------------------
arch/arm/mach-mx5/usb.c | 42 ++++++++++++++++++++++++++++++++
arch/arm/mach-mx5/usb.h | 1 +
5 files changed, 50 insertions(+), 55 deletions(-)
create mode 100644 arch/arm/mach-mx5/usb.c
create mode 100644 arch/arm/mach-mx5/usb.h
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 86c66e7..ac0d14c 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -3,7 +3,7 @@
#
# Object file lists.
-obj-y := cpu.o mm.o clock-mx51.o devices.o
+obj-y := cpu.o mm.o clock-mx51.o devices.o usb.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index a6c09c7..ff5d223 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -39,6 +39,7 @@
#include "devices-imx51.h"
#include "devices.h"
+#include "usb.h"
#define CPUIMX51_USBH1_STP (0*32 + 27)
#define CPUIMX51_QUARTA_GPIO (2*32 + 28)
@@ -56,10 +57,6 @@
#define MX51_USB_CTRL_1_OFFSET 0x10
#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
-#define MX51_USB_PLLDIV_12_MHZ 0x00
-#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
-#define MX51_USB_PLL_DIV_24_MHZ 0x02
-
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
static struct plat_serial8250_port serial_platform_data[] = {
{
@@ -162,27 +159,6 @@ static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {
},
};
-/* This function is board specific as the bit mask for the plldiv will also
-be different for other Freescale SoCs, thus a common bitmask is not
-possible and cannot get place in /plat-mxc/ehci.c.*/
-static int initialize_otg_port(struct platform_device *pdev)
-{
- u32 v;
- void __iomem *usb_base;
- void __iomem *usbother_base;
-
- usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
- usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-
- /* Set the PHY clock to 19.2MHz */
- v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
- v |= MX51_USB_PLL_DIV_19_2_MHZ;
- __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- iounmap(usb_base);
- return 0;
-}
-
static int initialize_usbh1_port(struct platform_device *pdev)
{
u32 v;
@@ -200,7 +176,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
}
static struct mxc_usbh_platform_data dr_utmi_config = {
- .init = initialize_otg_port,
+ .init = mx51_initialize_otg_port,
.portsc = MXC_EHCI_UTMI_16BIT,
.flags = MXC_EHCI_INTERNAL_PHY,
};
@@ -262,7 +238,7 @@ static void __init eukrea_cpuimx51_init(void)
if (otg_mode_host)
mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
else {
- initialize_otg_port(NULL);
+ mx51_initialize_otg_port(NULL);
mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
}
mxc_register_device(&mxc_usbh1_device, &usbh1_config);
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 7c0b661..a84de02 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -32,6 +32,7 @@
#include "devices-imx51.h"
#include "devices.h"
+#include "usb.h"
#define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
#define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
@@ -42,10 +43,6 @@
#define MX51_USB_CTRL_1_OFFSET 0x10
#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
-#define MX51_USB_PLLDIV_12_MHZ 0x00
-#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
-#define MX51_USB_PLL_DIV_24_MHZ 0x02
-
static struct platform_device *devices[] __initdata = {
&mxc_fec_device,
};
@@ -210,27 +207,6 @@ static inline void babbage_fec_reset(void)
gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
}
-/* This function is board specific as the bit mask for the plldiv will also
-be different for other Freescale SoCs, thus a common bitmask is not
-possible and cannot get place in /plat-mxc/ehci.c.*/
-static int initialize_otg_port(struct platform_device *pdev)
-{
- u32 v;
- void __iomem *usb_base;
- void __iomem *usbother_base;
-
- usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
- usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
-
- /* Set the PHY clock to 19.2MHz */
- v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
- v |= MX51_USB_PLL_DIV_19_2_MHZ;
- __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
- iounmap(usb_base);
- return 0;
-}
-
static int initialize_usbh1_port(struct platform_device *pdev)
{
u32 v;
@@ -248,7 +224,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
}
static struct mxc_usbh_platform_data dr_utmi_config = {
- .init = initialize_otg_port,
+ .init = mx51_initialize_otg_port,
.portsc = MXC_EHCI_UTMI_16BIT,
.flags = MXC_EHCI_INTERNAL_PHY,
};
@@ -299,7 +275,7 @@ static void __init mxc_board_init(void)
if (otg_mode_host)
mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
else {
- initialize_otg_port(NULL);
+ mx51_initialize_otg_port(NULL);
mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
}
diff --git a/arch/arm/mach-mx5/usb.c b/arch/arm/mach-mx5/usb.c
new file mode 100644
index 0000000..ebb7c3a
--- /dev/null
+++ b/arch/arm/mach-mx5/usb.c
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2010 Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/mxc_ehci.h>
+
+#define MX51_USB_PLL_DIV_24_MHZ 0x01
+
+/* This function is SoC-specific as the bit mask for the plldiv will also
+ * be different for other Freescale SoCs, thus a common bitmask is not
+ * possible and cannot get place in /plat-mxc/ehci.c.
+ */
+int mx51_initialize_otg_port(struct platform_device *pdev)
+{
+ u32 v;
+ void __iomem *usb_base;
+ void __iomem *usbother_base;
+
+ usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
+ if (!usb_base) {
+ dev_err(&pdev->dev, "OTG ioremap failed\n");
+ return -ENOMEM;
+ }
+ usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
+
+ /* Set the PHY clock to 24 MHz */
+ v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
+ v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
+ v |= MX51_USB_PLL_DIV_24_MHZ;
+ __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
+ iounmap(usb_base);
+
+ return 0;
+}
diff --git a/arch/arm/mach-mx5/usb.h b/arch/arm/mach-mx5/usb.h
new file mode 100644
index 0000000..a1fc8d9
--- /dev/null
+++ b/arch/arm/mach-mx5/usb.h
@@ -0,0 +1 @@
+extern int mx51_initialize_otg_port(struct platform_device *pdev);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCHv2 2/2] mx51: add support for genesi efikamx nettop
2010-10-07 15:06 [PATCHv2 0/2] mxc: mx51: Add support for efikamx nettop Amit Kucheria
2010-10-07 15:07 ` [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file Amit Kucheria
@ 2010-10-07 15:07 ` Amit Kucheria
1 sibling, 0 replies; 4+ messages in thread
From: Amit Kucheria @ 2010-10-07 15:07 UTC (permalink / raw)
To: linux-arm-kernel
Get serial port and OTG USB working for now. There is an ethernet device
(asix) attached to OTG, so we should get ethernet too.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
---
arch/arm/mach-mx5/Kconfig | 8 +++
arch/arm/mach-mx5/Makefile | 1 +
arch/arm/mach-mx5/board-mx51_efikamx.c | 95 ++++++++++++++++++++++++++++++++
3 files changed, 104 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-mx5/board-mx51_efikamx.c
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 3a4c3b3..1c8b263 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -18,6 +18,14 @@ config MACH_MX51_BABBAGE
u-boot. This includes specific configurations for the board and its
peripherals.
+config MACH_MX51_EFIKAMX
+ bool "Support MX51 Genesi Efika MX nettop"
+ select IMX_HAVE_PLATFORM_IMX_UART
+ help
+ Include support for Genesi Efika MX nettop. This includes specific
+ configurations for the board and its peripherals.
+
+
config MACH_MX51_3DS
bool "Support MX51PDK (3DS)"
select IMX_HAVE_PLATFORM_IMX_UART
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index ac0d14c..f370d70 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -6,6 +6,7 @@
obj-y := cpu.o mm.o clock-mx51.o devices.o usb.o
obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
+obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX51) += board-cpuimx51.o
obj-$(CONFIG_MACH_EUKREA_MBIMX51_BASEBOARD) += eukrea_mbimx51-baseboard.o
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
new file mode 100644
index 0000000..5d61175
--- /dev/null
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2010 Linaro Limited
+ *
+ * based on code from the following
+ * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
+ * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/fsl_devices.h>
+
+#include <mach/common.h>
+#include <mach/hardware.h>
+#include <mach/iomux-mx51.h>
+#include <mach/i2c.h>
+#include <mach/mxc_ehci.h>
+
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/time.h>
+
+#include "devices-imx51.h"
+#include "devices.h"
+#include "usb.h"
+
+static struct pad_desc mx51efikamx_pads[] = {
+ /* UART1 */
+ MX51_PAD_UART1_RXD__UART1_RXD,
+ MX51_PAD_UART1_TXD__UART1_TXD,
+ MX51_PAD_UART1_RTS__UART1_RTS,
+ MX51_PAD_UART1_CTS__UART1_CTS,
+};
+
+/* Serial ports */
+#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
+static const struct imxuart_platform_data uart_pdata __initconst = {
+ .flags = IMXUART_HAVE_RTSCTS,
+};
+
+static inline void mxc_init_imx_uart(void)
+{
+ imx51_add_imx_uart(0, &uart_pdata);
+ imx51_add_imx_uart(1, &uart_pdata);
+ imx51_add_imx_uart(2, &uart_pdata);
+}
+#else /* !SERIAL_IMX */
+static inline void mxc_init_imx_uart(void)
+{
+}
+#endif /* SERIAL_IMX */
+
+static struct mxc_usbh_platform_data dr_utmi_config = {
+ .init = mx51_initialize_otg_port,
+ .portsc = MXC_EHCI_UTMI_16BIT,
+ .flags = MXC_EHCI_INTERNAL_PHY,
+};
+
+static void __init mx51_efikamx_board_init(void)
+{
+ mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
+ ARRAY_SIZE(mx51efikamx_pads));
+ mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
+ mxc_init_imx_uart();
+}
+
+static void __init mx51_efikamx_timer_init(void)
+{
+ mx51_clocks_init(32768, 24000000, 22579200, 24576000);
+}
+
+static struct sys_timer mxc_timer = {
+ .init = mx51_efikamx_timer_init,
+};
+
+MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
+ /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
+ .phys_io = MX51_AIPS1_BASE_ADDR,
+ .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .map_io = mx51_map_io,
+ .init_irq = mx51_init_irq,
+ .init_machine = mx51_efikamx_board_init,
+ .timer = &mxc_timer,
+MACHINE_END
--
1.7.0.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file
2010-10-07 15:07 ` [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file Amit Kucheria
@ 2010-10-07 16:53 ` Sascha Hauer
0 siblings, 0 replies; 4+ messages in thread
From: Sascha Hauer @ 2010-10-07 16:53 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Oct 07, 2010 at 06:07:21PM +0300, Amit Kucheria wrote:
> The OTG initialisation is the same for all MX51 boards currently known. Move
> to a common file.
>
> Fix the pll divider name while at it: MX51_USB_PLL_DIV_24_MHZ corresponds to
> 0x1, not MX51_USB_PLL_DIV_19_2_MHZ
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> ---
> arch/arm/mach-mx5/Makefile | 2 +-
> arch/arm/mach-mx5/board-cpuimx51.c | 30 ++--------------------
> arch/arm/mach-mx5/board-mx51_babbage.c | 30 ++--------------------
> arch/arm/mach-mx5/usb.c | 42 ++++++++++++++++++++++++++++++++
> arch/arm/mach-mx5/usb.h | 1 +
> 5 files changed, 50 insertions(+), 55 deletions(-)
> create mode 100644 arch/arm/mach-mx5/usb.c
> create mode 100644 arch/arm/mach-mx5/usb.h
>
> diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
> index 86c66e7..ac0d14c 100644
> --- a/arch/arm/mach-mx5/Makefile
> +++ b/arch/arm/mach-mx5/Makefile
> @@ -3,7 +3,7 @@
> #
>
> # Object file lists.
> -obj-y := cpu.o mm.o clock-mx51.o devices.o
> +obj-y := cpu.o mm.o clock-mx51.o devices.o usb.o
>
> obj-$(CONFIG_MACH_MX51_BABBAGE) += board-mx51_babbage.o
> obj-$(CONFIG_MACH_MX51_3DS) += board-mx51_3ds.o
> diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
> index a6c09c7..ff5d223 100644
> --- a/arch/arm/mach-mx5/board-cpuimx51.c
> +++ b/arch/arm/mach-mx5/board-cpuimx51.c
> @@ -39,6 +39,7 @@
>
> #include "devices-imx51.h"
> #include "devices.h"
> +#include "usb.h"
>
> #define CPUIMX51_USBH1_STP (0*32 + 27)
> #define CPUIMX51_QUARTA_GPIO (2*32 + 28)
> @@ -56,10 +57,6 @@
> #define MX51_USB_CTRL_1_OFFSET 0x10
> #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
>
> -#define MX51_USB_PLLDIV_12_MHZ 0x00
> -#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
> -#define MX51_USB_PLL_DIV_24_MHZ 0x02
> -
> #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
> static struct plat_serial8250_port serial_platform_data[] = {
> {
> @@ -162,27 +159,6 @@ static struct i2c_board_info eukrea_cpuimx51_i2c_devices[] = {
> },
> };
>
> -/* This function is board specific as the bit mask for the plldiv will also
> -be different for other Freescale SoCs, thus a common bitmask is not
> -possible and cannot get place in /plat-mxc/ehci.c.*/
> -static int initialize_otg_port(struct platform_device *pdev)
> -{
> - u32 v;
> - void __iomem *usb_base;
> - void __iomem *usbother_base;
> -
> - usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
> - usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
> -
> - /* Set the PHY clock to 19.2MHz */
> - v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> - v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
> - v |= MX51_USB_PLL_DIV_19_2_MHZ;
> - __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> - iounmap(usb_base);
> - return 0;
> -}
> -
> static int initialize_usbh1_port(struct platform_device *pdev)
> {
> u32 v;
> @@ -200,7 +176,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
> }
>
> static struct mxc_usbh_platform_data dr_utmi_config = {
> - .init = initialize_otg_port,
> + .init = mx51_initialize_otg_port,
> .portsc = MXC_EHCI_UTMI_16BIT,
> .flags = MXC_EHCI_INTERNAL_PHY,
> };
> @@ -262,7 +238,7 @@ static void __init eukrea_cpuimx51_init(void)
> if (otg_mode_host)
> mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
> else {
> - initialize_otg_port(NULL);
> + mx51_initialize_otg_port(NULL);
> mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
> }
> mxc_register_device(&mxc_usbh1_device, &usbh1_config);
> diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
> index 7c0b661..a84de02 100644
> --- a/arch/arm/mach-mx5/board-mx51_babbage.c
> +++ b/arch/arm/mach-mx5/board-mx51_babbage.c
> @@ -32,6 +32,7 @@
>
> #include "devices-imx51.h"
> #include "devices.h"
> +#include "usb.h"
>
> #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
> #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
> @@ -42,10 +43,6 @@
> #define MX51_USB_CTRL_1_OFFSET 0x10
> #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
>
> -#define MX51_USB_PLLDIV_12_MHZ 0x00
> -#define MX51_USB_PLL_DIV_19_2_MHZ 0x01
> -#define MX51_USB_PLL_DIV_24_MHZ 0x02
> -
> static struct platform_device *devices[] __initdata = {
> &mxc_fec_device,
> };
> @@ -210,27 +207,6 @@ static inline void babbage_fec_reset(void)
> gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
> }
>
> -/* This function is board specific as the bit mask for the plldiv will also
> -be different for other Freescale SoCs, thus a common bitmask is not
> -possible and cannot get place in /plat-mxc/ehci.c.*/
> -static int initialize_otg_port(struct platform_device *pdev)
> -{
> - u32 v;
> - void __iomem *usb_base;
> - void __iomem *usbother_base;
> -
> - usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
> - usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
> -
> - /* Set the PHY clock to 19.2MHz */
> - v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> - v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
> - v |= MX51_USB_PLL_DIV_19_2_MHZ;
> - __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> - iounmap(usb_base);
> - return 0;
> -}
> -
> static int initialize_usbh1_port(struct platform_device *pdev)
> {
> u32 v;
> @@ -248,7 +224,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
> }
>
> static struct mxc_usbh_platform_data dr_utmi_config = {
> - .init = initialize_otg_port,
> + .init = mx51_initialize_otg_port,
> .portsc = MXC_EHCI_UTMI_16BIT,
> .flags = MXC_EHCI_INTERNAL_PHY,
> };
> @@ -299,7 +275,7 @@ static void __init mxc_board_init(void)
> if (otg_mode_host)
> mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
> else {
> - initialize_otg_port(NULL);
> + mx51_initialize_otg_port(NULL);
> mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
> }
>
> diff --git a/arch/arm/mach-mx5/usb.c b/arch/arm/mach-mx5/usb.c
> new file mode 100644
> index 0000000..ebb7c3a
> --- /dev/null
> +++ b/arch/arm/mach-mx5/usb.c
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright (C) 2010 Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/mxc_ehci.h>
> +
> +#define MX51_USB_PLL_DIV_24_MHZ 0x01
> +
> +/* This function is SoC-specific as the bit mask for the plldiv will also
> + * be different for other Freescale SoCs, thus a common bitmask is not
> + * possible and cannot get place in /plat-mxc/ehci.c.
> + */
> +int mx51_initialize_otg_port(struct platform_device *pdev)
> +{
> + u32 v;
> + void __iomem *usb_base;
> + void __iomem *usbother_base;
> +
> + usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
> + if (!usb_base) {
> + dev_err(&pdev->dev, "OTG ioremap failed\n");
> + return -ENOMEM;
> + }
> + usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
> +
> + /* Set the PHY clock to 24 MHz */
> + v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> + v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
> + v |= MX51_USB_PLL_DIV_24_MHZ;
> + __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
> + iounmap(usb_base);
> +
> + return 0;
> +}
Hm, can't we have a function which gets a pointer to a struct containing
all relevant register settings like described in my other mail this day?
We could even start doing so by only changing the i.MX51 code.
BTW this function only works because the i.MX51 clock layer forgets to
turn of unused clocks. I tried to turn off the clocks to get the CPU a
bit cooler and this one place where it failed.
Sascha
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^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2010-10-07 16:53 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-10-07 15:06 [PATCHv2 0/2] mxc: mx51: Add support for efikamx nettop Amit Kucheria
2010-10-07 15:07 ` [PATCHv2 1/2] mx51: Move OTG initialisation for all boards to a single file Amit Kucheria
2010-10-07 16:53 ` Sascha Hauer
2010-10-07 15:07 ` [PATCHv2 2/2] mx51: add support for genesi efikamx nettop Amit Kucheria
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