[PATCH v2 1/3] clk: zte: add i2s clocks for zx296718

[PATCH v2 1/3] clk: zte: add i2s clocks for zx296718

[Baoyou Xie]

The i2s related clock support is missing from the existing zx296718
clock driver. This patch adds it, so that the upstream ZX I2S driver
can work out.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
 drivers/clk/zte/clk-zx296718.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c
index ad5d1df..f106d40 100644
--- a/drivers/clk/zte/clk-zx296718.c
+++ b/drivers/clk/zte/clk-zx296718.c
@@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = {
 	GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0),
 	GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0),
 	GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0),
+	GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0),
+	GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0),
+	GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0),
+	GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0),
 };
 
 static struct clk_hw_onecell_data audio_hw_onecell_data = {
-- 
2.7.4

[PATCH v2 2/3] dt: ASoC: zx-i2s: Document for the ZTE zx296718 I2S controller

[Baoyou Xie]

This patch documents the devicetree for the ZTE's zx296718
I2S audio controller.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
 Documentation/devicetree/bindings/sound/zte,zx-i2s.txt | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
index 7e5aa6f..c405561 100644
--- a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
+++ b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
@@ -1,10 +1,12 @@
 ZTE ZX296702 I2S controller
 
 Required properties:
- - compatible : Must be "zte,zx296702-i2s"
+ - compatible : Should include one of the following strings:
+	"zte,zx296702-i2s","zte,zx296718-i2s".
  - reg : Must contain I2S core's registers location and length
  - clocks : Pairs of phandle and specifier referencing the controller's clocks.
- - clock-names: "tx" for the clock to the I2S interface.
+ - clock-names: "tx" for the wclk, "pclk" for the pclk to the I2S interface.
+	must contain pclk for zx296718 SoC.
  - dmas: Pairs of phandle and specifier for the DMA channel that is used by
    the core. The core expects two dma channels for transmit.
  - dma-names : Must be "tx" and "rx"
-- 
2.7.4

[PATCH v2 3/3] ASoC: zx-i2s: support zx296718 SoC for ZTE's i2s controller driver

[Baoyou Xie]

This patch adds zx296718 SoC support for ZTE's i2s controller driver.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
 sound/soc/zte/zx-i2s.c | 45 +++++++++++++++++++++++++++++++++++----------
 1 file changed, 35 insertions(+), 10 deletions(-)

diff --git a/sound/soc/zte/zx-i2s.c b/sound/soc/zte/zx-i2s.c
index ed7a56d..2afac69 100644
--- a/sound/soc/zte/zx-i2s.c
+++ b/sound/soc/zte/zx-i2s.c
@@ -95,12 +95,13 @@
 struct zx_i2s_info {
 	struct snd_dmaengine_dai_dma_data	dma_playback;
 	struct snd_dmaengine_dai_dma_data	dma_capture;
-	struct clk				*dai_clk;
+	struct clk				*dai_wclk, *dai_pclk;
 	void __iomem				*reg_base;
 	int					master;
 	resource_size_t				mapbase;
 };
 
+
 static void zx_i2s_tx_en(void __iomem *base, bool on)
 {
 	unsigned long val;
@@ -274,9 +275,14 @@ static int zx_i2s_hw_params(struct snd_pcm_substream *substream,
 	val |= ZX_I2S_TIMING_CHN(ch_num);
 	writel_relaxed(val, i2s->reg_base + ZX_I2S_TIMING_CTRL);
 
-	if (i2s->master)
-		ret = clk_set_rate(i2s->dai_clk,
-				   params_rate(params) * ch_num * CLK_RAT);
+	if (i2s->master) {
+		unsigned long rate = params_rate(params) * ch_num * CLK_RAT;
+
+		ret = clk_set_rate(i2s->dai_wclk, rate);
+		if (!ret && i2s->dai_pclk)
+			ret = clk_set_rate(i2s->dai_pclk, rate);
+	}
+
 	return ret;
 }
 
@@ -328,8 +334,19 @@ static int zx_i2s_startup(struct snd_pcm_substream *substream,
 			  struct snd_soc_dai *dai)
 {
 	struct zx_i2s_info *zx_i2s = dev_get_drvdata(dai->dev);
+	int ret;
+
+	ret = clk_prepare_enable(zx_i2s->dai_wclk);
+	if (ret)
+		return ret;
 
-	return clk_prepare_enable(zx_i2s->dai_clk);
+	ret = clk_prepare_enable(zx_i2s->dai_pclk);
+	if (ret) {
+		clk_disable_unprepare(zx_i2s->dai_wclk);
+		return ret;
+	}
+
+	return ret;
 }
 
 static void zx_i2s_shutdown(struct snd_pcm_substream *substream,
@@ -337,7 +354,8 @@ static void zx_i2s_shutdown(struct snd_pcm_substream *substream,
 {
 	struct zx_i2s_info *zx_i2s = dev_get_drvdata(dai->dev);
 
-	clk_disable_unprepare(zx_i2s->dai_clk);
+	clk_disable_unprepare(zx_i2s->dai_wclk);
+	clk_disable_unprepare(zx_i2s->dai_pclk);
 }
 
 static struct snd_soc_dai_ops zx_i2s_dai_ops = {
@@ -381,10 +399,16 @@ static int zx_i2s_probe(struct platform_device *pdev)
 	if (!zx_i2s)
 		return -ENOMEM;
 
-	zx_i2s->dai_clk = devm_clk_get(&pdev->dev, "tx");
-	if (IS_ERR(zx_i2s->dai_clk)) {
-		dev_err(&pdev->dev, "Fail to get clk\n");
-		return PTR_ERR(zx_i2s->dai_clk);
+	zx_i2s->dai_wclk = devm_clk_get(&pdev->dev, "tx");
+	if (IS_ERR(zx_i2s->dai_wclk)) {
+		dev_err(&pdev->dev, "Fail to get wclk\n");
+		return PTR_ERR(zx_i2s->dai_wclk);
+	}
+
+	zx_i2s->dai_pclk = devm_clk_get(&pdev->dev, "pclk");
+	if (IS_ERR(zx_i2s->dai_pclk)) {
+		dev_info(&pdev->dev, "have no pclk\n");
+		zx_i2s->dai_pclk = NULL;
 	}
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -414,6 +438,7 @@ static int zx_i2s_probe(struct platform_device *pdev)
 
 static const struct of_device_id zx_i2s_dt_ids[] = {
 	{ .compatible = "zte,zx296702-i2s", },
+	{ .compatible = "zte,zx296718-i2s", },
 	{}
 };
 MODULE_DEVICE_TABLE(of, zx_i2s_dt_ids);
-- 
2.7.4

[PATCH v2 1/3] clk: zte: add i2s clocks for zx296718

[Shawn Guo]

On Tue, Feb 07, 2017 at 11:02:49AM +0800, Baoyou Xie wrote:
> The i2s related clock support is missing from the existing zx296718
> clock driver. This patch adds it, so that the upstream ZX I2S driver
> can work out.
> 
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
>  drivers/clk/zte/clk-zx296718.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c
> index ad5d1df..f106d40 100644
> --- a/drivers/clk/zte/clk-zx296718.c
> +++ b/drivers/clk/zte/clk-zx296718.c
> @@ -941,6 +941,10 @@ static struct zx_clk_gate audio_gate_clk[] = {
>  	GATE(AUDIO_SPDIF1_WCLK, "spdif1_wclk", "spdif1_wclk_div", AUDIO_SPDIF1_CLK, 9, CLK_SET_RATE_PARENT, 0),
>  	GATE(AUDIO_TDM_WCLK, "tdm_wclk", "tdm_wclk_div", AUDIO_TDM_CLK, 17, CLK_SET_RATE_PARENT, 0),
>  	GATE(AUDIO_TS_PCLK, "tempsensor_pclk", "clk49m5", AUDIO_TS_CLK, 1, 0, 0),
> +	GATE(AUDIO_I2S0_PCLK, "i2s0_pclk", "clk49m5", AUDIO_I2S0_CLK, 8, 0, 0),
> +	GATE(AUDIO_I2S1_PCLK, "i2s1_pclk", "clk49m5", AUDIO_I2S1_CLK, 8, 0, 0),
> +	GATE(AUDIO_I2S2_PCLK, "i2s2_pclk", "clk49m5", AUDIO_I2S2_CLK, 8, 0, 0),
> +	GATE(AUDIO_I2S3_PCLK, "i2s3_pclk", "clk49m5", AUDIO_I2S3_CLK, 8, 0, 0),

I would suggest we put these clocks together with AUDIO_I2S_WCLK, so
that we can find I2S clocks in one place.

Shawn

>  };
>  
>  static struct clk_hw_onecell_data audio_hw_onecell_data = {
> -- 
> 2.7.4
> 

[PATCH v2 3/3] ASoC: zx-i2s: support zx296718 SoC for ZTE's i2s controller driver

[Shawn Guo]

On Tue, Feb 07, 2017 at 11:02:51AM +0800, Baoyou Xie wrote:
> This patch adds zx296718 SoC support for ZTE's i2s controller driver.
> 
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
>  sound/soc/zte/zx-i2s.c | 45 +++++++++++++++++++++++++++++++++++----------
>  1 file changed, 35 insertions(+), 10 deletions(-)
> 
> diff --git a/sound/soc/zte/zx-i2s.c b/sound/soc/zte/zx-i2s.c
> index ed7a56d..2afac69 100644
> --- a/sound/soc/zte/zx-i2s.c
> +++ b/sound/soc/zte/zx-i2s.c
> @@ -95,12 +95,13 @@
>  struct zx_i2s_info {
>  	struct snd_dmaengine_dai_dma_data	dma_playback;
>  	struct snd_dmaengine_dai_dma_data	dma_capture;
> -	struct clk				*dai_clk;
> +	struct clk				*dai_wclk, *dai_pclk;
>  	void __iomem				*reg_base;
>  	int					master;
>  	resource_size_t				mapbase;
>  };
>  
> +

This newline is unnecessary.

>  static void zx_i2s_tx_en(void __iomem *base, bool on)
>  {
>  	unsigned long val;
> @@ -274,9 +275,14 @@ static int zx_i2s_hw_params(struct snd_pcm_substream *substream,
>  	val |= ZX_I2S_TIMING_CHN(ch_num);
>  	writel_relaxed(val, i2s->reg_base + ZX_I2S_TIMING_CTRL);
>  
> -	if (i2s->master)
> -		ret = clk_set_rate(i2s->dai_clk,
> -				   params_rate(params) * ch_num * CLK_RAT);
> +	if (i2s->master) {
> +		unsigned long rate = params_rate(params) * ch_num * CLK_RAT;
> +
> +		ret = clk_set_rate(i2s->dai_wclk, rate);
> +		if (!ret && i2s->dai_pclk)
> +			ret = clk_set_rate(i2s->dai_pclk, rate);

The 'pclk' is APB bus clock fed into I2S controller.  I don't think we
need to set its frequency per audio frequency.

> +	}
> +
>  	return ret;
>  }
>  
> @@ -328,8 +334,19 @@ static int zx_i2s_startup(struct snd_pcm_substream *substream,
>  			  struct snd_soc_dai *dai)
>  {
>  	struct zx_i2s_info *zx_i2s = dev_get_drvdata(dai->dev);
> +	int ret;
> +
> +	ret = clk_prepare_enable(zx_i2s->dai_wclk);
> +	if (ret)
> +		return ret;
>  
> -	return clk_prepare_enable(zx_i2s->dai_clk);
> +	ret = clk_prepare_enable(zx_i2s->dai_pclk);
> +	if (ret) {
> +		clk_disable_unprepare(zx_i2s->dai_wclk);
> +		return ret;
> +	}
> +
> +	return ret;
>  }
>  
>  static void zx_i2s_shutdown(struct snd_pcm_substream *substream,
> @@ -337,7 +354,8 @@ static void zx_i2s_shutdown(struct snd_pcm_substream *substream,
>  {
>  	struct zx_i2s_info *zx_i2s = dev_get_drvdata(dai->dev);
>  
> -	clk_disable_unprepare(zx_i2s->dai_clk);
> +	clk_disable_unprepare(zx_i2s->dai_wclk);
> +	clk_disable_unprepare(zx_i2s->dai_pclk);
>  }
>  
>  static struct snd_soc_dai_ops zx_i2s_dai_ops = {
> @@ -381,10 +399,16 @@ static int zx_i2s_probe(struct platform_device *pdev)
>  	if (!zx_i2s)
>  		return -ENOMEM;
>  
> -	zx_i2s->dai_clk = devm_clk_get(&pdev->dev, "tx");
> -	if (IS_ERR(zx_i2s->dai_clk)) {
> -		dev_err(&pdev->dev, "Fail to get clk\n");
> -		return PTR_ERR(zx_i2s->dai_clk);
> +	zx_i2s->dai_wclk = devm_clk_get(&pdev->dev, "tx");
> +	if (IS_ERR(zx_i2s->dai_wclk)) {
> +		dev_err(&pdev->dev, "Fail to get wclk\n");
> +		return PTR_ERR(zx_i2s->dai_wclk);
> +	}
> +
> +	zx_i2s->dai_pclk = devm_clk_get(&pdev->dev, "pclk");
> +	if (IS_ERR(zx_i2s->dai_pclk)) {
> +		dev_info(&pdev->dev, "have no pclk\n");
> +		zx_i2s->dai_pclk = NULL;
>  	}
>  
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> @@ -414,6 +438,7 @@ static int zx_i2s_probe(struct platform_device *pdev)
>  
>  static const struct of_device_id zx_i2s_dt_ids[] = {
>  	{ .compatible = "zte,zx296702-i2s", },
> +	{ .compatible = "zte,zx296718-i2s", },

The I2S controller on ZX296702 actually has both wclk and pclk too, same
as ZX296718 I2S.  The problem is that the driver currently doesn't
handle pclk.  This is something we need to fix, regardless of ZX296718
support.

That said, ZX296718 I2S is compatible with ZX296702 one, and we do not
need to introduce new compatible string.  Instead, we can code the
compatible string on ZX296718 like below.

  compatible = "zte,zx296718-i2s", "zte,zx296702-i2s";

With the pclk handling added, the driver should just work for ZX296718.

Shawn

>  	{}
>  };
>  MODULE_DEVICE_TABLE(of, zx_i2s_dt_ids);
> -- 
> 2.7.4
> 

[PATCH v2 2/3] dt: ASoC: zx-i2s: Document for the ZTE zx296718 I2S controller

[Shawn Guo]

On Tue, Feb 07, 2017 at 11:02:50AM +0800, Baoyou Xie wrote:
> This patch documents the devicetree for the ZTE's zx296718
> I2S audio controller.
> 
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
>  Documentation/devicetree/bindings/sound/zte,zx-i2s.txt | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
> index 7e5aa6f..c405561 100644
> --- a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
> +++ b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
> @@ -1,10 +1,12 @@
>  ZTE ZX296702 I2S controller
>  
>  Required properties:
> - - compatible : Must be "zte,zx296702-i2s"
> + - compatible : Should include one of the following strings:
> +	"zte,zx296702-i2s","zte,zx296718-i2s".
>   - reg : Must contain I2S core's registers location and length
>   - clocks : Pairs of phandle and specifier referencing the controller's clocks.
> - - clock-names: "tx" for the clock to the I2S interface.
> + - clock-names: "tx" for the wclk, "pclk" for the pclk to the I2S interface.
> +	must contain pclk for zx296718 SoC.

The 'pclk' is really required for zx296702-i2s as well.  The driver may
happen to work on zx296702 only because 'pclk' is already enabled by
someone else before I2S driver starts working.

Shawn

>   - dmas: Pairs of phandle and specifier for the DMA channel that is used by
>     the core. The core expects two dma channels for transmit.
>   - dma-names : Must be "tx" and "rx"
> -- 
> 2.7.4
> 

[PATCH v2 2/3] dt: ASoC: zx-i2s: Document for the ZTE zx296718 I2S controller

[Mark Brown]

On Tue, Feb 07, 2017 at 11:02:50AM +0800, Baoyou Xie wrote:
> This patch documents the devicetree for the ZTE's zx296718
> I2S audio controller.

Please submit patches using subject lines reflecting the style for the
subsystem.  This makes it easier for people to identify relevant
patches.  Look at what existing commits in the area you're changing are
doing and make sure your subject lines visually resemble what they're
doing.
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