From: chunyan.zhang@spreadtrum.com (Chunyan Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 01/12] drivers: move clock common macros out from vendor directories
Date: Mon, 20 Nov 2017 14:01:26 +0800 [thread overview]
Message-ID: <20171120060137.27380-2-chunyan.zhang@spreadtrum.com> (raw)
In-Reply-To: <20171120060137.27380-1-chunyan.zhang@spreadtrum.com>
These macros are used by more than one SoC vendor platforms, avoid to
have many copies of these code, this patch moves them to the common
clock directory which every clock drivers can access to.
Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
---
drivers/clk/clk_common.h | 60 ++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
create mode 100644 drivers/clk/clk_common.h
diff --git a/drivers/clk/clk_common.h b/drivers/clk/clk_common.h
new file mode 100644
index 0000000..21e93d2
--- /dev/null
+++ b/drivers/clk/clk_common.h
@@ -0,0 +1,60 @@
+/*
+ * drivers/clk/clk_common.h
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _CLK_COMMON_H_
+#define _CLK_COMMON_H_
+
+#include <linux/clk-provider.h>
+
+#define CLK_HW_INIT(_name, _parent, _ops, _flags) \
+ (&(struct clk_init_data) { \
+ .flags = _flags, \
+ .name = _name, \
+ .parent_names = (const char *[]) { _parent }, \
+ .num_parents = 1, \
+ .ops = _ops, \
+ })
+
+#define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \
+ (&(struct clk_init_data) { \
+ .flags = _flags, \
+ .name = _name, \
+ .parent_names = _parents, \
+ .num_parents = ARRAY_SIZE(_parents), \
+ .ops = _ops, \
+ })
+
+#define CLK_HW_INIT_NO_PARENT(_name, _ops, _flags) \
+ (&(struct clk_init_data) { \
+ .flags = _flags, \
+ .name = _name, \
+ .parent_names = NULL, \
+ .num_parents = 0, \
+ .ops = _ops, \
+ })
+
+#define CLK_FIXED_FACTOR(_struct, _name, _parent, \
+ _div, _mult, _flags) \
+ struct clk_fixed_factor _struct = { \
+ .div = _div, \
+ .mult = _mult, \
+ .hw.init = CLK_HW_INIT(_name, \
+ _parent, \
+ &clk_fixed_factor_ops, \
+ _flags), \
+ }
+
+#define CLK_FIXED_RATE(_struct, _name, _flags, \
+ _fixed_rate, _fixed_accuracy) \
+ struct clk_fixed_rate _struct = { \
+ .fixed_rate = _fixed_rate, \
+ .fixed_accuracy = _fixed_accuracy, \
+ .hw.init = CLK_HW_INIT_NO_PARENT(_name, \
+ &clk_fixed_rate_ops, \
+ _flags), \
+ }
+
+#endif /* _CLK_COMMON_H_ */
--
2.7.4
next prev parent reply other threads:[~2017-11-20 6:01 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-20 6:01 [PATCH V5 00/12] add clock driver for Spreadtrum platforms Chunyan Zhang
2017-11-20 6:01 ` Chunyan Zhang [this message]
2017-11-20 6:01 ` [PATCH V5 02/12] clk: sprd: Add common infrastructure Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 03/12] clk: sprd: add gate clock support Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 04/12] clk: sprd: add mux " Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 05/12] clk: sprd: add divider " Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 06/12] clk: sprd: add composite " Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 07/12] clk: sprd: add adjustable pll support Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 08/12] dt-bindings: Add Spreadtrum clock binding documentation Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 09/12] clk: sprd: Add dt-bindings include file for SC9860 Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 10/12] clk: sprd: add clocks support " Chunyan Zhang
2017-11-23 2:34 ` kbuild test robot
2017-11-20 6:01 ` [PATCH V5 11/12] arm64: dts: add syscon for whale2 platform Chunyan Zhang
2017-11-20 6:01 ` [PATCH V5 12/12] arm64: dts: add clocks for SC9860 Chunyan Zhang
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