* [PATCH v2 0/3] Reset controller support for i.MX8MQ
@ 2018-11-28 4:37 Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-11-28 4:37 UTC (permalink / raw)
To: linux-arm-kernel
Everyone:
This patch contains changes I made in order to add support for i.MX8MQ
to reset-imx7.c in order to enable support of PCIE IP block on i.MX8MQ
SoCs (full tree can be found at [github-v1]).
NOTE: This patch depens on CONFIG_ARCH_IMX8MQ introduced in [imx8mq]
Feedback is welcome!
Thanks,
Andrey Smirnov
Changes since [v1]
- Series re-written to use a per-variant LUT instead of using a
single table
- Changed driver to use "imx8mq" insead of "imx8m" to match other
drivers and CONFIG_ARCH_IMX8MQ
- Updated list of exported i.MX8MQ resets, add missing and remove
bogus ones (hopefully nothing is missing this time)
[v1] lkml.kernel.org/r/20181117181131.9330-2-andrew.smirnov at gmail.com
[github-v1] https://github.com/ndreys/linux/commits/imx8mq-pcie-v1
[imx8mq] https://www.spinics.net/lists/arm-kernel/msg687293.html
Andrey Smirnov (3):
reset: imx7: Add plubming to support multiple IP variants
reset: imx7: Add support for i.MX8MQ IP block variant
dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
.../bindings/reset/fsl,imx7-src.txt | 7 +-
drivers/reset/Kconfig | 2 +-
drivers/reset/reset-imx7.c | 166 ++++++++++++++++--
include/dt-bindings/reset/imx8mq-reset.h | 64 +++++++
4 files changed, 220 insertions(+), 19 deletions(-)
create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
--
2.19.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants
2018-11-28 4:37 [PATCH v2 0/3] Reset controller support for i.MX8MQ Andrey Smirnov
@ 2018-11-28 4:37 ` Andrey Smirnov
2018-11-28 8:07 ` kbuild test robot
2018-11-28 4:37 ` [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Andrey Smirnov
2 siblings, 1 reply; 8+ messages in thread
From: Andrey Smirnov @ 2018-11-28 4:37 UTC (permalink / raw)
To: linux-arm-kernel
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.
Cc: p.zabel at pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy at gmail.com
Cc: l.stach at pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree at vger.kernel.org
Cc: linux-imx at nxp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/reset/reset-imx7.c | 62 +++++++++++++++++++++++++++-----------
1 file changed, 45 insertions(+), 17 deletions(-)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index 77911fa8f31d..cfbb6346a72e 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -17,14 +17,29 @@
#include <linux/mfd/syscon.h>
#include <linux/mod_devicetable.h>
+#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/reset-controller.h>
#include <linux/regmap.h>
#include <dt-bindings/reset/imx7-reset.h>
+struct imx7_src_signal {
+ unsigned int offset, bit;
+};
+
+struct imx7_src;
+
+struct imx7_src_variant {
+ const struct imx7_src_signal *signals;
+ unsigned int signals_num;
+ unsigned int (*prepare)(struct imx7_src *imx7src, unsigned long id,
+ bool assert);
+};
+
struct imx7_src {
struct reset_controller_dev rcdev;
struct regmap *regmap;
+ struct imx7_src_variant *variant;
};
enum imx7_src_registers {
@@ -39,10 +54,6 @@ enum imx7_src_registers {
SRC_DDRC_RCR = 0x1000,
};
-struct imx7_src_signal {
- unsigned int offset, bit;
-};
-
static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) },
[IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) },
@@ -72,17 +83,11 @@ static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = {
[IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) },
};
-static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+static unsigned int
+imx7_src_prepare(struct imx7_src *imx7src, unsigned long id, bool assert)
{
- return container_of(rcdev, struct imx7_src, rcdev);
-}
-
-static int imx7_reset_set(struct reset_controller_dev *rcdev,
- unsigned long id, bool assert)
-{
- struct imx7_src *imx7src = to_imx7_src(rcdev);
- const struct imx7_src_signal *signal = &imx7_src_signals[id];
- unsigned int value = assert ? signal->bit : 0;
+ const unsigned int bit = imx7src->variant->signals[id].bit;
+ unsigned int value = assert ? bit : 0;
switch (id) {
case IMX7_RESET_PCIEPHY:
@@ -95,10 +100,32 @@ static int imx7_reset_set(struct reset_controller_dev *rcdev,
break;
case IMX7_RESET_PCIE_CTRL_APPS_EN:
- value = (assert) ? 0 : signal->bit;
+ value = assert ? 0 : bit;
break;
}
+ return value;
+}
+
+static const struct imx7_src_variant variant_imx7 = {
+ .signals = imx7_src_signals,
+ .signals_num = ARRAY_SIZE(imx7_src_signals),
+ .prepare = imx7_src_prepare,
+};
+
+static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
+{
+ return container_of(rcdev, struct imx7_src, rcdev);
+}
+
+static int imx7_reset_set(struct reset_controller_dev *rcdev,
+ unsigned long id, bool assert)
+{
+ struct imx7_src *imx7src = to_imx7_src(rcdev);
+ const struct imx7_src_variant *variant = imx7src->variant;
+ const struct imx7_src_signal *signal = &variant->signals[id];
+ const unsigned int value = variant->prepare(imx7src, id, assert);
+
return regmap_update_bits(imx7src->regmap,
signal->offset, signal->bit, value);
}
@@ -130,6 +157,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
if (!imx7src)
return -ENOMEM;
+ imx7src->variant = of_device_get_match_data(dev);
imx7src->regmap = syscon_node_to_regmap(dev->of_node);
if (IS_ERR(imx7src->regmap)) {
dev_err(dev, "Unable to get imx7-src regmap");
@@ -138,7 +166,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
regmap_attach_dev(dev, imx7src->regmap, &config);
imx7src->rcdev.owner = THIS_MODULE;
- imx7src->rcdev.nr_resets = IMX7_RESET_NUM;
+ imx7src->rcdev.nr_resets = imx7src->variant->signals_num;
imx7src->rcdev.ops = &imx7_reset_ops;
imx7src->rcdev.of_node = dev->of_node;
@@ -146,7 +174,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
}
static const struct of_device_id imx7_reset_dt_ids[] = {
- { .compatible = "fsl,imx7d-src", },
+ { .compatible = "fsl,imx7d-src", .data = &variant_imx7 },
{ /* sentinel */ },
};
--
2.19.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant
2018-11-28 4:37 [PATCH v2 0/3] Reset controller support for i.MX8MQ Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
@ 2018-11-28 4:37 ` Andrey Smirnov
2018-12-11 22:43 ` Rob Herring
2018-11-28 4:37 ` [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Andrey Smirnov
2 siblings, 1 reply; 8+ messages in thread
From: Andrey Smirnov @ 2018-11-28 4:37 UTC (permalink / raw)
To: linux-arm-kernel
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.
Cc: p.zabel at pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy at gmail.com
Cc: l.stach at pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree at vger.kernel.org
Cc: linux-imx at nxp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/reset/Kconfig | 2 +-
drivers/reset/reset-imx7.c | 106 +++++++++++++++++++++++
include/dt-bindings/reset/imx8mq-reset.h | 64 ++++++++++++++
3 files changed, 171 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index c21da9fe51ec..4909aab7401b 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -50,7 +50,7 @@ config RESET_HSDK
config RESET_IMX7
bool "i.MX7 Reset Driver" if COMPILE_TEST
depends on HAS_IOMEM
- default SOC_IMX7D
+ default SOC_IMX7D || SOC_IMX8MQ
select MFD_SYSCON
help
This enables the reset controller driver for i.MX7 SoCs.
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index cfbb6346a72e..34ce7448b299 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -22,6 +22,7 @@
#include <linux/reset-controller.h>
#include <linux/regmap.h>
#include <dt-bindings/reset/imx7-reset.h>
+#include <dt-bindings/reset/imx8mq-reset.h>
struct imx7_src_signal {
unsigned int offset, bit;
@@ -113,6 +114,110 @@ static const struct imx7_src_variant variant_imx7 = {
.prepare = imx7_src_prepare,
};
+enum imx8mq_src_registers {
+ SRC_A53RCR0 = 0x0004,
+ SRC_HDMI_RCR = 0x0030,
+ SRC_DISP_RCR = 0x0034,
+ SRC_GPU_RCR = 0x0040,
+ SRC_VPU_RCR = 0x0044,
+ SRC_PCIE2_RCR = 0x0048,
+ SRC_MIPIPHY1_RCR = 0x004c,
+ SRC_MIPIPHY2_RCR = 0x0050,
+ SRC_DDRC2_RCR = 0x1004,
+};
+
+static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
+ [IMX8MQ_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET2] = { SRC_A53RCR0, BIT(2) },
+ [IMX8MQ_RESET_A53_CORE_POR_RESET3] = { SRC_A53RCR0, BIT(3) },
+ [IMX8MQ_RESET_A53_CORE_RESET0] = { SRC_A53RCR0, BIT(4) },
+ [IMX8MQ_RESET_A53_CORE_RESET1] = { SRC_A53RCR0, BIT(5) },
+ [IMX8MQ_RESET_A53_CORE_RESET2] = { SRC_A53RCR0, BIT(6) },
+ [IMX8MQ_RESET_A53_CORE_RESET3] = { SRC_A53RCR0, BIT(7) },
+ [IMX8MQ_RESET_A53_DBG_RESET0] = { SRC_A53RCR0, BIT(8) },
+ [IMX8MQ_RESET_A53_DBG_RESET1] = { SRC_A53RCR0, BIT(9) },
+ [IMX8MQ_RESET_A53_DBG_RESET2] = { SRC_A53RCR0, BIT(10) },
+ [IMX8MQ_RESET_A53_DBG_RESET3] = { SRC_A53RCR0, BIT(11) },
+ [IMX8MQ_RESET_A53_ETM_RESET0] = { SRC_A53RCR0, BIT(12) },
+ [IMX8MQ_RESET_A53_ETM_RESET1] = { SRC_A53RCR0, BIT(13) },
+ [IMX8MQ_RESET_A53_ETM_RESET2] = { SRC_A53RCR0, BIT(14) },
+ [IMX8MQ_RESET_A53_ETM_RESET3] = { SRC_A53RCR0, BIT(15) },
+ [IMX8MQ_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) },
+ [IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
+ [IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
+ [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
+ [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
+ [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
+ [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
+ [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) },
+ [IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) },
+ [IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) },
+ [IMX8MQ_RESET_DISP_RESET] = { SRC_DISP_RCR, BIT(0) },
+ [IMX8MQ_RESET_GPU_RESET] = { SRC_GPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_VPU_RESET] = { SRC_VPU_RCR, BIT(0) },
+ [IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR,
+ BIT(2) | BIT(1) },
+ [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) },
+ [IMX8MQ_RESET_PCIE2_CTRL_APPS_EN] = { SRC_PCIE2_RCR, BIT(6) },
+ [IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF] = { SRC_PCIE2_RCR, BIT(11) },
+ [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) },
+ [IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET] = { SRC_MIPIPHY1_RCR, BIT(1) },
+ [IMX8MQ_RESET_MIPI_CSI1_ESC_RESET] = { SRC_MIPIPHY1_RCR, BIT(2) },
+ [IMX8MQ_RESET_MIPI_CSI2_CORE_RESET] = { SRC_MIPIPHY2_RCR, BIT(0) },
+ [IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET] = { SRC_MIPIPHY2_RCR, BIT(1) },
+ [IMX8MQ_RESET_MIPI_CSI2_ESC_RESET] = { SRC_MIPIPHY2_RCR, BIT(2) },
+ [IMX8MQ_RESET_DDRC1_PRST] = { SRC_DDRC_RCR, BIT(0) },
+ [IMX8MQ_RESET_DDRC1_CORE_RESET] = { SRC_DDRC_RCR, BIT(1) },
+ [IMX8MQ_RESET_DDRC1_PHY_RESET] = { SRC_DDRC_RCR, BIT(2) },
+ [IMX8MQ_RESET_DDRC2_PHY_RESET] = { SRC_DDRC2_RCR, BIT(0) },
+ [IMX8MQ_RESET_DDRC2_CORE_RESET] = { SRC_DDRC2_RCR, BIT(1) },
+ [IMX8MQ_RESET_DDRC2_PRST] = { SRC_DDRC2_RCR, BIT(2) },
+};
+
+static unsigned int
+imx8mq_src_prepare(struct imx7_src *imx7src, unsigned long id, bool assert)
+{
+ const unsigned int bit = imx7src->variant->signals[id].bit;
+ unsigned int value = assert ? bit : 0;
+
+ switch (id) {
+ case IMX8MQ_RESET_PCIEPHY:
+ case IMX8MQ_RESET_PCIEPHY2: /* fallthrough */
+ /*
+ * wait for more than 10us to release phy g_rst and
+ * btnrst
+ */
+ if (!assert)
+ udelay(10);
+ break;
+
+ case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
+ case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
+ case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
+ value = assert ? 0 : bit;
+ break;
+ }
+
+ return value;
+}
+
+static const struct imx7_src_variant variant_imx8mq = {
+ .signals = imx8mq_src_signals,
+ .signals_num = ARRAY_SIZE(imx8mq_src_signals),
+ .prepare = imx8mq_src_prepare,
+};
+
static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev)
{
return container_of(rcdev, struct imx7_src, rcdev);
@@ -175,6 +280,7 @@ static int imx7_reset_probe(struct platform_device *pdev)
static const struct of_device_id imx7_reset_dt_ids[] = {
{ .compatible = "fsl,imx7d-src", .data = &variant_imx7 },
+ { .compatible = "fsl,imx8mq-src", .data = &variant_imx8mq },
{ /* sentinel */ },
};
diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h
new file mode 100644
index 000000000000..57c592498aa0
--- /dev/null
+++ b/include/dt-bindings/reset/imx8mq-reset.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Zodiac Inflight Innovations
+ *
+ * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
+ */
+
+#ifndef DT_BINDING_RESET_IMX8MQ_H
+#define DT_BINDING_RESET_IMX8MQ_H
+
+#define IMX8MQ_RESET_A53_CORE_POR_RESET0 0
+#define IMX8MQ_RESET_A53_CORE_POR_RESET1 1
+#define IMX8MQ_RESET_A53_CORE_POR_RESET2 2
+#define IMX8MQ_RESET_A53_CORE_POR_RESET3 3
+#define IMX8MQ_RESET_A53_CORE_RESET0 4
+#define IMX8MQ_RESET_A53_CORE_RESET1 5
+#define IMX8MQ_RESET_A53_CORE_RESET2 6
+#define IMX8MQ_RESET_A53_CORE_RESET3 7
+#define IMX8MQ_RESET_A53_DBG_RESET0 8
+#define IMX8MQ_RESET_A53_DBG_RESET1 9
+#define IMX8MQ_RESET_A53_DBG_RESET2 10
+#define IMX8MQ_RESET_A53_DBG_RESET3 11
+#define IMX8MQ_RESET_A53_ETM_RESET0 12
+#define IMX8MQ_RESET_A53_ETM_RESET1 13
+#define IMX8MQ_RESET_A53_ETM_RESET2 14
+#define IMX8MQ_RESET_A53_ETM_RESET3 15
+#define IMX8MQ_RESET_A53_SOC_DBG_RESET 16
+#define IMX8MQ_RESET_A53_L2RESET 17
+#define IMX8MQ_RESET_SW_NON_SCLR_M4C_RST 18
+#define IMX8MQ_RESET_OTG1_PHY_RESET 19
+#define IMX8MQ_RESET_OTG2_PHY_RESET 20
+#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
+#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
+#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23
+#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24
+#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25
+#define IMX8MQ_RESET_PCIEPHY 26
+#define IMX8MQ_RESET_PCIEPHY_PERST 27
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
+#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29
+#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30
+#define IMX8MQ_RESET_DISP_RESET 31
+#define IMX8MQ_RESET_GPU_RESET 32
+#define IMX8MQ_RESET_VPU_RESET 33
+#define IMX8MQ_RESET_PCIEPHY2 34
+#define IMX8MQ_RESET_PCIEPHY2_PERST 35
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36
+#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37
+#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38
+#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39
+#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40
+#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41
+#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42
+#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43
+#define IMX8MQ_RESET_DDRC1_PRST 44
+#define IMX8MQ_RESET_DDRC1_CORE_RESET 45
+#define IMX8MQ_RESET_DDRC1_PHY_RESET 46
+#define IMX8MQ_RESET_DDRC2_PRST 47
+#define IMX8MQ_RESET_DDRC2_CORE_RESET 48
+#define IMX8MQ_RESET_DDRC2_PHY_RESET 49
+
+#define IMX8MQ_RESET_NUM 50
+
+#endif
--
2.19.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
2018-11-28 4:37 [PATCH v2 0/3] Reset controller support for i.MX8MQ Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant Andrey Smirnov
@ 2018-11-28 4:37 ` Andrey Smirnov
2018-11-29 5:43 ` kbuild test robot
2 siblings, 1 reply; 8+ messages in thread
From: Andrey Smirnov @ 2018-11-28 4:37 UTC (permalink / raw)
To: linux-arm-kernel
The driver now supports i.MX8MQ, so update bindings accordingly.
Cc: p.zabel at pengutronix.de
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: cphealy at gmail.com
Cc: l.stach at pengutronix.de
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree at vger.kernel.org
Cc: linux-imx at nxp.com
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-kernel at vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
Documentation/devicetree/bindings/reset/fsl,imx7-src.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
index 1ab1d109318e..2ecf33815d18 100644
--- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
+++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.txt
@@ -5,7 +5,9 @@ Please also refer to reset.txt in this directory for common reset
controller binding usage.
Required properties:
-- compatible: Should be "fsl,imx7d-src", "syscon"
+- compatible:
+ - For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
+ - For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
- reg: should be register base and length as documented in the
datasheet
- interrupts: Should contain SRC interrupt
@@ -44,4 +46,5 @@ Example:
For list of all valid reset indicies see
-<dt-bindings/reset/imx7-reset.h>
+<dt-bindings/reset/imx7-reset.h> for i.MX7 and
+<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ
--
2.19.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants
2018-11-28 4:37 ` [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
@ 2018-11-28 8:07 ` kbuild test robot
0 siblings, 0 replies; 8+ messages in thread
From: kbuild test robot @ 2018-11-28 8:07 UTC (permalink / raw)
To: linux-arm-kernel
Hi Andrey,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pza/reset/next]
[also build test WARNING on v4.20-rc4 next-20181127]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Andrey-Smirnov/Reset-controller-support-for-i-MX8MQ/20181128-143936
base: git://git.pengutronix.de/git/pza/linux reset/next
config: xtensa-allyesconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 8.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=xtensa
All warnings (new ones prefixed by >>):
drivers//reset/reset-imx7.c: In function 'imx7_reset_probe':
>> drivers//reset/reset-imx7.c:160:19: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
imx7src->variant = of_device_get_match_data(dev);
^
vim +/const +160 drivers//reset/reset-imx7.c
149
150 static int imx7_reset_probe(struct platform_device *pdev)
151 {
152 struct imx7_src *imx7src;
153 struct device *dev = &pdev->dev;
154 struct regmap_config config = { .name = "src" };
155
156 imx7src = devm_kzalloc(dev, sizeof(*imx7src), GFP_KERNEL);
157 if (!imx7src)
158 return -ENOMEM;
159
> 160 imx7src->variant = of_device_get_match_data(dev);
161 imx7src->regmap = syscon_node_to_regmap(dev->of_node);
162 if (IS_ERR(imx7src->regmap)) {
163 dev_err(dev, "Unable to get imx7-src regmap");
164 return PTR_ERR(imx7src->regmap);
165 }
166 regmap_attach_dev(dev, imx7src->regmap, &config);
167
168 imx7src->rcdev.owner = THIS_MODULE;
169 imx7src->rcdev.nr_resets = imx7src->variant->signals_num;
170 imx7src->rcdev.ops = &imx7_reset_ops;
171 imx7src->rcdev.of_node = dev->of_node;
172
173 return devm_reset_controller_register(dev, &imx7src->rcdev);
174 }
175
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs
2018-11-28 4:37 ` [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Andrey Smirnov
@ 2018-11-29 5:43 ` kbuild test robot
0 siblings, 0 replies; 8+ messages in thread
From: kbuild test robot @ 2018-11-29 5:43 UTC (permalink / raw)
To: linux-arm-kernel
Hi Andrey,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pza/reset/next]
[also build test WARNING on v4.20-rc4 next-20181128]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Andrey-Smirnov/Reset-controller-support-for-i-MX8MQ/20181128-143936
base: git://git.pengutronix.de/git/pza/linux reset/next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
>> drivers/reset/reset-imx7.c:265:26: warning: incorrect type in assignment (different modifiers)
drivers/reset/reset-imx7.c:265:26: expected struct imx7_src_variant *variant
drivers/reset/reset-imx7.c:265:26: got void const *
drivers/reset/reset-imx7.c: In function 'imx7_reset_probe':
drivers/reset/reset-imx7.c:265:19: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
imx7src->variant = of_device_get_match_data(dev);
^
vim +265 drivers/reset/reset-imx7.c
abf97755 Andrey Smirnov 2017-02-21 254
abf97755 Andrey Smirnov 2017-02-21 255 static int imx7_reset_probe(struct platform_device *pdev)
abf97755 Andrey Smirnov 2017-02-21 256 {
abf97755 Andrey Smirnov 2017-02-21 257 struct imx7_src *imx7src;
abf97755 Andrey Smirnov 2017-02-21 258 struct device *dev = &pdev->dev;
abf97755 Andrey Smirnov 2017-02-21 259 struct regmap_config config = { .name = "src" };
abf97755 Andrey Smirnov 2017-02-21 260
abf97755 Andrey Smirnov 2017-02-21 261 imx7src = devm_kzalloc(dev, sizeof(*imx7src), GFP_KERNEL);
abf97755 Andrey Smirnov 2017-02-21 262 if (!imx7src)
abf97755 Andrey Smirnov 2017-02-21 263 return -ENOMEM;
abf97755 Andrey Smirnov 2017-02-21 264
1c775d7a Andrey Smirnov 2018-11-27 @265 imx7src->variant = of_device_get_match_data(dev);
abf97755 Andrey Smirnov 2017-02-21 266 imx7src->regmap = syscon_node_to_regmap(dev->of_node);
abf97755 Andrey Smirnov 2017-02-21 267 if (IS_ERR(imx7src->regmap)) {
abf97755 Andrey Smirnov 2017-02-21 268 dev_err(dev, "Unable to get imx7-src regmap");
abf97755 Andrey Smirnov 2017-02-21 269 return PTR_ERR(imx7src->regmap);
abf97755 Andrey Smirnov 2017-02-21 270 }
abf97755 Andrey Smirnov 2017-02-21 271 regmap_attach_dev(dev, imx7src->regmap, &config);
abf97755 Andrey Smirnov 2017-02-21 272
abf97755 Andrey Smirnov 2017-02-21 273 imx7src->rcdev.owner = THIS_MODULE;
1c775d7a Andrey Smirnov 2018-11-27 274 imx7src->rcdev.nr_resets = imx7src->variant->signals_num;
abf97755 Andrey Smirnov 2017-02-21 275 imx7src->rcdev.ops = &imx7_reset_ops;
abf97755 Andrey Smirnov 2017-02-21 276 imx7src->rcdev.of_node = dev->of_node;
abf97755 Andrey Smirnov 2017-02-21 277
abf97755 Andrey Smirnov 2017-02-21 278 return devm_reset_controller_register(dev, &imx7src->rcdev);
abf97755 Andrey Smirnov 2017-02-21 279 }
abf97755 Andrey Smirnov 2017-02-21 280
:::::: The code at line 265 was first introduced by commit
:::::: 1c775d7a1dd30912f65ebba68a638eb4c604b7f2 reset: imx7: Add plubming to support multiple IP variants
:::::: TO: Andrey Smirnov <andrew.smirnov@gmail.com>
:::::: CC: 0day robot <lkp@intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant
2018-11-28 4:37 ` [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant Andrey Smirnov
@ 2018-12-11 22:43 ` Rob Herring
2018-12-12 1:35 ` Andrey Smirnov
0 siblings, 1 reply; 8+ messages in thread
From: Rob Herring @ 2018-12-11 22:43 UTC (permalink / raw)
To: Andrey Smirnov
Cc: A.s. Dong, devicetree, Richard Zhu, linux-arm-kernel,
linux-kernel, linux-imx, p.zabel, Fabio Estevam, Leonard Crestez,
cphealy, l.stach
On Tue, Nov 27, 2018 at 08:37:37PM -0800, Andrey Smirnov wrote:
> Add bits and pieces needed to support IP block variant found on
> i.MX8MQ SoCs.
>
> Cc: p.zabel@pengutronix.de
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: cphealy@gmail.com
> Cc: l.stach@pengutronix.de
> Cc: Leonard Crestez <leonard.crestez@nxp.com>
> Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> ---
> drivers/reset/Kconfig | 2 +-
> drivers/reset/reset-imx7.c | 106 +++++++++++++++++++++++
> include/dt-bindings/reset/imx8mq-reset.h | 64 ++++++++++++++
This goes in the binding patch.
> 3 files changed, 171 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/reset/imx8mq-reset.h
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant
2018-12-11 22:43 ` Rob Herring
@ 2018-12-12 1:35 ` Andrey Smirnov
0 siblings, 0 replies; 8+ messages in thread
From: Andrey Smirnov @ 2018-12-12 1:35 UTC (permalink / raw)
To: Rob Herring
Cc: Dong Aisheng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Richard Zhu, linux-arm-kernel, linux-kernel, linux-imx,
Philipp Zabel, Fabio Estevam, Leonard Crestez, Chris Healy,
Lucas Stach
On Tue, Dec 11, 2018 at 2:43 PM Rob Herring <robh@kernel.org> wrote:
>
> On Tue, Nov 27, 2018 at 08:37:37PM -0800, Andrey Smirnov wrote:
> > Add bits and pieces needed to support IP block variant found on
> > i.MX8MQ SoCs.
> >
> > Cc: p.zabel@pengutronix.de
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: cphealy@gmail.com
> > Cc: l.stach@pengutronix.de
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> > Cc: Rob Herring <robh@kernel.org>
> > Cc: devicetree@vger.kernel.org
> > Cc: linux-imx@nxp.com
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: linux-kernel@vger.kernel.org
> > Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
> > ---
> > drivers/reset/Kconfig | 2 +-
> > drivers/reset/reset-imx7.c | 106 +++++++++++++++++++++++
> > include/dt-bindings/reset/imx8mq-reset.h | 64 ++++++++++++++
>
> This goes in the binding patch.
OK, I was following the precedent of the original submission:
https://lore.kernel.org/linux-arm-kernel/20170227205408.ajeu3stjpl45dnqf@rob-hp-laptop/
Will split and submit v3.
Thanks,
Andrey Smirnov
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-12-12 1:35 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-28 4:37 [PATCH v2 0/3] Reset controller support for i.MX8MQ Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 1/3] reset: imx7: Add plubming to support multiple IP variants Andrey Smirnov
2018-11-28 8:07 ` kbuild test robot
2018-11-28 4:37 ` [PATCH v2 2/3] reset: imx7: Add support for i.MX8MQ IP block variant Andrey Smirnov
2018-12-11 22:43 ` Rob Herring
2018-12-12 1:35 ` Andrey Smirnov
2018-11-28 4:37 ` [PATCH v2 3/3] dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs Andrey Smirnov
2018-11-29 5:43 ` kbuild test robot
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