* [PATCH v2] arm64: dts: imx8mq: Add ECSPI support
@ 2019-01-28 12:08 Fabio Estevam
2019-01-28 18:53 ` Lucas Stach
2019-02-11 1:43 ` Shawn Guo
0 siblings, 2 replies; 3+ messages in thread
From: Fabio Estevam @ 2019-01-28 12:08 UTC (permalink / raw)
To: shawnguo
Cc: andrew.smirnov, linux-imx, kernel, Fabio Estevam,
linux-arm-kernel, l.stach
Add support for the three ECSPI ports present on i.MX8MQ.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Make reg a single address (Lucas)
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 39 +++++++++++++++++++++++
1 file changed, 39 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 892063a7c26c..14949eec2d80 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -26,6 +26,9 @@
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
+ spi0 = &ecspi1;
+ spi1 = &ecspi2;
+ spi2 = &ecspi3;
};
ckil: clock-ckil {
@@ -381,6 +384,42 @@
#size-cells = <1>;
ranges = <0x30800000 0x30800000 0x400000>;
+ ecspi1: spi@30820000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30820000 0x10000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ ecspi2: spi@30830000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30830000 0x10000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ ecspi3: spi@30840000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
+ reg = <0x30840000 0x10000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
+ <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
uart1: serial@30860000 {
compatible = "fsl,imx8mq-uart",
"fsl,imx6q-uart";
--
2.17.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mq: Add ECSPI support
2019-01-28 12:08 [PATCH v2] arm64: dts: imx8mq: Add ECSPI support Fabio Estevam
@ 2019-01-28 18:53 ` Lucas Stach
2019-02-11 1:43 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Lucas Stach @ 2019-01-28 18:53 UTC (permalink / raw)
To: Fabio Estevam, shawnguo
Cc: linux-arm-kernel, andrew.smirnov, linux-imx, kernel
Am Montag, den 28.01.2019, 10:08 -0200 schrieb Fabio Estevam:
> Add support for the three ECSPI ports present on i.MX8MQ.
>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> Changes since v1:
> - Make reg a single address (Lucas)
>
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 39 +++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 892063a7c26c..14949eec2d80 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -26,6 +26,9 @@
> serial1 = &uart2;
> serial2 = &uart3;
> serial3 = &uart4;
> + spi0 = &ecspi1;
> + spi1 = &ecspi2;
> + spi2 = &ecspi3;
> };
>
> ckil: clock-ckil {
> @@ -381,6 +384,42 @@
> #size-cells = <1>;
> ranges = <0x30800000 0x30800000 0x400000>;
>
> + ecspi1: spi@30820000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
> + reg = <0x30820000 0x10000>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,
> + <&clk IMX8MQ_CLK_ECSPI1_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> +
> + ecspi2: spi@30830000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
> + reg = <0x30830000 0x10000>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,
> + <&clk IMX8MQ_CLK_ECSPI2_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> +
> + ecspi3: spi@30840000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";
> + reg = <0x30840000 0x10000>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,
> + <&clk IMX8MQ_CLK_ECSPI3_ROOT>;
> + clock-names = "ipg", "per";
> + status = "disabled";
> + };
> +
> uart1: serial@30860000 {
> compatible = "fsl,imx8mq-uart",
> "fsl,imx6q-uart";
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] arm64: dts: imx8mq: Add ECSPI support
2019-01-28 12:08 [PATCH v2] arm64: dts: imx8mq: Add ECSPI support Fabio Estevam
2019-01-28 18:53 ` Lucas Stach
@ 2019-02-11 1:43 ` Shawn Guo
1 sibling, 0 replies; 3+ messages in thread
From: Shawn Guo @ 2019-02-11 1:43 UTC (permalink / raw)
To: Fabio Estevam
Cc: linux-arm-kernel, andrew.smirnov, linux-imx, kernel, l.stach
On Mon, Jan 28, 2019 at 10:08:13AM -0200, Fabio Estevam wrote:
> Add support for the three ECSPI ports present on i.MX8MQ.
>
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
Applied, thanks.
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-01-28 12:08 [PATCH v2] arm64: dts: imx8mq: Add ECSPI support Fabio Estevam
2019-01-28 18:53 ` Lucas Stach
2019-02-11 1:43 ` Shawn Guo
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