From: Joseph Lo <josephl@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org, Rob Herring <robh@kernel.org>,
linux-kernel@vger.kernel.org, Joseph Lo <josephl@nvidia.com>,
linux-tegra@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH V7 1/8] dt-bindings: timer: add Tegra210 timer
Date: Thu, 21 Feb 2019 15:21:43 +0800 [thread overview]
Message-ID: <20190221072150.4395-2-josephl@nvidia.com> (raw)
In-Reply-To: <20190221072150.4395-1-josephl@nvidia.com>
The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit
timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived
from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock
(TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic,
or watchdog interrupts.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
---
v7:
* no change
v6:
* add ack tag from Jon.
v5:
* no change
v4:
* no change
v3:
* no change
v2:
* list all the interrupts that are supported by tegra210 timers block
* add RB tag from Rob.
---
.../bindings/timer/nvidia,tegra210-timer.txt | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt
diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt
new file mode 100644
index 000000000000..032cda96fe0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt
@@ -0,0 +1,36 @@
+NVIDIA Tegra210 timer
+
+The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit
+timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived
+from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock
+(TMR10-TMR13). Each TMR can be programmed to generate one-shot, periodic,
+or watchdog interrupts.
+
+Required properties:
+- compatible : "nvidia,tegra210-timer".
+- reg : Specifies base physical address and size of the registers.
+- interrupts : A list of 14 interrupts; one per each timer channels 0 through
+ 13.
+- clocks : Must contain one entry, for the module clock.
+ See ../clocks/clock-bindings.txt for details.
+
+timer@60005000 {
+ compatible = "nvidia,tegra210-timer";
+ reg = <0x0 0x60005000 0x0 0x400>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA210_CLK_TIMER>;
+ clock-names = "timer";
+};
--
2.20.1
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next prev parent reply other threads:[~2019-02-21 7:22 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-21 7:21 [PATCH V7 0/8] Add CPUidle support for Tegra210 Joseph Lo
2019-02-21 7:21 ` Joseph Lo [this message]
2019-02-21 7:21 ` [PATCH V7 2/8] clocksource: tegra: add Tegra210 timer support Joseph Lo
2019-02-22 8:43 ` Daniel Lezcano
2019-02-22 9:06 ` Joseph Lo
2019-02-22 9:16 ` Daniel Lezcano
2019-02-21 7:21 ` [PATCH V7 3/8] soc/tegra: default select TEGRA_TIMER for Tegra210 Joseph Lo
2019-02-21 7:21 ` [PATCH V7 4/8] arm64: tegra: fix timer node " Joseph Lo
2019-02-21 7:21 ` [PATCH V7 5/8] arm64: tegra: add CPU idle states properties " Joseph Lo
2019-02-22 8:44 ` Daniel Lezcano
2019-02-21 7:21 ` [PATCH V7 6/8] arm64: tegra: Enable CPU idle support for Jetson TX1 Joseph Lo
2019-02-21 7:21 ` [PATCH V7 7/8] arm64: tegra: Enable CPU idle support for Smaug Joseph Lo
2019-02-21 7:21 ` [PATCH V7 8/8] arm64: tegra: Enable CPU idle support for Shield Joseph Lo
2019-03-28 16:05 ` [PATCH V7 0/8] Add CPUidle support for Tegra210 Thierry Reding
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