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From: Catalin Marinas <catalin.marinas@arm.com>
To: Mark Salyzyn <salyzyn@android.com>
Cc: Will Deacon <will.deacon@arm.com>,
	kernel-team@android.com, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arch64: export __flush_dcache_area
Date: Fri, 17 May 2019 22:53:04 +0100
Message-ID: <20190517215303.3daebi7o66we2cjh@mbp> (raw)
In-Reply-To: <20190517200012.136519-1-salyzyn@android.com>

On Fri, May 17, 2019 at 12:59:56PM -0700, Mark Salyzyn wrote:
> Some (out of tree modular) drivers feel a need to ensure
> data is flushed to the DDR before continuing flow.
> 
> Signed-off-by: Mark Salyzyn <salyzyn@android.com>
> Cc: linux-kernel@vger.kernel.org
> Cc: kernel-team@android.com
> ---
>  arch/arm64/mm/cache.S | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
> index a194fd0e837f..70d7cb5c0bd2 100644
> --- a/arch/arm64/mm/cache.S
> +++ b/arch/arm64/mm/cache.S
> @@ -120,6 +120,7 @@ ENTRY(__flush_dcache_area)
>  	dcache_by_line_op civac, sy, x0, x1, x2, x3
>  	ret
>  ENDPIPROC(__flush_dcache_area)
> +EXPORT_SYMBOL_GPL(__flush_dcache_area)
>  
>  /*
>   *	__clean_dcache_area_pou(kaddr, size)

NAK. Such drivers are doing something wrong, there is a dedicated
in-kernel API for that handles kernel maintenance (hint: DMA).

-- 
Catalin

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Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-17 19:59 Mark Salyzyn
2019-05-17 21:53 ` Catalin Marinas [this message]
2019-05-20 14:29   ` Mark Salyzyn

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