From: Will Deacon <will.deacon@arm.com>
To: Zhi Li <lznuaa@gmail.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
Aisheng Dong <aisheng.dong@nxp.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"andrew.smirnov@gmail.com" <andrew.smirnov@gmail.com>,
"festevam@gmail.com" <festevam@gmail.com>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
Frank Li <frank.li@nxp.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
dl-linux-imx <linux-imx@nxp.com>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH V12 2/4] drivers/perf: imx_ddr: Add ddr performance counter support
Date: Thu, 13 Jun 2019 18:44:36 +0100 [thread overview]
Message-ID: <20190613174436.GG18966@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <CAHrpEqRZ0YL9SFk6o7iebJ+diJVMTtyba_9GtujL7H7e4G8qQA@mail.gmail.com>
On Thu, Jun 13, 2019 at 12:04:37PM -0500, Zhi Li wrote:
> On Thu, Jun 13, 2019 at 6:23 AM Will Deacon <will.deacon@arm.com> wrote:
> >
> > On Wed, May 01, 2019 at 06:43:29PM +0000, Frank Li wrote:
> > > Add ddr performance monitor support for iMX8QXP
> > >
> > > There are 4 counters for ddr perfomance events.
> > > counter 0 is dedicated for cycles.
> > > you choose any up to 3 no cycles events.
> > >
> > > for example:
> > >
> > > perf stat -a -e imx8_ddr0/read-cycles/,imx8_ddr0/write-cycles/,imx8_ddr0/precharge/ ls
> > > perf stat -a -e imx8_ddr0/cycles/,imx8_ddr0/read-access/,imx8_ddr0/write-access/ ls
> >
> > I've pushed patches 1, 2 and 4 out with some minor tweaks to:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-next/perf
> >
> > I'll leave the actual .dts change to go via the soc tree, since last time
> > I took one of those it just resulted in conflicts.
> >
> > Frank, Andrey: Please could you try to run the perf fuzzer on this before
> > it lands in mainline? It has a good track record of finding nasty PMU driver
> > bugs, but it obviously requires access to hardware which implements the PMU:
> >
> > http://web.eece.maine.edu/~vweaver/projects/perf_events/fuzzer/
>
> Okay, how long should be run generally?
> I need make sure it can pass without my patches at our platform.
As you long as you can really, but if it survives a few hours that's usually
a good sign. Overnight is even better.
Will
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next prev parent reply other threads:[~2019-06-13 17:44 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-01 18:43 [PATCH V12 1/4] dt-bindings: perf: imx8-ddr: add imx8qxp ddr performance monitor Frank Li
2019-05-01 18:43 ` [PATCH V12 2/4] drivers/perf: imx_ddr: Add ddr performance counter support Frank Li
2019-05-07 19:30 ` Andrey Smirnov
2019-05-14 13:53 ` Zhi Li
2019-05-14 14:55 ` Will Deacon
2019-06-13 11:23 ` Will Deacon
2019-06-13 17:04 ` Zhi Li
2019-06-13 17:44 ` Will Deacon [this message]
2019-06-13 19:13 ` Zhi Li
2019-06-14 10:23 ` Will Deacon
2019-06-18 17:24 ` Zhi Li
2019-06-18 17:58 ` Will Deacon
2019-05-01 18:43 ` [PATCH V12 3/4] arm64: dts: imx8qxp: added ddr performance monitor nodes Frank Li
2019-06-18 6:37 ` Shawn Guo
2019-05-01 18:43 ` [PATCH V12 4/4] MAINTAINERS: Added imx DDR performonitor driver maintainer information Frank Li
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