* [PATCH 1/2] arm64: Expose ARMv8.5 CondM capability to userspace
@ 2019-06-17 11:26 Mark Brown
2019-06-17 11:26 ` [PATCH 2/2] arm64: Expose FRINT " Mark Brown
2019-06-18 16:51 ` [PATCH 1/2] arm64: Expose ARMv8.5 CondM " Will Deacon
0 siblings, 2 replies; 4+ messages in thread
From: Mark Brown @ 2019-06-17 11:26 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Brown, linux-arm-kernel
ARMv8.5 adds new instructions XAFLAG and AXFLAG to translate the
representation of the results of floating point comparisons between the
native ARM format and an alternative format used by some software. Add
a hwcap allowing userspace to determine if they are present.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
Documentation/arm64/elf_hwcaps.txt | 4 ++++
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 1 +
arch/arm64/kernel/cpuinfo.c | 1 +
5 files changed, 8 insertions(+)
diff --git a/Documentation/arm64/elf_hwcaps.txt b/Documentation/arm64/elf_hwcaps.txt
index b73a2519ecf2..08e8e380a826 100644
--- a/Documentation/arm64/elf_hwcaps.txt
+++ b/Documentation/arm64/elf_hwcaps.txt
@@ -207,6 +207,10 @@ HWCAP_FLAGM
Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.
+HWCAP_CONDM85
+
+ Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
+
HWCAP_SSBS
Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index b4bfb6672168..141fb635aecd 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -95,6 +95,7 @@
#define KERNEL_HWCAP_SVEBITPERM __khwcap2_feature(SVEBITPERM)
#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
+#define KERNEL_HWCAP_CONDM85 __khwcap2_feature(CONDM85)
/*
* This yields a mask that user programs can use to figure out what
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index 1a772b162191..ff5bc70b2c37 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -63,5 +63,6 @@
#define HWCAP2_SVEBITPERM (1 << 4)
#define HWCAP2_SVESHA3 (1 << 5)
#define HWCAP2_SVESM4 (1 << 6)
+#define HWCAP2_CONDM85 (1 << 7)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 354b3745c319..294929476508 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1629,6 +1629,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_DP_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ASIMDDP),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_FHM_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ASIMDFHM),
HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_TS_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FLAGM),
+ HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_TS_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_CONDM85),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, KERNEL_HWCAP_FP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_FP_SHIFT, FTR_SIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FPHP),
HWCAP_CAP(SYS_ID_AA64PFR0_EL1, ID_AA64PFR0_ASIMD_SHIFT, FTR_SIGNED, 0, CAP_HWCAP, KERNEL_HWCAP_ASIMD),
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index f6f7936be6e7..a16ce26ddc39 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -92,6 +92,7 @@ static const char *const hwcap_str[] = {
"svebitperm",
"svesha3",
"svesm4",
+ "condm85",
NULL
};
--
2.20.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] arm64: Expose FRINT capability to userspace
2019-06-17 11:26 [PATCH 1/2] arm64: Expose ARMv8.5 CondM capability to userspace Mark Brown
@ 2019-06-17 11:26 ` Mark Brown
2019-06-18 16:51 ` Will Deacon
2019-06-18 16:51 ` [PATCH 1/2] arm64: Expose ARMv8.5 CondM " Will Deacon
1 sibling, 1 reply; 4+ messages in thread
From: Mark Brown @ 2019-06-17 11:26 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon; +Cc: Mark Brown, linux-arm-kernel
ARMv8.5 introduces the FRINT series of instructions for rounding floating
point numbers to integers. Provide a capability to userspace in order to
allow applications to determine if the system supports these instructions.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
Documentation/arm64/elf_hwcaps.txt | 4 ++++
arch/arm64/include/asm/hwcap.h | 1 +
arch/arm64/include/asm/sysreg.h | 1 +
arch/arm64/include/uapi/asm/hwcap.h | 1 +
arch/arm64/kernel/cpufeature.c | 1 +
arch/arm64/kernel/cpuinfo.c | 1 +
6 files changed, 9 insertions(+)
diff --git a/Documentation/arm64/elf_hwcaps.txt b/Documentation/arm64/elf_hwcaps.txt
index 08e8e380a826..783e2997a0c0 100644
--- a/Documentation/arm64/elf_hwcaps.txt
+++ b/Documentation/arm64/elf_hwcaps.txt
@@ -227,6 +227,10 @@ HWCAP_PACG
ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
Documentation/arm64/pointer-authentication.txt.
+HWCAP_FRINT
+
+ Functionality implied by ID_AA64ISAR1_EL1.FRINTTTS == 0b0001.
+
4. Unused AT_HWCAP bits
-----------------------
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 141fb635aecd..7752c26545df 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -96,6 +96,7 @@
#define KERNEL_HWCAP_SVESHA3 __khwcap2_feature(SVESHA3)
#define KERNEL_HWCAP_SVESM4 __khwcap2_feature(SVESM4)
#define KERNEL_HWCAP_CONDM85 __khwcap2_feature(CONDM85)
+#define KERNEL_HWCAP_FRINT __khwcap2_feature(FRINT)
/*
* This yields a mask that user programs can use to figure out what
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 902d75b60914..601972771807 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -560,6 +560,7 @@
/* id_aa64isar1 */
#define ID_AA64ISAR1_SB_SHIFT 36
+#define ID_AA64ISAR1_FRINTTS_SHIFT 32
#define ID_AA64ISAR1_GPI_SHIFT 28
#define ID_AA64ISAR1_GPA_SHIFT 24
#define ID_AA64ISAR1_LRCPC_SHIFT 20
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index ff5bc70b2c37..d84e1e0cd125 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -64,5 +64,6 @@
#define HWCAP2_SVESHA3 (1 << 5)
#define HWCAP2_SVESM4 (1 << 6)
#define HWCAP2_CONDM85 (1 << 7)
+#define HWCAP2_FRINT (1 << 8)
#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 294929476508..f1de87040a80 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1641,6 +1641,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FCMA_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FCMA),
HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_LRCPC),
HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),
+ HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FRINTTS_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FRINT),
HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_SB_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SB),
HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_AT_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),
#ifdef CONFIG_ARM64_SVE
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index a16ce26ddc39..c60fdac0f613 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -93,6 +93,7 @@ static const char *const hwcap_str[] = {
"svesha3",
"svesm4",
"condm85",
+ "frint",
NULL
};
--
2.20.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] arm64: Expose FRINT capability to userspace
2019-06-17 11:26 ` [PATCH 2/2] arm64: Expose FRINT " Mark Brown
@ 2019-06-18 16:51 ` Will Deacon
0 siblings, 0 replies; 4+ messages in thread
From: Will Deacon @ 2019-06-18 16:51 UTC (permalink / raw)
To: Mark Brown; +Cc: Catalin Marinas, linux-arm-kernel
On Mon, Jun 17, 2019 at 12:26:56PM +0100, Mark Brown wrote:
> ARMv8.5 introduces the FRINT series of instructions for rounding floating
> point numbers to integers. Provide a capability to userspace in order to
> allow applications to determine if the system supports these instructions.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> Documentation/arm64/elf_hwcaps.txt | 4 ++++
> arch/arm64/include/asm/hwcap.h | 1 +
> arch/arm64/include/asm/sysreg.h | 1 +
> arch/arm64/include/uapi/asm/hwcap.h | 1 +
> arch/arm64/kernel/cpufeature.c | 1 +
> arch/arm64/kernel/cpuinfo.c | 1 +
> 6 files changed, 9 insertions(+)
>
> diff --git a/Documentation/arm64/elf_hwcaps.txt b/Documentation/arm64/elf_hwcaps.txt
> index 08e8e380a826..783e2997a0c0 100644
> --- a/Documentation/arm64/elf_hwcaps.txt
> +++ b/Documentation/arm64/elf_hwcaps.txt
> @@ -227,6 +227,10 @@ HWCAP_PACG
> ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
> Documentation/arm64/pointer-authentication.txt.
>
> +HWCAP_FRINT
HWCAP2_FRINT
> +
> + Functionality implied by ID_AA64ISAR1_EL1.FRINTTTS == 0b0001.
ID_AA64ISAR1_EL1.FRINTTS
With those:
Acked-by: Will Deacon <will.deacon@arm.com>
Will
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] arm64: Expose ARMv8.5 CondM capability to userspace
2019-06-17 11:26 [PATCH 1/2] arm64: Expose ARMv8.5 CondM capability to userspace Mark Brown
2019-06-17 11:26 ` [PATCH 2/2] arm64: Expose FRINT " Mark Brown
@ 2019-06-18 16:51 ` Will Deacon
1 sibling, 0 replies; 4+ messages in thread
From: Will Deacon @ 2019-06-18 16:51 UTC (permalink / raw)
To: Mark Brown; +Cc: Catalin Marinas, linux-arm-kernel
Hi Mark,
On Mon, Jun 17, 2019 at 12:26:55PM +0100, Mark Brown wrote:
> ARMv8.5 adds new instructions XAFLAG and AXFLAG to translate the
> representation of the results of floating point comparisons between the
> native ARM format and an alternative format used by some software. Add
> a hwcap allowing userspace to determine if they are present.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> Documentation/arm64/elf_hwcaps.txt | 4 ++++
> arch/arm64/include/asm/hwcap.h | 1 +
> arch/arm64/include/uapi/asm/hwcap.h | 1 +
> arch/arm64/kernel/cpufeature.c | 1 +
> arch/arm64/kernel/cpuinfo.c | 1 +
> 5 files changed, 8 insertions(+)
>
> diff --git a/Documentation/arm64/elf_hwcaps.txt b/Documentation/arm64/elf_hwcaps.txt
> index b73a2519ecf2..08e8e380a826 100644
> --- a/Documentation/arm64/elf_hwcaps.txt
> +++ b/Documentation/arm64/elf_hwcaps.txt
> @@ -207,6 +207,10 @@ HWCAP_FLAGM
>
> Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.
>
> +HWCAP_CONDM85
This should be referring to HWCAP2.
Also, to dive in with the naming bikeshed, although CONDM85 does appear
to be aligned with the architecture, we've already got HWCAP_FLAGM for
the case when ID_AA64ISAR0_EL1.TS == 0b0001, so I think we're better off
being consistent with ourselves and just having something like
HWCAP2_FLAGM2 with the string "flagm2".
With that change:
Acked-by: Will Deacon <will.deacon@arm.com>
Thanks,
Will
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-06-17 11:26 [PATCH 1/2] arm64: Expose ARMv8.5 CondM capability to userspace Mark Brown
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2019-06-18 16:51 ` Will Deacon
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