* [arm-platforms:irq/gic-v3.1-ext-ranges 5/9] drivers/irqchip/irq-hip04.c:271:2: error: too few arguments to function 'gic_cpu_config'
@ 2019-07-19 6:02 kbuild test robot
0 siblings, 0 replies; only message in thread
From: kbuild test robot @ 2019-07-19 6:02 UTC (permalink / raw)
To: Marc Zyngier; +Cc: kbuild-all, linux-arm-kernel
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tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/maz/arm-platforms.git irq/gic-v3.1-ext-ranges
head: 58cd02f334048eecbecff50861dd3fc640003098
commit: 1affa712f1248c84ecb7150e23359a1078d54f84 [5/9] irqchip/gic: Prepare for more than 16 PPIs
config: arm-allmodconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 1affa712f1248c84ecb7150e23359a1078d54f84
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
In file included from include/uapi/linux/posix_types.h:5:0,
from include/uapi/linux/types.h:14,
from include/linux/compiler.h:175,
from include/linux/init.h:5,
from drivers/irqchip/irq-hip04.c:25:
drivers/irqchip/irq-hip04.c: In function 'hip04_irq_cpu_init':
include/linux/stddef.h:8:14: warning: passing argument 2 of 'gic_cpu_config' makes integer from pointer without a cast [-Wint-conversion]
#define NULL ((void *)0)
^
drivers/irqchip/irq-hip04.c:271:28: note: in expansion of macro 'NULL'
gic_cpu_config(dist_base, NULL);
^~~~
In file included from drivers/irqchip/irq-hip04.c:48:0:
drivers/irqchip/irq-gic-common.h:25:6: note: expected 'int' but argument is of type 'void *'
void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void));
^~~~~~~~~~~~~~
>> drivers/irqchip/irq-hip04.c:271:2: error: too few arguments to function 'gic_cpu_config'
gic_cpu_config(dist_base, NULL);
^~~~~~~~~~~~~~
In file included from drivers/irqchip/irq-hip04.c:48:0:
drivers/irqchip/irq-gic-common.h:25:6: note: declared here
void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void));
^~~~~~~~~~~~~~
vim +/gic_cpu_config +271 drivers/irqchip/irq-hip04.c
8e4bebe0 Haojian Zhuang 2014-08-07 248
8e4bebe0 Haojian Zhuang 2014-08-07 249 static void hip04_irq_cpu_init(struct hip04_irq_data *intc)
8e4bebe0 Haojian Zhuang 2014-08-07 250 {
8e4bebe0 Haojian Zhuang 2014-08-07 251 void __iomem *dist_base = intc->dist_base;
8e4bebe0 Haojian Zhuang 2014-08-07 252 void __iomem *base = intc->cpu_base;
8e4bebe0 Haojian Zhuang 2014-08-07 253 unsigned int cpu_mask, cpu = smp_processor_id();
8e4bebe0 Haojian Zhuang 2014-08-07 254 int i;
8e4bebe0 Haojian Zhuang 2014-08-07 255
8e4bebe0 Haojian Zhuang 2014-08-07 256 /*
8e4bebe0 Haojian Zhuang 2014-08-07 257 * Get what the GIC says our CPU mask is.
8e4bebe0 Haojian Zhuang 2014-08-07 258 */
8e4bebe0 Haojian Zhuang 2014-08-07 259 BUG_ON(cpu >= NR_HIP04_CPU_IF);
8e4bebe0 Haojian Zhuang 2014-08-07 260 cpu_mask = hip04_get_cpumask(intc);
8e4bebe0 Haojian Zhuang 2014-08-07 261 hip04_cpu_map[cpu] = cpu_mask;
8e4bebe0 Haojian Zhuang 2014-08-07 262
8e4bebe0 Haojian Zhuang 2014-08-07 263 /*
8e4bebe0 Haojian Zhuang 2014-08-07 264 * Clear our mask from the other map entries in case they're
8e4bebe0 Haojian Zhuang 2014-08-07 265 * still undefined.
8e4bebe0 Haojian Zhuang 2014-08-07 266 */
8e4bebe0 Haojian Zhuang 2014-08-07 267 for (i = 0; i < NR_HIP04_CPU_IF; i++)
8e4bebe0 Haojian Zhuang 2014-08-07 268 if (i != cpu)
8e4bebe0 Haojian Zhuang 2014-08-07 269 hip04_cpu_map[i] &= ~cpu_mask;
8e4bebe0 Haojian Zhuang 2014-08-07 270
8e4bebe0 Haojian Zhuang 2014-08-07 @271 gic_cpu_config(dist_base, NULL);
8e4bebe0 Haojian Zhuang 2014-08-07 272
8e4bebe0 Haojian Zhuang 2014-08-07 273 writel_relaxed(0xf0, base + GIC_CPU_PRIMASK);
8e4bebe0 Haojian Zhuang 2014-08-07 274 writel_relaxed(1, base + GIC_CPU_CTRL);
8e4bebe0 Haojian Zhuang 2014-08-07 275 }
8e4bebe0 Haojian Zhuang 2014-08-07 276
:::::: The code at line 271 was first introduced by commit
:::::: 8e4bebe0952af357e099147023af756baa466ede irqchip: hip04: Enable Hisilicon HiP04 interrupt controller
:::::: TO: Haojian Zhuang <haojian.zhuang@linaro.org>
:::::: CC: Jason Cooper <jason@lakedaemon.net>
---
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