From: Ilias Apalodimas <ilias.apalodimas@linaro.org>
To: Jose Abreu <Jose.Abreu@synopsys.com>
Cc: "Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
"alexandre.torgue@st.com" <alexandre.torgue@st.com>,
"maxime.ripard@bootlin.com" <maxime.ripard@bootlin.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"jonathanh@nvidia.com" <jonathanh@nvidia.com>,
"wens@csie.org" <wens@csie.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"peppe.cavallaro@st.com" <peppe.cavallaro@st.com>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
David Miller <davem@davemloft.net>,
"lists@bofh.nu" <lists@bofh.nu>
Subject: Re: [PATCH net-next 3/3] net: stmmac: Introducing support for Page Pool
Date: Wed, 24 Jul 2019 12:53:10 +0300 [thread overview]
Message-ID: <20190724095310.GA12991@apalos> (raw)
In-Reply-To: <BYAPR12MB3269AA9955844E317B62A239D3C60@BYAPR12MB3269.namprd12.prod.outlook.com>
Jose,
> From: Ilias Apalodimas <ilias.apalodimas@linaro.org>
> Date: Jul/24/2019, 09:54:27 (UTC+00:00)
>
> > Hi David,
> >
> > > From: Jon Hunter <jonathanh@nvidia.com>
> > > Date: Tue, 23 Jul 2019 13:09:00 +0100
> > >
> > > > Setting "iommu.passthrough=1" works for me. However, I am not sure where
> > > > to go from here, so any ideas you have would be great.
> > >
> > > Then definitely we are accessing outside of a valid IOMMU mapping due
> > > to the page pool support changes.
> >
> > Yes. On the netsec driver i did test with and without SMMU to make sure i am not
> > breaking anything.
> > Since we map the whole page on the API i think some offset on the driver causes
> > that. In any case i'll have another look on page_pool to make sure we are not
> > missing anything.
>
> Ilias, can it be due to this:
>
> stmmac_main.c:
> pp_params.order = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE);
>
> page_pool.c:
> dma = dma_map_page_attrs(pool->p.dev, page, 0,
> (PAGE_SIZE << pool->p.order),
> pool->p.dma_dir, DMA_ATTR_SKIP_CPU_SYNC);
>
> "order", will be at least 1 and then mapping the page can cause overlap
> ?
well the API is calling the map with the correct page, page offset (0) and size
right? I don't see any overlapping here. Aren't we mapping what we allocate?
Why do you need higher order pages? Jumbo frames? Can we do a quick test with
the order being 0?
Thanks,
/Ilias
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next prev parent reply other threads:[~2019-07-24 9:53 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-03 10:37 [PATCH net-next 0/3] net: stmmac: Some performance improvements and a fix Jose Abreu
2019-07-03 10:37 ` [PATCH net-next 1/3] net: stmmac: Implement RX Coalesce Frames setting Jose Abreu
2019-07-03 20:41 ` Jakub Kicinski
2019-07-03 10:37 ` [PATCH net-next 2/3] net: stmmac: Fix descriptors address being in > 32 bits address space Jose Abreu
2019-07-03 10:37 ` [PATCH net-next 3/3] net: stmmac: Introducing support for Page Pool Jose Abreu
2019-07-03 10:40 ` Jose Abreu
2019-07-04 9:39 ` Jesper Dangaard Brouer
2019-07-04 14:45 ` Jose Abreu
2019-07-04 15:09 ` Jesper Dangaard Brouer
2019-07-04 15:18 ` Jose Abreu
2019-07-04 15:33 ` Jesper Dangaard Brouer
2019-07-04 9:48 ` Jesper Dangaard Brouer
2019-07-04 10:00 ` Jesper Dangaard Brouer
2019-07-04 10:13 ` Jose Abreu
2019-07-04 11:11 ` Ilias Apalodimas
2019-07-04 11:54 ` Jesper Dangaard Brouer
2019-07-04 12:04 ` Ilias Apalodimas
2019-07-04 12:59 ` Jose Abreu
2019-07-04 13:06 ` Ilias Apalodimas
2019-07-04 10:30 ` Ilias Apalodimas
2019-07-04 12:14 ` Arnd Bergmann
2019-07-04 12:49 ` Ilias Apalodimas
2019-07-17 18:58 ` Jon Hunter
2019-07-18 7:29 ` Jose Abreu
2019-07-18 7:48 ` Jose Abreu
2019-07-18 9:16 ` Jon Hunter
2019-07-19 7:51 ` Jose Abreu
2019-07-19 8:37 ` Jon Hunter
2019-07-19 8:44 ` Jose Abreu
2019-07-19 8:49 ` Jon Hunter
2019-07-19 10:25 ` Jose Abreu
2019-07-19 12:28 ` Jose Abreu
2019-07-19 13:33 ` Jon Hunter
2019-07-19 12:30 ` Jon Hunter
2019-07-19 12:32 ` Jose Abreu
[not found] ` <25512348-5b98-aeb7-a6fb-f90376e66a84@nvidia.com>
2019-07-22 7:23 ` Jose Abreu
2019-07-22 9:37 ` Jon Hunter
2019-07-22 9:47 ` Jose Abreu
2019-07-22 9:57 ` Jose Abreu
2019-07-22 10:27 ` Jon Hunter
2019-07-22 10:18 ` Ilias Apalodimas
2019-07-22 11:11 ` Lars Persson
2019-07-22 11:39 ` Jose Abreu
2019-07-22 12:05 ` Jon Hunter
2019-07-22 14:04 ` Jose Abreu
2019-07-23 8:14 ` Jose Abreu
2019-07-23 10:01 ` Jon Hunter
2019-07-23 10:07 ` Jose Abreu
2019-07-23 10:29 ` Robin Murphy
2019-07-23 11:22 ` Jose Abreu
2019-07-23 12:09 ` Jon Hunter
2019-07-23 13:19 ` Robin Murphy
2019-07-23 21:39 ` Jon Hunter
2019-07-24 10:03 ` Robin Murphy
2019-07-23 18:51 ` David Miller
2019-07-24 8:54 ` Ilias Apalodimas
2019-07-24 9:43 ` Jose Abreu
2019-07-24 9:53 ` Ilias Apalodimas [this message]
2019-07-24 10:04 ` Jose Abreu
2019-07-24 11:10 ` Jon Hunter
2019-07-24 11:34 ` Jose Abreu
2019-07-24 11:58 ` Jon Hunter
2019-07-25 7:44 ` Jose Abreu
2019-07-25 9:45 ` Jon Hunter
2019-07-25 11:39 ` Ilias Apalodimas
2019-07-23 10:38 ` Jon Hunter
2019-07-23 10:49 ` Jose Abreu
2019-07-23 11:58 ` Jon Hunter
2019-07-23 12:51 ` Jose Abreu
2019-07-23 13:34 ` Jon Hunter
2019-07-29 9:45 ` Mikko Perttunen
2019-07-25 13:20 ` Jon Hunter
2019-07-25 13:26 ` Jose Abreu
2019-07-25 14:25 ` Jon Hunter
2019-07-25 15:12 ` Jose Abreu
2019-07-26 14:11 ` Jon Hunter
2019-07-27 15:56 ` Jose Abreu
2019-07-29 8:16 ` Jose Abreu
2019-07-29 10:55 ` Jon Hunter
2019-07-29 11:29 ` Jose Abreu
2019-07-29 11:52 ` Robin Murphy
2019-07-29 14:08 ` Jose Abreu
2019-07-29 21:33 ` Jon Hunter
2019-07-30 9:39 ` Jose Abreu
2019-07-30 13:36 ` Jon Hunter
2019-07-30 13:58 ` Jose Abreu
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