* [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194
@ 2019-07-26 10:16 Thierry Reding
2019-07-26 10:16 ` [PATCH 2/3] arm64: tegra: Add unit-address for ACONNECT " Thierry Reding
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Thierry Reding @ 2019-07-26 10:16 UTC (permalink / raw)
To: Thierry Reding; +Cc: linux-tegra, linux-arm-kernel, Jon Hunter
From: Thierry Reding <treding@nvidia.com>
The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 20 +++++++++----------
.../boot/dts/nvidia/tegra194-p2972-0000.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
3 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index 62e07e1197cc..02f6a8f0d741 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -8,17 +8,17 @@
compatible = "nvidia,p2888", "nvidia,tegra194";
aliases {
- sdhci0 = "/cbb/sdhci@3460000";
- sdhci1 = "/cbb/sdhci@3400000";
+ sdhci0 = "/cbb@0/sdhci@3460000";
+ sdhci1 = "/cbb@0/sdhci@3400000";
serial0 = &tcu;
i2c0 = "/bpmp/i2c";
- i2c1 = "/cbb/i2c@3160000";
- i2c2 = "/cbb/i2c@c240000";
- i2c3 = "/cbb/i2c@3180000";
- i2c4 = "/cbb/i2c@3190000";
- i2c5 = "/cbb/i2c@31c0000";
- i2c6 = "/cbb/i2c@c250000";
- i2c7 = "/cbb/i2c@31e0000";
+ i2c1 = "/cbb@0/i2c@3160000";
+ i2c2 = "/cbb@0/i2c@c240000";
+ i2c3 = "/cbb@0/i2c@3180000";
+ i2c4 = "/cbb@0/i2c@3190000";
+ i2c5 = "/cbb@0/i2c@31c0000";
+ i2c6 = "/cbb@0/i2c@c250000";
+ i2c7 = "/cbb@0/i2c@31e0000";
};
chosen {
@@ -26,7 +26,7 @@
stdout-path = "serial0:115200n8";
};
- cbb {
+ cbb@0 {
ethernet@2490000 {
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 23597d53c9c9..740aaf597115 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -10,7 +10,7 @@
model = "NVIDIA Jetson AGX Xavier Developer Kit";
compatible = "nvidia,p2972-0000", "nvidia,tegra194";
- cbb {
+ cbb@0 {
aconnect {
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index adebbbf36bd0..2597eb7f747b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -14,7 +14,7 @@
#size-cells = <2>;
/* control backbone */
- cbb {
+ cbb@0 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.22.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] arm64: tegra: Add unit-address for ACONNECT on Tegra194
2019-07-26 10:16 [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194 Thierry Reding
@ 2019-07-26 10:16 ` Thierry Reding
2019-07-26 10:16 ` [PATCH 3/3] arm64: tegra: Fix base address for SOR1 " Thierry Reding
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-07-26 10:16 UTC (permalink / raw)
To: Thierry Reding; +Cc: linux-tegra, linux-arm-kernel, Jon Hunter
From: Thierry Reding <treding@nvidia.com>
The ACONNECT complex starts at physical address 0x2900000, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 740aaf597115..fb0b9fd0b405 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -11,7 +11,7 @@
compatible = "nvidia,p2972-0000", "nvidia,tegra194";
cbb@0 {
- aconnect {
+ aconnect@2900000 {
status = "okay";
dma-controller@2930000 {
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 2597eb7f747b..923415fd72a4 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -59,7 +59,7 @@
snps,rxpbl = <8>;
};
- aconnect {
+ aconnect@2900000 {
compatible = "nvidia,tegra194-aconnect",
"nvidia,tegra210-aconnect";
clocks = <&bpmp TEGRA194_CLK_APE>,
--
2.22.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 3/3] arm64: tegra: Fix base address for SOR1 on Tegra194
2019-07-26 10:16 [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194 Thierry Reding
2019-07-26 10:16 ` [PATCH 2/3] arm64: tegra: Add unit-address for ACONNECT " Thierry Reding
@ 2019-07-26 10:16 ` Thierry Reding
2019-07-26 16:04 ` [PATCH 1/3] arm64: tegra: Add unit-address for CBB " mirq-test
2019-10-01 14:42 ` Thierry Reding
3 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-07-26 10:16 UTC (permalink / raw)
To: Thierry Reding; +Cc: linux-tegra, linux-arm-kernel, Jon Hunter
From: Thierry Reding <treding@nvidia.com>
The SOR1 hardware block's registers start at physical address 0x15b40000
as correctly specified by the unit-address, but the reg property lists a
wrong value, likely because it was copy-and-pasted from SOR0 but not
correctly updated.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 923415fd72a4..ca5ffbc79e2f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1045,7 +1045,7 @@
sor1: sor@15b40000 {
compatible = "nvidia,tegra194-sor";
- reg = <0x155c0000 0x40000>;
+ reg = <0x15b40000 0x40000>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SOR1_REF>,
<&bpmp TEGRA194_CLK_SOR1_OUT>,
--
2.22.0
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194
2019-07-26 10:16 [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194 Thierry Reding
2019-07-26 10:16 ` [PATCH 2/3] arm64: tegra: Add unit-address for ACONNECT " Thierry Reding
2019-07-26 10:16 ` [PATCH 3/3] arm64: tegra: Fix base address for SOR1 " Thierry Reding
@ 2019-07-26 16:04 ` mirq-test
2019-10-01 14:42 ` Thierry Reding
3 siblings, 0 replies; 5+ messages in thread
From: mirq-test @ 2019-07-26 16:04 UTC (permalink / raw)
To: Thierry Reding; +Cc: linux-tegra, linux-arm-kernel, Jon Hunter
On Fri, Jul 26, 2019 at 12:16:16PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The control back-bone (CBB) starts at physical address 0, so give it a
> unit-address to comply with standard naming practices checked for by the
> device tree compiler.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 20 +++++++++----------
> .../boot/dts/nvidia/tegra194-p2972-0000.dts | 2 +-
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
> 3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> index 62e07e1197cc..02f6a8f0d741 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
> @@ -8,17 +8,17 @@
> compatible = "nvidia,p2888", "nvidia,tegra194";
>
> aliases {
> - sdhci0 = "/cbb/sdhci@3460000";
> - sdhci1 = "/cbb/sdhci@3400000";
> + sdhci0 = "/cbb@0/sdhci@3460000";
> + sdhci1 = "/cbb@0/sdhci@3400000";
> serial0 = &tcu;
> i2c0 = "/bpmp/i2c";
> - i2c1 = "/cbb/i2c@3160000";
> - i2c2 = "/cbb/i2c@c240000";
> - i2c3 = "/cbb/i2c@3180000";
> - i2c4 = "/cbb/i2c@3190000";
> - i2c5 = "/cbb/i2c@31c0000";
> - i2c6 = "/cbb/i2c@c250000";
> - i2c7 = "/cbb/i2c@31e0000";
> + i2c1 = "/cbb@0/i2c@3160000";
> + i2c2 = "/cbb@0/i2c@c240000";
> + i2c3 = "/cbb@0/i2c@3180000";
> + i2c4 = "/cbb@0/i2c@3190000";
> + i2c5 = "/cbb@0/i2c@31c0000";
> + i2c6 = "/cbb@0/i2c@c250000";
> + i2c7 = "/cbb@0/i2c@31e0000";
> };
[...]
There are aliases in tegra194.dtsi like gen1_i2c, maybe they could
be used here?
Best Regards,
Michał Mirosław
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194
2019-07-26 10:16 [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194 Thierry Reding
` (2 preceding siblings ...)
2019-07-26 16:04 ` [PATCH 1/3] arm64: tegra: Add unit-address for CBB " mirq-test
@ 2019-10-01 14:42 ` Thierry Reding
3 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-10-01 14:42 UTC (permalink / raw)
To: Jon Hunter, linux-tegra, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 661 bytes --]
On Fri, Jul 26, 2019 at 12:16:16PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The control back-bone (CBB) starts at physical address 0, so give it a
> unit-address to comply with standard naming practices checked for by the
> device tree compiler.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 20 +++++++++----------
> .../boot/dts/nvidia/tegra194-p2972-0000.dts | 2 +-
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
> 3 files changed, 12 insertions(+), 12 deletions(-)
All three patches applied to for-5.5/arm64/dt.
Thierry
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2019-07-26 10:16 [PATCH 1/3] arm64: tegra: Add unit-address for CBB on Tegra194 Thierry Reding
2019-07-26 10:16 ` [PATCH 2/3] arm64: tegra: Add unit-address for ACONNECT " Thierry Reding
2019-07-26 10:16 ` [PATCH 3/3] arm64: tegra: Fix base address for SOR1 " Thierry Reding
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