From: "Guido Günther" <agx@sigxcpu.org>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Mark Rutland <mark.rutland@arm.com>,
DTML <devicetree@vger.kernel.org>,
Jernej Skrabec <jernej.skrabec@siol.net>,
Daniel Vetter <daniel@ffwll.ch>,
Neil Armstrong <narmstrong@baylibre.com>,
David Airlie <airlied@linux.ie>,
Fabio Estevam <festevam@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Jonas Karlman <jonas@kwiboo.se>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Andrzej Hajda <a.hajda@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Robert Chiras <robert.chiras@nxp.com>,
Shawn Guo <shawnguo@kernel.org>, Lee Jones <lee.jones@linaro.org>,
Sam Ravnborg <sam@ravnborg.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Subject: Re: [PATCH v2 1/3] arm64: imx8mq: add imx8mq iomux-gpr field defines
Date: Wed, 21 Aug 2019 19:42:08 +0200 [thread overview]
Message-ID: <20190821174208.GA9486@bogon.m.sigxcpu.org> (raw)
In-Reply-To: <CAK8P3a1q9G8VKgNKh+6khzoW3bFTVR_Zorygy=Qqsq-PYzM4=g@mail.gmail.com>
Hi,
On Tue, Aug 13, 2019 at 01:07:52PM +0200, Arnd Bergmann wrote:
> On Tue, Aug 13, 2019 at 12:10 PM Guido Günther <agx@sigxcpu.org> wrote:
> > On Tue, Aug 13, 2019 at 10:08:44AM +0200, Arnd Bergmann wrote:
> > > On Fri, Aug 9, 2019 at 6:24 PM Guido Günther <agx@sigxcpu.org> wrote:
> > > >
> > > > This adds all the gpr registers and the define needed for selecting
> > > > the input source in the imx-nwl drm bridge.
> > > >
> > > > Signed-off-by: Guido Günther <agx@sigxcpu.org>
> > > > +
> > > > +#define IOMUXC_GPR0 0x00
> > > > +#define IOMUXC_GPR1 0x04
> > > > +#define IOMUXC_GPR2 0x08
> > > > +#define IOMUXC_GPR3 0x0c
> > > > +#define IOMUXC_GPR4 0x10
> > > > +#define IOMUXC_GPR5 0x14
> > > > +#define IOMUXC_GPR6 0x18
> > > > +#define IOMUXC_GPR7 0x1c
> > > (more of the same)
> > >
> > > huh?
> >
> > These are the names from the imx8MQ reference manual (general purpose
> > registers, they lump together all sorts of things), it's the same on
> > imx6/imx7):
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/mfd/syscon/imx7-iomuxc-gpr.h
> >
> > > > +/* i.MX8Mq iomux gpr register field defines */
> > > > +#define IMX8MQ_GPR13_MIPI_MUX_SEL BIT(2)
> > >
> > > I think this define should probably be local to the pinctrl driver, to
> > > ensure that no other drivers fiddle with the registers manually.
> >
> > The purpose of these bits is for a driver to fiddle with them to select
> > the input source. Similar on imx7 it's already used for e.g. the phy
> > refclk in the pci controller:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/dwc/pci-imx6.c#n638
>
> That one should likely use either the clk interface or the phy
> interface instead.
>
> > The GPRs are not about pad configuration but gather all sorts of things
> > (section 8.2.4 of the imx8mq reference manual): pcie setup, dsi related
> > bits so I don't think this should be done via a pinctrl
> > driver. Should we handle that differently than on imx6/7?
>
> It would be nice to fix the existing code as well, but for the moment,
> I only think we should not add more of that.
>
> Generally speaking, we can use syscon to do random things that don't
> have a subsystem of their own, but we should not use it to do things
> that have an existing driver framework like pinctrl, clock, reset, phy
> etc.
Since it's not an external pin i opted to use MUX_MMIO instead which
seems like a good fit here. Does that make sense?
Cheers,
-- Guido
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next prev parent reply other threads:[~2019-08-21 17:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 16:24 [PATCH v2 0/3] drm: bridge: Add NWL MIPI DSI host controller support Guido Günther
2019-08-09 16:24 ` [PATCH v2 1/3] arm64: imx8mq: add imx8mq iomux-gpr field defines Guido Günther
2019-08-12 10:24 ` Lee Jones
2019-08-13 8:08 ` Arnd Bergmann
2019-08-13 10:10 ` Guido Günther
2019-08-13 11:07 ` Arnd Bergmann
2019-08-21 17:42 ` Guido Günther [this message]
2019-08-22 10:03 ` Philipp Zabel
2019-08-09 16:24 ` [PATCH v2 2/3] dt-bindings: display/bridge: Add binding for NWL mipi dsi host controller Guido Günther
2019-08-09 20:41 ` Rob Herring
2019-08-13 10:10 ` Guido Günther
2019-08-21 18:15 ` Laurent Pinchart
2019-08-22 10:49 ` Guido Günther
2019-08-09 16:24 ` [PATCH v2 3/3] drm/bridge: Add NWL MIPI DSI host controller support Guido Günther
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