From: "Guido Günther" <agx@sigxcpu.org>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Jernej Skrabec <jernej.skrabec@siol.net>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Sam Ravnborg <sam@ravnborg.org>,
Neil Armstrong <narmstrong@baylibre.com>,
David Airlie <airlied@linux.ie>,
Fabio Estevam <festevam@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
Jonas Karlman <jonas@kwiboo.se>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
Andrzej Hajda <a.hajda@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Daniel Vetter <daniel@ffwll.ch>,
Robert Chiras <robert.chiras@nxp.com>,
Lee Jones <lee.jones@linaro.org>, Shawn Guo <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/3] dt-bindings: display/bridge: Add binding for NWL mipi dsi host controller
Date: Thu, 22 Aug 2019 12:49:34 +0200 [thread overview]
Message-ID: <20190822104934.GB28060@bogon.m.sigxcpu.org> (raw)
In-Reply-To: <20190821181518.GB26759@pendragon.ideasonboard.com>
Hi Laurent,
thanks for having a look!
On Wed, Aug 21, 2019 at 09:15:18PM +0300, Laurent Pinchart wrote:
> Hi Guido,
>
> Thank you for the patch.
>
> On Fri, Aug 09, 2019 at 06:24:22PM +0200, Guido Günther wrote:
> > The Northwest Logic MIPI DSI IP core can be found in NXPs i.MX8 SoCs.
> >
> > Signed-off-by: Guido Günther <agx@sigxcpu.org>
> > ---
> > .../bindings/display/bridge/nwl-dsi.yaml | 155 ++++++++++++++++++
> > 1 file changed, 155 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> > new file mode 100644
> > index 000000000000..5ed8bc4a4d18
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
> > @@ -0,0 +1,155 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/bridge/imx-nwl-dsi.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Northwest Logic MIPI-DSI on imx SoCs
> > +
> > +maintainers:
> > + - Guido Gúnther <agx@sigxcpu.org>
> > + - Robert Chiras <robert.chiras@nxp.com>
> > +
> > +description: |
> > + NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
> > + the SOCs NWL MIPI-DSI host controller.
> > +
> > +properties:
> > + compatible:
> > + oneOf:
> > + - items:
> > + - const: fsl,imx8mq-nwl-dsi
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: DSI core clock
> > + - description: RX_ESC clock (used in escape mode)
> > + - description: TX_ESC clock (used in escape mode)
> > + - description: PHY_REF clock
> > +
> > + clock-names:
> > + items:
> > + - const: core
> > + - const: rx_esc
> > + - const: tx_esc
> > + - const: phy_ref
> > +
> > + phys:
> > + maxItems: 1
> > + description:
> > + A phandle to the phy module representing the DPHY
> > +
> > + phy-names:
> > + items:
> > + - const: dphy
> > +
> > + power-domains:
> > + maxItems: 1
> > + description:
> > + A phandle to the power domain
> > +
> > + resets:
> > + maxItems: 4
> > + description:
> > + A phandle to the reset controller
> > +
> > + reset-names:
> > + items:
> > + - const: byte
> > + - const: dpi
> > + - const: esc
> > + - const: pclk
> > +
> > + mux-sel:
> > + maxItems: 1
> > + description:
> > + A phandle to the MUX register set
>
> Did you mean the MUX syscon ? A phandle to a register set sounds a bit
> strange.
That one is gone in v3 in favour of mux-controls.
>
> > +
> > + port:
> > + type: object
> > + description:
> > + A input put or output port node.
>
> s/input put/input/
Thanks! I've shuffled this around in v3 and added some more detail.
Cheers,
-- Guido
>
> > +
> > + ports:
> > + type: object
> > + description:
> > + A node containing DSI input & output port nodes with endpoint
> > + definitions as documented in
> > + Documentation/devicetree/bindings/graph.txt.
> > +
> > +patternProperties:
> > + "^panel@[0-9]+$": true
> > +
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - fsl,imx8mq-nwl-dsi
> > + then:
> > + required:
> > + - resets
> > + - reset-names
> > + - mux-sel
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > + - clocks
> > + - clock-names
> > + - phys
> > + - phy-names
> > +
> > +examples:
> > + - |
> > +
> > + mipi_dsi: mipi_dsi@30a00000 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + compatible = "fsl,imx8mq-nwl-dsi";
> > + reg = <0x30A00000 0x300>;
> > + clocks = <&clk 163>, <&clk 244>, <&clk 245>, <&clk 164>;
> > + clock-names = "core", "rx_esc", "tx_esc", "phy_ref";
> > + interrupts = <0 34 4>;
> > + power-domains = <&pgc_mipi>;
> > + resets = <&src 0>, <&src 1>, <&src 2>, <&src 3>;
> > + reset-names = "byte", "dpi", "esc", "pclk";
> > + mux-sel = <&iomuxc_gpr>;
> > + phys = <&dphy>;
> > + phy-names = "dphy";
> > +
> > + panel@0 {
> > + compatible = "...";
> > + port@0 {
> > + panel_in: endpoint {
> > + remote-endpoint = <&mipi_dsi_out>;
> > + };
> > + };
> > + };
> > +
> > + ports {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + port@0 {
> > + reg = <0>;
> > + mipi_dsi_in: endpoint {
> > + remote-endpoint = <&lcdif_mipi_dsi>;
> > + };
> > + };
> > + port@1 {
> > + reg = <1>;
> > + mipi_dsi_out: endpoint {
> > + remote-endpoint = <&panel_in>;
> > + };
> > + };
> > + };
> > + };
>
> --
> Regards,
>
> Laurent Pinchart
>
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next prev parent reply other threads:[~2019-08-22 10:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-09 16:24 [PATCH v2 0/3] drm: bridge: Add NWL MIPI DSI host controller support Guido Günther
2019-08-09 16:24 ` [PATCH v2 1/3] arm64: imx8mq: add imx8mq iomux-gpr field defines Guido Günther
2019-08-12 10:24 ` Lee Jones
2019-08-13 8:08 ` Arnd Bergmann
2019-08-13 10:10 ` Guido Günther
2019-08-13 11:07 ` Arnd Bergmann
2019-08-21 17:42 ` Guido Günther
2019-08-22 10:03 ` Philipp Zabel
2019-08-09 16:24 ` [PATCH v2 2/3] dt-bindings: display/bridge: Add binding for NWL mipi dsi host controller Guido Günther
2019-08-09 20:41 ` Rob Herring
2019-08-13 10:10 ` Guido Günther
2019-08-21 18:15 ` Laurent Pinchart
2019-08-22 10:49 ` Guido Günther [this message]
2019-08-09 16:24 ` [PATCH v2 3/3] drm/bridge: Add NWL MIPI DSI host controller support Guido Günther
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