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* [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming
@ 2019-10-05 16:42 Vidya Sagar
  2019-10-05 16:42 ` [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default Vidya Sagar
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Vidya Sagar @ 2019-10-05 16:42 UTC (permalink / raw)
  To: lorenzo.pieralisi, bhelgaas, robh+dt, thierry.reding, jonathanh,
	andrew.murray
  Cc: devicetree, mmaddireddy, kthota, linux-pci, linux-kernel, vidyas,
	linux-tegra, linux-arm-kernel, sagar.tv

Corrects the programming to provide REFCLK to the downstream device
when there is no CLKREQ sideband signal routing present from root port
to the endpont.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index f89f5acee72d..cbe95f0ea0ca 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -40,8 +40,6 @@
 #define APPL_PINMUX_CLKREQ_OVERRIDE		BIT(3)
 #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN	BIT(4)
 #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE	BIT(5)
-#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN		BIT(9)
-#define APPL_PINMUX_CLKREQ_OUT_OVRD		BIT(10)
 
 #define APPL_CTRL				0x4
 #define APPL_CTRL_SYS_PRE_DET_STATE		BIT(6)
@@ -1193,8 +1191,8 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
 
 	if (!pcie->supports_clkreq) {
 		val = appl_readl(pcie, APPL_PINMUX);
-		val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
-		val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
+		val |= APPL_PINMUX_CLKREQ_OVERRIDE_EN;
+		val &= ~APPL_PINMUX_CLKREQ_OVERRIDE;
 		appl_writel(pcie, val, APPL_PINMUX);
 	}
 
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default
  2019-10-05 16:42 [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Vidya Sagar
@ 2019-10-05 16:42 ` Vidya Sagar
  2019-10-16 16:19   ` Thierry Reding
  2019-10-16 16:19 ` [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Thierry Reding
  2019-10-18  9:01 ` Lorenzo Pieralisi
  2 siblings, 1 reply; 5+ messages in thread
From: Vidya Sagar @ 2019-10-05 16:42 UTC (permalink / raw)
  To: lorenzo.pieralisi, bhelgaas, robh+dt, thierry.reding, jonathanh,
	andrew.murray
  Cc: devicetree, mmaddireddy, kthota, linux-pci, linux-kernel, vidyas,
	linux-tegra, linux-arm-kernel, sagar.tv

Although Tegra194 has support for CLKREQ sideband signal and P2972
has routing of the same till the slot, it is the case most of the time
that the connected device doesn't have CLKREQ support. Hence, it makes
sense to assume that there is no CLKREQ support by default and it can
be enabled on need basis when a card with CLKREQ support is connected.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index a312c051448b..11220d97adb8 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1186,7 +1186,6 @@
 
 		nvidia,bpmp = <&bpmp 1>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
@@ -1232,7 +1231,6 @@
 
 		nvidia,bpmp = <&bpmp 2>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
@@ -1278,7 +1276,6 @@
 
 		nvidia,bpmp = <&bpmp 3>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
@@ -1324,7 +1321,6 @@
 
 		nvidia,bpmp = <&bpmp 4>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
@@ -1370,7 +1366,6 @@
 
 		nvidia,bpmp = <&bpmp 0>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
@@ -1420,7 +1415,6 @@
 		interrupt-map-mask = <0 0 0 0>;
 		interrupt-map = <0 0 0 0 &gic GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 
-		supports-clkreq;
 		nvidia,aspm-cmrt-us = <60>;
 		nvidia,aspm-pwr-on-t-us = <20>;
 		nvidia,aspm-l0s-entrance-latency-us = <3>;
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming
  2019-10-05 16:42 [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Vidya Sagar
  2019-10-05 16:42 ` [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default Vidya Sagar
@ 2019-10-16 16:19 ` Thierry Reding
  2019-10-18  9:01 ` Lorenzo Pieralisi
  2 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-10-16 16:19 UTC (permalink / raw)
  To: Vidya Sagar
  Cc: devicetree, lorenzo.pieralisi, mmaddireddy, kthota, linux-pci,
	linux-kernel, jonathanh, linux-tegra, robh+dt, bhelgaas,
	andrew.murray, linux-arm-kernel, sagar.tv


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On Sat, Oct 05, 2019 at 10:12:11PM +0530, Vidya Sagar wrote:
> Corrects the programming to provide REFCLK to the downstream device
> when there is no CLKREQ sideband signal routing present from root port
> to the endpont.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index f89f5acee72d..cbe95f0ea0ca 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -40,8 +40,6 @@
>  #define APPL_PINMUX_CLKREQ_OVERRIDE		BIT(3)
>  #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN	BIT(4)
>  #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE	BIT(5)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN		BIT(9)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD		BIT(10)
>  
>  #define APPL_CTRL				0x4
>  #define APPL_CTRL_SYS_PRE_DET_STATE		BIT(6)
> @@ -1193,8 +1191,8 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
>  
>  	if (!pcie->supports_clkreq) {
>  		val = appl_readl(pcie, APPL_PINMUX);
> -		val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
> -		val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
> +		val |= APPL_PINMUX_CLKREQ_OVERRIDE_EN;
> +		val &= ~APPL_PINMUX_CLKREQ_OVERRIDE;
>  		appl_writel(pcie, val, APPL_PINMUX);
>  	}

If we do support CLKREQ, do we have to explicitly set the OVERRIDE bit?
Or clear the OVERRIDE_EN bit? Is it always guaranteed that the defaults
(OVERRIDE_EN = 0) is applied at this point?

That's an issue that's orthogonal to this patch, though, so for this
one:

Acked-by: Thierry Reding <treding@nvidia.com>

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default
  2019-10-05 16:42 ` [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default Vidya Sagar
@ 2019-10-16 16:19   ` Thierry Reding
  0 siblings, 0 replies; 5+ messages in thread
From: Thierry Reding @ 2019-10-16 16:19 UTC (permalink / raw)
  To: Vidya Sagar
  Cc: devicetree, lorenzo.pieralisi, mmaddireddy, kthota, linux-pci,
	linux-kernel, jonathanh, linux-tegra, robh+dt, bhelgaas,
	andrew.murray, linux-arm-kernel, sagar.tv


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On Sat, Oct 05, 2019 at 10:12:12PM +0530, Vidya Sagar wrote:
> Although Tegra194 has support for CLKREQ sideband signal and P2972
> has routing of the same till the slot, it is the case most of the time
> that the connected device doesn't have CLKREQ support. Hence, it makes
> sense to assume that there is no CLKREQ support by default and it can
> be enabled on need basis when a card with CLKREQ support is connected.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 ------
>  1 file changed, 6 deletions(-)

Applied to for-5.5/arm64/dt, thanks.

Thierry

> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index a312c051448b..11220d97adb8 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1186,7 +1186,6 @@
>  
>  		nvidia,bpmp = <&bpmp 1>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> @@ -1232,7 +1231,6 @@
>  
>  		nvidia,bpmp = <&bpmp 2>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> @@ -1278,7 +1276,6 @@
>  
>  		nvidia,bpmp = <&bpmp 3>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> @@ -1324,7 +1321,6 @@
>  
>  		nvidia,bpmp = <&bpmp 4>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> @@ -1370,7 +1366,6 @@
>  
>  		nvidia,bpmp = <&bpmp 0>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> @@ -1420,7 +1415,6 @@
>  		interrupt-map-mask = <0 0 0 0>;
>  		interrupt-map = <0 0 0 0 &gic GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
>  
> -		supports-clkreq;
>  		nvidia,aspm-cmrt-us = <60>;
>  		nvidia,aspm-pwr-on-t-us = <20>;
>  		nvidia,aspm-l0s-entrance-latency-us = <3>;
> -- 
> 2.17.1
> 

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming
  2019-10-05 16:42 [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Vidya Sagar
  2019-10-05 16:42 ` [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default Vidya Sagar
  2019-10-16 16:19 ` [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Thierry Reding
@ 2019-10-18  9:01 ` Lorenzo Pieralisi
  2 siblings, 0 replies; 5+ messages in thread
From: Lorenzo Pieralisi @ 2019-10-18  9:01 UTC (permalink / raw)
  To: Vidya Sagar
  Cc: devicetree, mmaddireddy, kthota, linux-pci, linux-kernel,
	jonathanh, linux-tegra, robh+dt, thierry.reding, bhelgaas,
	andrew.murray, linux-arm-kernel, sagar.tv

On Sat, Oct 05, 2019 at 10:12:11PM +0530, Vidya Sagar wrote:
> Corrects the programming to provide REFCLK to the downstream device
> when there is no CLKREQ sideband signal routing present from root port
> to the endpont.
> 
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
>  drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)

Applied to pci/tegra, thanks.

Lorenzo

> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index f89f5acee72d..cbe95f0ea0ca 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -40,8 +40,6 @@
>  #define APPL_PINMUX_CLKREQ_OVERRIDE		BIT(3)
>  #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE_EN	BIT(4)
>  #define APPL_PINMUX_CLK_OUTPUT_IN_OVERRIDE	BIT(5)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD_EN		BIT(9)
> -#define APPL_PINMUX_CLKREQ_OUT_OVRD		BIT(10)
>  
>  #define APPL_CTRL				0x4
>  #define APPL_CTRL_SYS_PRE_DET_STATE		BIT(6)
> @@ -1193,8 +1191,8 @@ static int tegra_pcie_config_controller(struct tegra_pcie_dw *pcie,
>  
>  	if (!pcie->supports_clkreq) {
>  		val = appl_readl(pcie, APPL_PINMUX);
> -		val |= APPL_PINMUX_CLKREQ_OUT_OVRD_EN;
> -		val |= APPL_PINMUX_CLKREQ_OUT_OVRD;
> +		val |= APPL_PINMUX_CLKREQ_OVERRIDE_EN;
> +		val &= ~APPL_PINMUX_CLKREQ_OVERRIDE;
>  		appl_writel(pcie, val, APPL_PINMUX);
>  	}
>  
> -- 
> 2.17.1
> 

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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-10-18  9:01 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-05 16:42 [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Vidya Sagar
2019-10-05 16:42 ` [PATCH 2/2] arm64: tegra: Assume no CLKREQ presence by default Vidya Sagar
2019-10-16 16:19   ` Thierry Reding
2019-10-16 16:19 ` [PATCH 1/2] PCI: tegra: Fix CLKREQ dependency programming Thierry Reding
2019-10-18  9:01 ` Lorenzo Pieralisi

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