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* [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema
@ 2019-10-21 16:13 Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 2/7] dt-bindings: sram: Merge Samsung SRAM bindings into generic Krzysztof Kozlowski
                   ` (6 more replies)
  0 siblings, 7 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

Convert generic mmio-sram bindings to DT schema format using
json-schema.  Require the address/size cells to be 1, not equal to root
node.  This also fixes the check for clocks property to be in main root
node instead of children.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. Integrate Samsung SRAM bindings here,
2. Move 'clocks' one level up (error in previous bindings),
3. Add 'additionalProperties: false',
4. Fix names of children in examples,
5. Fix children nodes address pattern,
6. Address other review comments

Changes since v2:
1. Add Rob as maintainer,
2. Use "contains" for compatible,
3. Fix address and size cells to 1,
4. Add maxitems to reg under children,
5. Remove unneeded string type from label.

Changes since v1:
1. Indent example with four spaces (more readable).
---
 .../devicetree/bindings/sram/sram.txt         |  80 ----------
 .../devicetree/bindings/sram/sram.yaml        | 137 ++++++++++++++++++
 2 files changed, 137 insertions(+), 80 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/sram.txt
 create mode 100644 Documentation/devicetree/bindings/sram/sram.yaml

diff --git a/Documentation/devicetree/bindings/sram/sram.txt b/Documentation/devicetree/bindings/sram/sram.txt
deleted file mode 100644
index e98908bd4227..000000000000
--- a/Documentation/devicetree/bindings/sram/sram.txt
+++ /dev/null
@@ -1,80 +0,0 @@
-Generic on-chip SRAM
-
-Simple IO memory regions to be managed by the genalloc API.
-
-Required properties:
-
-- compatible : mmio-sram or atmel,sama5d2-securam
-
-- reg : SRAM iomem address range
-
-Reserving sram areas:
----------------------
-
-Each child of the sram node specifies a region of reserved memory. Each
-child node should use a 'reg' property to specify a specific range of
-reserved memory.
-
-Following the generic-names recommended practice, node names should
-reflect the purpose of the node. Unit address (@<address>) should be
-appended to the name.
-
-Required properties in the sram node:
-
-- #address-cells, #size-cells : should use the same values as the root node
-- ranges : standard definition, should translate from local addresses
-           within the sram to bus addresses
-
-Optional properties in the sram node:
-
-- no-memory-wc : the flag indicating, that SRAM memory region has not to
-                 be remapped as write combining. WC is used by default.
-
-Required properties in the area nodes:
-
-- reg : iomem address range, relative to the SRAM range
-
-Optional properties in the area nodes:
-
-- compatible : standard definition, should contain a vendor specific string
-               in the form <vendor>,[<device>-]<usage>
-- pool : indicates that the particular reserved SRAM area is addressable
-         and in use by another device or devices
-- export : indicates that the reserved SRAM area may be accessed outside
-           of the kernel, e.g. by bootloader or userspace
-- protect-exec : Same as 'pool' above but with the additional
-		 constraint that code wil be run from the region and
-		 that the memory is maintained as read-only, executable
-		 during code execution. NOTE: This region must be page
-		 aligned on start and end in order to properly allow
-		 manipulation of the page attributes.
-- label : the name for the reserved partition, if omitted, the label
-          is taken from the node name excluding the unit address.
-- clocks : a list of phandle and clock specifier pair that controls the
-	   single SRAM clock.
-
-Example:
-
-sram: sram@5c000000 {
-	compatible = "mmio-sram";
-	reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
-
-	#address-cells = <1>;
-	#size-cells = <1>;
-	ranges = <0 0x5c000000 0x40000>;
-
-	smp-sram@100 {
-		compatible = "socvendor,smp-sram";
-		reg = <0x100 0x50>;
-	};
-
-	device-sram@1000 {
-		reg = <0x1000 0x1000>;
-		pool;
-	};
-
-	exported@20000 {
-		reg = <0x20000 0x20000>;
-		export;
-	};
-};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
new file mode 100644
index 000000000000..d338fcaa21ed
--- /dev/null
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -0,0 +1,137 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sram/sram.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Generic on-chip SRAM
+
+maintainers:
+  - Rob Herring <robh@kernel.org>
+
+description: |+
+  Simple IO memory regions to be managed by the genalloc API.
+
+  Each child of the sram node specifies a region of reserved memory. Each
+  child node should use a 'reg' property to specify a specific range of
+  reserved memory.
+
+  Following the generic-names recommended practice, node names should
+  reflect the purpose of the node. Unit address (@<address>) should be
+  appended to the name.
+
+properties:
+  $nodename:
+    pattern: "^sram(@.*)?"
+
+  compatible:
+    contains:
+      enum:
+        - mmio-sram
+        - atmel,sama5d2-securam
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      A list of phandle and clock specifier pair that controls the single
+      SRAM clock.
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+  ranges:
+    description:
+      Should translate from local addresses within the sram to bus addresses.
+
+  no-memory-wc:
+    description:
+      The flag indicating, that SRAM memory region has not to be remapped
+      as write combining. WC is used by default.
+    type: boolean
+
+patternProperties:
+  "^([a-z]*-)?sram@[a-f0-9]+$":
+    type: object
+    description:
+      Each child of the sram node specifies a region of reserved memory.
+    properties:
+      compatible:
+        description:
+          Should contain a vendor specific string in the form
+          <vendor>,[<device>-]<usage>
+
+      reg:
+        description:
+          IO mem address range, relative to the SRAM range.
+        maxItems: 1
+
+      pool:
+        description:
+          Indicates that the particular reserved SRAM area is addressable
+          and in use by another device or devices.
+        type: boolean
+
+      export:
+        description:
+          Indicates that the reserved SRAM area may be accessed outside
+          of the kernel, e.g. by bootloader or userspace.
+        type: boolean
+
+      protect-exec:
+        description: |
+          Same as 'pool' above but with the additional constraint that code
+          will be run from the region and that the memory is maintained as
+          read-only, executable during code execution. NOTE: This region must
+          be page aligned on start and end in order to properly allow
+          manipulation of the page attributes.
+        type: boolean
+
+      label:
+        description:
+          The name for the reserved partition, if omitted, the label is taken
+          from the node name excluding the unit address.
+
+    required:
+      - reg
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - "#address-cells"
+  - "#size-cells"
+  - ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    sram@5c000000 {
+        compatible = "mmio-sram";
+        reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
+
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x5c000000 0x40000>;
+
+        smp-sram@100 {
+            compatible = "socvendor,smp-sram";
+            reg = <0x100 0x50>;
+        };
+
+        device-sram@1000 {
+            reg = <0x1000 0x1000>;
+            pool;
+        };
+
+        exported-sram@20000 {
+            reg = <0x20000 0x20000>;
+            export;
+        };
+    };
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 2/7] dt-bindings: sram: Merge Samsung SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 3/7] dt-bindings: sram: Merge Amlogic " Krzysztof Kozlowski
                   ` (5 subsequent siblings)
  6 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Samsung SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../devicetree/bindings/sram/samsung-sram.txt | 38 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 29 ++++++++++++++
 MAINTAINERS                                   |  1 -
 3 files changed, 29 insertions(+), 39 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/samsung-sram.txt

diff --git a/Documentation/devicetree/bindings/sram/samsung-sram.txt b/Documentation/devicetree/bindings/sram/samsung-sram.txt
deleted file mode 100644
index 61a9bbed303d..000000000000
--- a/Documentation/devicetree/bindings/sram/samsung-sram.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-Samsung Exynos SYSRAM for SMP bringup:
-------------------------------------
-
-Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup
-of the secondary cores. Once the core gets powered up it executes the
-code that is residing at some specific location of the SYSRAM.
-
-Therefore reserved section sub-nodes have to be added to the mmio-sram
-declaration. These nodes are of two types depending upon secure or
-non-secure execution environment.
-
-Required sub-node properties:
-- compatible : depending upon boot mode, should be
-		"samsung,exynos4210-sysram" : for Secure SYSRAM
-		"samsung,exynos4210-sysram-ns" : for Non-secure SYSRAM
-
-The rest of the properties should follow the generic mmio-sram discription
-found in Documentation/devicetree/bindings/sram/sram.txt
-
-Example:
-
-	sysram@2020000 {
-		compatible = "mmio-sram";
-		reg = <0x02020000 0x54000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x02020000 0x54000>;
-
-		smp-sysram@0 {
-			compatible = "samsung,exynos4210-sysram";
-			reg = <0x0 0x1000>;
-		};
-
-		smp-sysram@53000 {
-			compatible = "samsung,exynos4210-sysram-ns";
-			reg = <0x53000 0x1000>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index d338fcaa21ed..9ed94f8b0794 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -64,6 +64,9 @@ patternProperties:
         description:
           Should contain a vendor specific string in the form
           <vendor>,[<device>-]<usage>
+        enum:
+          - samsung,exynos4210-sysram
+          - samsung,exynos4210-sysram-ns
 
       reg:
         description:
@@ -135,3 +138,29 @@ examples:
             export;
         };
     };
+
+  - |
+    // Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup
+    // of the secondary cores. Once the core gets powered up it executes the
+    // code that is residing at some specific location of the SYSRAM.
+    //
+    // Therefore reserved section sub-nodes have to be added to the mmio-sram
+    // declaration. These nodes are of two types depending upon secure or
+    // non-secure execution environment.
+    sram@2020000 {
+        compatible = "mmio-sram";
+        reg = <0x02020000 0x54000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x02020000 0x54000>;
+
+        smp-sram@0 {
+            compatible = "samsung,exynos4210-sysram";
+            reg = <0x0 0x1000>;
+        };
+
+        smp-sram@53000 {
+            compatible = "samsung,exynos4210-sysram-ns";
+            reg = <0x53000 0x1000>;
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 56c78eadfdc5..699ad8f1eb38 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2235,7 +2235,6 @@ F:	drivers/soc/samsung/
 F:	include/linux/soc/samsung/
 F:	Documentation/arm/samsung/
 F:	Documentation/devicetree/bindings/arm/samsung/
-F:	Documentation/devicetree/bindings/sram/samsung-sram.txt
 F:	Documentation/devicetree/bindings/power/pd-samsung.txt
 N:	exynos
 
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 3/7] dt-bindings: sram: Merge Amlogic SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 2/7] dt-bindings: sram: Merge Samsung SRAM bindings into generic Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 4/7] dt-bindings: sram: Merge Renesas " Krzysztof Kozlowski
                   ` (4 subsequent siblings)
  6 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Amlogic SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/arm/amlogic/smp-sram.txt         | 32 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 22 +++++++++++++
 2 files changed, 22 insertions(+), 32 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/smp-sram.txt

diff --git a/Documentation/devicetree/bindings/arm/amlogic/smp-sram.txt b/Documentation/devicetree/bindings/arm/amlogic/smp-sram.txt
deleted file mode 100644
index 3473ddaadfac..000000000000
--- a/Documentation/devicetree/bindings/arm/amlogic/smp-sram.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-Amlogic Meson8 and Meson8b SRAM for smp bringup:
-------------------------------------------------
-
-Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
-Once the core gets powered up it executes the code that is residing at a
-specific location.
-
-Therefore a reserved section sub-node has to be added to the mmio-sram
-declaration.
-
-Required sub-node properties:
-- compatible : depending on the SoC this should be one of:
-		"amlogic,meson8-smp-sram"
-		"amlogic,meson8b-smp-sram"
-
-The rest of the properties should follow the generic mmio-sram discription
-found in ../../misc/sram.txt
-
-Example:
-
-	sram: sram@d9000000 {
-		compatible = "mmio-sram";
-		reg = <0xd9000000 0x20000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0xd9000000 0x20000>;
-
-		smp-sram@1ff80 {
-			compatible = "amlogic,meson8b-smp-sram";
-			reg = <0x1ff80 0x8>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index 9ed94f8b0794..a78da7a686d0 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -65,6 +65,8 @@ patternProperties:
           Should contain a vendor specific string in the form
           <vendor>,[<device>-]<usage>
         enum:
+          - amlogic,meson8-smp-sram
+          - amlogic,meson8b-smp-sram
           - samsung,exynos4210-sysram
           - samsung,exynos4210-sysram-ns
 
@@ -164,3 +166,23 @@ examples:
             reg = <0x53000 0x1000>;
         };
     };
+
+  - |
+    // Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
+    // Once the core gets powered up it executes the code that is residing at a
+    // specific location.
+    //
+    // Therefore a reserved section sub-node has to be added to the mmio-sram
+    // declaration.
+    sram@d9000000 {
+        compatible = "mmio-sram";
+        reg = <0xd9000000 0x20000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0xd9000000 0x20000>;
+
+        smp-sram@1ff80 {
+            compatible = "amlogic,meson8b-smp-sram";
+            reg = <0x1ff80 0x8>;
+        };
+    };
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 4/7] dt-bindings: sram: Merge Renesas SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 2/7] dt-bindings: sram: Merge Samsung SRAM bindings into generic Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 3/7] dt-bindings: sram: Merge Amlogic " Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-11-01 10:08   ` Geert Uytterhoeven
  2019-10-21 16:13 ` [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip " Krzysztof Kozlowski
                   ` (3 subsequent siblings)
  6 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Renesas SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/sram/renesas,smp-sram.txt        | 27 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 15 +++++++++++
 2 files changed, 15 insertions(+), 27 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/renesas,smp-sram.txt

diff --git a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt b/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
deleted file mode 100644
index 712d05e3e15e..000000000000
--- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Renesas SMP SRAM
-
-Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
-for secondary CPU bringup and CPU hotplug.
-This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
-Documentation/devicetree/bindings/sram/sram.txt.
-
-Required child node properties:
-  - compatible: Must be "renesas,smp-sram",
-  - reg: Address and length of the reserved SRAM.
-    The full physical (bus) address must be aligned to a 256 KiB boundary.
-
-
-Example:
-
-	icram1:	sram@e63c0000 {
-		compatible = "mmio-sram";
-		reg = <0 0xe63c0000 0 0x1000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0 0xe63c0000 0x1000>;
-
-		smp-sram@0 {
-			compatible = "renesas,smp-sram";
-			reg = <0 0x10>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index a78da7a686d0..b92e3e10fbfc 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -67,6 +67,7 @@ patternProperties:
         enum:
           - amlogic,meson8-smp-sram
           - amlogic,meson8b-smp-sram
+          - renesas,smp-sram
           - samsung,exynos4210-sysram
           - samsung,exynos4210-sysram-ns
 
@@ -186,3 +187,17 @@ examples:
             reg = <0x1ff80 0x8>;
         };
     };
+
+  - |
+    sram@e63c0000 {
+        compatible = "mmio-sram";
+        reg = <0xe63c0000 0x1000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0xe63c0000 0x1000>;
+
+        smp-sram@0 {
+            compatible = "renesas,smp-sram";
+            reg = <0 0x10>;
+        };
+    };
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
                   ` (2 preceding siblings ...)
  2019-10-21 16:13 ` [PATCH v4 4/7] dt-bindings: sram: Merge Renesas " Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-10-21 16:18   ` Heiko Stübner
  2019-10-21 16:13 ` [PATCH v4 6/7] dt-bindings: sram: Merge Allwinner " Krzysztof Kozlowski
                   ` (2 subsequent siblings)
  6 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Rockchip SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/sram/rockchip-smp-sram.txt       | 30 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 15 ++++++++++
 2 files changed, 15 insertions(+), 30 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt

diff --git a/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt b/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt
deleted file mode 100644
index 800701ecffca..000000000000
--- a/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-Rockchip SRAM for smp bringup:
-------------------------------
-
-Rockchip's smp-capable SoCs use the first part of the sram for the bringup
-of the cores. Once the core gets powered up it executes the code that is
-residing at the very beginning of the sram.
-
-Therefore a reserved section sub-node has to be added to the mmio-sram
-declaration.
-
-Required sub-node properties:
-- compatible : should be "rockchip,rk3066-smp-sram"
-
-The rest of the properties should follow the generic mmio-sram discription
-found in Documentation/devicetree/bindings/sram/sram.txt
-
-Example:
-
-	sram: sram@10080000 {
-		compatible = "mmio-sram";
-		reg = <0x10080000 0x10000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		smp-sram@10080000 {
-			compatible = "rockchip,rk3066-smp-sram";
-			reg = <0x10080000 0x50>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index b92e3e10fbfc..1c2d8b0408c0 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -68,6 +68,7 @@ patternProperties:
           - amlogic,meson8-smp-sram
           - amlogic,meson8b-smp-sram
           - renesas,smp-sram
+          - rockchip,rk3066-smp-sram
           - samsung,exynos4210-sysram
           - samsung,exynos4210-sysram-ns
 
@@ -201,3 +202,17 @@ examples:
             reg = <0 0x10>;
         };
     };
+
+  - |
+    sram@10080000 {
+        compatible = "mmio-sram";
+        reg = <0x10080000 0x10000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+
+        smp-sram@10080000 {
+            compatible = "rockchip,rk3066-smp-sram";
+            reg = <0x10080000 0x50>;
+        };
+    };
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 6/7] dt-bindings: sram: Merge Allwinner SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
                   ` (3 preceding siblings ...)
  2019-10-21 16:13 ` [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip " Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-10-21 16:13 ` [PATCH v4 7/7] dt-bindings: sram: Merge Socionext " Krzysztof Kozlowski
  2019-10-25 17:05 ` [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Rob Herring
  6 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Allwinner SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/arm/sunxi/smp-sram.txt           | 44 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 25 +++++++++++
 2 files changed, 25 insertions(+), 44 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt

diff --git a/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt b/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt
deleted file mode 100644
index 082e6a9382d3..000000000000
--- a/Documentation/devicetree/bindings/arm/sunxi/smp-sram.txt
+++ /dev/null
@@ -1,44 +0,0 @@
-Allwinner SRAM for smp bringup:
-------------------------------------------------
-
-Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
-primary core (cpu0). Once the core gets powered up it checks if a magic
-value is set at a specific location. If it is then the BROM will jump
-to the software entry address, instead of executing a standard boot.
-
-Therefore a reserved section sub-node has to be added to the mmio-sram
-declaration.
-
-Note that this is separate from the Allwinner SRAM controller found in
-../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to
-any device.
-
-Also there are no "secure-only" properties. The implementation should
-check if this SRAM is usable first.
-
-Required sub-node properties:
-- compatible : depending on the SoC this should be one of:
-		"allwinner,sun9i-a80-smp-sram"
-
-The rest of the properties should follow the generic mmio-sram discription
-found in ../../misc/sram.txt
-
-Example:
-
-	sram_b: sram@20000 {
-		/* 256 KiB secure SRAM at 0x20000 */
-		compatible = "mmio-sram";
-		reg = <0x00020000 0x40000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x00020000 0x40000>;
-
-		smp-sram@1000 {
-			/*
-			 * This is checked by BROM to determine if
-			 * cpu0 should jump to SMP entry vector
-			 */
-			compatible = "allwinner,sun9i-a80-smp-sram";
-			reg = <0x1000 0x8>;
-		};
-	};
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index 1c2d8b0408c0..95d8cc7e2b87 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -65,6 +65,7 @@ patternProperties:
           Should contain a vendor specific string in the form
           <vendor>,[<device>-]<usage>
         enum:
+          - allwinner,sun9i-a80-smp-sram
           - amlogic,meson8-smp-sram
           - amlogic,meson8b-smp-sram
           - renesas,smp-sram
@@ -216,3 +217,27 @@ examples:
             reg = <0x10080000 0x50>;
         };
     };
+
+  - |
+    // Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
+    // primary core (cpu0). Once the core gets powered up it checks if a magic
+    // value is set at a specific location. If it is then the BROM will jump
+    // to the software entry address, instead of executing a standard boot.
+    //
+    // Also there are no "secure-only" properties. The implementation should
+    // check if this SRAM is usable first.
+    sram@20000 {
+        // 256 KiB secure SRAM at 0x20000
+        compatible = "mmio-sram";
+        reg = <0x00020000 0x40000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x00020000 0x40000>;
+
+        smp-sram@1000 {
+            // This is checked by BROM to determine if
+            // cpu0 should jump to SMP entry vector
+            compatible = "allwinner,sun9i-a80-smp-sram";
+            reg = <0x1000 0x8>;
+        };
+    };
-- 
2.17.1


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 7/7] dt-bindings: sram: Merge Socionext SRAM bindings into generic
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
                   ` (4 preceding siblings ...)
  2019-10-21 16:13 ` [PATCH v4 6/7] dt-bindings: sram: Merge Allwinner " Krzysztof Kozlowski
@ 2019-10-21 16:13 ` Krzysztof Kozlowski
  2019-10-25 17:05 ` [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Rob Herring
  6 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-10-21 16:13 UTC (permalink / raw)
  To: Rob Herring, Mark Rutland, Maxime Ripard, Chen-Yu Tsai,
	Heiko Stuebner, Krzysztof Kozlowski, devicetree, linux-kernel,
	linux-arm-kernel, linux-rockchip

The Socionext SRAM bindings list only compatible so integrate them into
generic SRAM bindings schema.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v3:
1. New patch
---
 .../bindings/sram/milbeaut-smp-sram.txt       | 24 -------------------
 .../devicetree/bindings/sram/sram.yaml        | 15 ++++++++++++
 2 files changed, 15 insertions(+), 24 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt

diff --git a/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt b/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt
deleted file mode 100644
index 194f6a3c1c1e..000000000000
--- a/Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt
+++ /dev/null
@@ -1,24 +0,0 @@
-Milbeaut SRAM for smp bringup
-
-Milbeaut SoCs use a part of the sram for the bringup of the secondary cores.
-Once they get powered up in the bootloader, they stay at the specific part
-of the sram.
-Therefore the part needs to be added as the sub-node of mmio-sram.
-
-Required sub-node properties:
-- compatible : should be "socionext,milbeaut-smp-sram"
-
-Example:
-
-        sram: sram@0 {
-                compatible = "mmio-sram";
-                reg = <0x0 0x10000>;
-                #address-cells = <1>;
-                #size-cells = <1>;
-                ranges = <0 0x0 0x10000>;
-
-                smp-sram@f100 {
-                        compatible = "socionext,milbeaut-smp-sram";
-                        reg = <0xf100 0x20>;
-                };
-        };
diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
index 95d8cc7e2b87..de39e06c1ed9 100644
--- a/Documentation/devicetree/bindings/sram/sram.yaml
+++ b/Documentation/devicetree/bindings/sram/sram.yaml
@@ -72,6 +72,7 @@ patternProperties:
           - rockchip,rk3066-smp-sram
           - samsung,exynos4210-sysram
           - samsung,exynos4210-sysram-ns
+          - socionext,milbeaut-smp-sram
 
       reg:
         description:
@@ -241,3 +242,17 @@ examples:
             reg = <0x1000 0x8>;
         };
     };
+
+  - |
+    sram@0 {
+        compatible = "mmio-sram";
+        reg = <0x0 0x10000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges = <0 0x0 0x10000>;
+
+        smp-sram@f100 {
+            compatible = "socionext,milbeaut-smp-sram";
+            reg = <0xf100 0x20>;
+        };
+    };
-- 
2.17.1


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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip SRAM bindings into generic
  2019-10-21 16:13 ` [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip " Krzysztof Kozlowski
@ 2019-10-21 16:18   ` Heiko Stübner
  0 siblings, 0 replies; 12+ messages in thread
From: Heiko Stübner @ 2019-10-21 16:18 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Mark Rutland, devicetree, linux-kernel, Maxime Ripard,
	linux-rockchip, Chen-Yu Tsai, Rob Herring, linux-arm-kernel

Am Montag, 21. Oktober 2019, 18:13:49 CEST schrieb Krzysztof Kozlowski:
> The Rockchip SRAM bindings list only compatible so integrate them into
> generic SRAM bindings schema.
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Acked-by: Heiko Stuebner <heiko@sntech.de>

> 
> ---
> 
> Changes since v3:
> 1. New patch
> ---
>  .../bindings/sram/rockchip-smp-sram.txt       | 30 -------------------
>  .../devicetree/bindings/sram/sram.yaml        | 15 ++++++++++
>  2 files changed, 15 insertions(+), 30 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt
> 
> diff --git a/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt b/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt
> deleted file mode 100644
> index 800701ecffca..000000000000
> --- a/Documentation/devicetree/bindings/sram/rockchip-smp-sram.txt
> +++ /dev/null
> @@ -1,30 +0,0 @@
> -Rockchip SRAM for smp bringup:
> -------------------------------
> -
> -Rockchip's smp-capable SoCs use the first part of the sram for the bringup
> -of the cores. Once the core gets powered up it executes the code that is
> -residing at the very beginning of the sram.
> -
> -Therefore a reserved section sub-node has to be added to the mmio-sram
> -declaration.
> -
> -Required sub-node properties:
> -- compatible : should be "rockchip,rk3066-smp-sram"
> -
> -The rest of the properties should follow the generic mmio-sram discription
> -found in Documentation/devicetree/bindings/sram/sram.txt
> -
> -Example:
> -
> -	sram: sram@10080000 {
> -		compatible = "mmio-sram";
> -		reg = <0x10080000 0x10000>;
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		ranges;
> -
> -		smp-sram@10080000 {
> -			compatible = "rockchip,rk3066-smp-sram";
> -			reg = <0x10080000 0x50>;
> -		};
> -	};
> diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml
> index b92e3e10fbfc..1c2d8b0408c0 100644
> --- a/Documentation/devicetree/bindings/sram/sram.yaml
> +++ b/Documentation/devicetree/bindings/sram/sram.yaml
> @@ -68,6 +68,7 @@ patternProperties:
>            - amlogic,meson8-smp-sram
>            - amlogic,meson8b-smp-sram
>            - renesas,smp-sram
> +          - rockchip,rk3066-smp-sram
>            - samsung,exynos4210-sysram
>            - samsung,exynos4210-sysram-ns
>  
> @@ -201,3 +202,17 @@ examples:
>              reg = <0 0x10>;
>          };
>      };
> +
> +  - |
> +    sram@10080000 {
> +        compatible = "mmio-sram";
> +        reg = <0x10080000 0x10000>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges;
> +
> +        smp-sram@10080000 {
> +            compatible = "rockchip,rk3066-smp-sram";
> +            reg = <0x10080000 0x50>;
> +        };
> +    };
> 





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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema
  2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
                   ` (5 preceding siblings ...)
  2019-10-21 16:13 ` [PATCH v4 7/7] dt-bindings: sram: Merge Socionext " Krzysztof Kozlowski
@ 2019-10-25 17:05 ` Rob Herring
  6 siblings, 0 replies; 12+ messages in thread
From: Rob Herring @ 2019-10-25 17:05 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-rockchip

On Mon, 21 Oct 2019 18:13:45 +0200, Krzysztof Kozlowski wrote:
> Convert generic mmio-sram bindings to DT schema format using
> json-schema.  Require the address/size cells to be 1, not equal to root
> node.  This also fixes the check for clocks property to be in main root
> node instead of children.
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> 
> ---
> 
> Changes since v3:
> 1. Integrate Samsung SRAM bindings here,
> 2. Move 'clocks' one level up (error in previous bindings),
> 3. Add 'additionalProperties: false',
> 4. Fix names of children in examples,
> 5. Fix children nodes address pattern,
> 6. Address other review comments
> 
> Changes since v2:
> 1. Add Rob as maintainer,
> 2. Use "contains" for compatible,
> 3. Fix address and size cells to 1,
> 4. Add maxitems to reg under children,
> 5. Remove unneeded string type from label.
> 
> Changes since v1:
> 1. Indent example with four spaces (more readable).
> ---
>  .../devicetree/bindings/sram/sram.txt         |  80 ----------
>  .../devicetree/bindings/sram/sram.yaml        | 137 ++++++++++++++++++
>  2 files changed, 137 insertions(+), 80 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/sram/sram.txt
>  create mode 100644 Documentation/devicetree/bindings/sram/sram.yaml
> 

Applied the series, thanks.

Rob

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 4/7] dt-bindings: sram: Merge Renesas SRAM bindings into generic
  2019-10-21 16:13 ` [PATCH v4 4/7] dt-bindings: sram: Merge Renesas " Krzysztof Kozlowski
@ 2019-11-01 10:08   ` Geert Uytterhoeven
  2019-11-01 10:53     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 12+ messages in thread
From: Geert Uytterhoeven @ 2019-11-01 10:08 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Heiko Stuebner, Linux Kernel Mailing List, Maxime Ripard,
	open list:ARM/Rockchip SoC...,
	Chen-Yu Tsai, Rob Herring, Linux ARM

Hi Krzysztof,

On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> The Renesas SRAM bindings list only compatible so integrate them into
> generic SRAM bindings schema.
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.

> --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> +++ /dev/null
> @@ -1,27 +0,0 @@
> -* Renesas SMP SRAM
> -
> -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> -for secondary CPU bringup and CPU hotplug.
> -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> -Documentation/devicetree/bindings/sram/sram.txt.
> -
> -Required child node properties:
> -  - compatible: Must be "renesas,smp-sram",
> -  - reg: Address and length of the reserved SRAM.
> -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> -
> -
> -Example:
> -
> -       icram1: sram@e63c0000 {
> -               compatible = "mmio-sram";
> -               reg = <0 0xe63c0000 0 0x1000>;
> -               #address-cells = <1>;
> -               #size-cells = <1>;
> -               ranges = <0 0 0xe63c0000 0x1000>;
> -
> -               smp-sram@0 {
> -                       compatible = "renesas,smp-sram";
> -                       reg = <0 0x10>;
> -               };

> --- a/Documentation/devicetree/bindings/sram/sram.yaml
> +++ b/Documentation/devicetree/bindings/sram/sram.yaml

> @@ -186,3 +187,17 @@ examples:
>              reg = <0x1ff80 0x8>;
>          };
>      };
> +
> +  - |
> +    sram@e63c0000 {
> +        compatible = "mmio-sram";
> +        reg = <0xe63c0000 0x1000>;

Is there any specific reason you converted the example from 64-bit to
32-bit addressing?
All Renesas SoCs using this have #address-cells and #size-cells = <2>.

Thanks!

> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0 0xe63c0000 0x1000>;
> +
> +        smp-sram@0 {
> +            compatible = "renesas,smp-sram";
> +            reg = <0 0x10>;
> +        };
> +    };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 4/7] dt-bindings: sram: Merge Renesas SRAM bindings into generic
  2019-11-01 10:08   ` Geert Uytterhoeven
@ 2019-11-01 10:53     ` Krzysztof Kozlowski
  2019-11-01 11:01       ` Geert Uytterhoeven
  0 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2019-11-01 10:53 UTC (permalink / raw)
  To: Geert Uytterhoeven
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Heiko Stuebner, Linux Kernel Mailing List, Maxime Ripard,
	open list:ARM/Rockchip SoC...,
	Chen-Yu Tsai, Rob Herring, Linux ARM

On Fri, 1 Nov 2019 at 11:08, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Krzysztof,
>
> On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > The Renesas SRAM bindings list only compatible so integrate them into
> > generic SRAM bindings schema.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
>
> Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
> sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.
>
> > --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> > +++ /dev/null
> > @@ -1,27 +0,0 @@
> > -* Renesas SMP SRAM
> > -
> > -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> > -for secondary CPU bringup and CPU hotplug.
> > -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> > -Documentation/devicetree/bindings/sram/sram.txt.
> > -
> > -Required child node properties:
> > -  - compatible: Must be "renesas,smp-sram",
> > -  - reg: Address and length of the reserved SRAM.
> > -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> > -
> > -
> > -Example:
> > -
> > -       icram1: sram@e63c0000 {
> > -               compatible = "mmio-sram";
> > -               reg = <0 0xe63c0000 0 0x1000>;
> > -               #address-cells = <1>;
> > -               #size-cells = <1>;
> > -               ranges = <0 0 0xe63c0000 0x1000>;
> > -
> > -               smp-sram@0 {
> > -                       compatible = "renesas,smp-sram";
> > -                       reg = <0 0x10>;
> > -               };
>
> > --- a/Documentation/devicetree/bindings/sram/sram.yaml
> > +++ b/Documentation/devicetree/bindings/sram/sram.yaml
>
> > @@ -186,3 +187,17 @@ examples:
> >              reg = <0x1ff80 0x8>;
> >          };
> >      };
> > +
> > +  - |
> > +    sram@e63c0000 {
> > +        compatible = "mmio-sram";
> > +        reg = <0xe63c0000 0x1000>;
>
> Is there any specific reason you converted the example from 64-bit to
> 32-bit addressing?
> All Renesas SoCs using this have #address-cells and #size-cells = <2>.

I should mention it in commit msg. The reason is because examples are
compiled inside a {} with address/size cells of 1. Instead of
conversion maybe it would be reasonable to put it inside additional
node adjusting the address/size cells.

Best regards,
Krzysztof

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 4/7] dt-bindings: sram: Merge Renesas SRAM bindings into generic
  2019-11-01 10:53     ` Krzysztof Kozlowski
@ 2019-11-01 11:01       ` Geert Uytterhoeven
  0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2019-11-01 11:01 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Mark Rutland,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Heiko Stuebner, Linux Kernel Mailing List, Maxime Ripard,
	open list:ARM/Rockchip SoC...,
	Chen-Yu Tsai, Rob Herring, Linux ARM

Hi Krzysztof,

On Fri, Nov 1, 2019 at 11:54 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> On Fri, 1 Nov 2019 at 11:08, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Mon, Oct 21, 2019 at 6:15 PM Krzysztof Kozlowski <krzk@kernel.org> wrote:
> > > The Renesas SRAM bindings list only compatible so integrate them into
> > > generic SRAM bindings schema.
> > >
> > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> >
> > Thanks for your patch, whcih is now commit 0759b09eadd0d9a1 ("dt-bindings:
> > sram: Merge Renesas SRAM bindings into generic") in Rob's for-next branch.
> >
> > > --- a/Documentation/devicetree/bindings/sram/renesas,smp-sram.txt
> > > +++ /dev/null
> > > @@ -1,27 +0,0 @@
> > > -* Renesas SMP SRAM
> > > -
> > > -Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
> > > -for secondary CPU bringup and CPU hotplug.
> > > -This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
> > > -Documentation/devicetree/bindings/sram/sram.txt.
> > > -
> > > -Required child node properties:
> > > -  - compatible: Must be "renesas,smp-sram",
> > > -  - reg: Address and length of the reserved SRAM.
> > > -    The full physical (bus) address must be aligned to a 256 KiB boundary.
> > > -
> > > -
> > > -Example:
> > > -
> > > -       icram1: sram@e63c0000 {
> > > -               compatible = "mmio-sram";
> > > -               reg = <0 0xe63c0000 0 0x1000>;
> > > -               #address-cells = <1>;
> > > -               #size-cells = <1>;
> > > -               ranges = <0 0 0xe63c0000 0x1000>;
> > > -
> > > -               smp-sram@0 {
> > > -                       compatible = "renesas,smp-sram";
> > > -                       reg = <0 0x10>;
> > > -               };
> >
> > > --- a/Documentation/devicetree/bindings/sram/sram.yaml
> > > +++ b/Documentation/devicetree/bindings/sram/sram.yaml
> >
> > > @@ -186,3 +187,17 @@ examples:
> > >              reg = <0x1ff80 0x8>;
> > >          };
> > >      };
> > > +
> > > +  - |
> > > +    sram@e63c0000 {
> > > +        compatible = "mmio-sram";
> > > +        reg = <0xe63c0000 0x1000>;
> >
> > Is there any specific reason you converted the example from 64-bit to
> > 32-bit addressing?
> > All Renesas SoCs using this have #address-cells and #size-cells = <2>.
>
> I should mention it in commit msg. The reason is because examples are
> compiled inside a {} with address/size cells of 1. Instead of

Thanks, that's what I was already afraid of...

> conversion maybe it would be reasonable to put it inside additional
> node adjusting the address/size cells.

I think it's fine to leave it as-as, though.  If we ever get to DT-ize
secondary CPU startup on EMMA Mobile EV2 or SH-Mobile AG5, we'll have
users without LPAE ;-)

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2019-11-01 11:01 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-21 16:13 [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Krzysztof Kozlowski
2019-10-21 16:13 ` [PATCH v4 2/7] dt-bindings: sram: Merge Samsung SRAM bindings into generic Krzysztof Kozlowski
2019-10-21 16:13 ` [PATCH v4 3/7] dt-bindings: sram: Merge Amlogic " Krzysztof Kozlowski
2019-10-21 16:13 ` [PATCH v4 4/7] dt-bindings: sram: Merge Renesas " Krzysztof Kozlowski
2019-11-01 10:08   ` Geert Uytterhoeven
2019-11-01 10:53     ` Krzysztof Kozlowski
2019-11-01 11:01       ` Geert Uytterhoeven
2019-10-21 16:13 ` [PATCH v4 5/7] dt-bindings: sram: Merge Rockchip " Krzysztof Kozlowski
2019-10-21 16:18   ` Heiko Stübner
2019-10-21 16:13 ` [PATCH v4 6/7] dt-bindings: sram: Merge Allwinner " Krzysztof Kozlowski
2019-10-21 16:13 ` [PATCH v4 7/7] dt-bindings: sram: Merge Socionext " Krzysztof Kozlowski
2019-10-25 17:05 ` [PATCH v4 1/7] dt-bindings: sram: Convert SRAM bindings to json-schema Rob Herring

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