* [PATCH 01/14] clocksource/drivers/timer-ti-32k: Add support for initializing directly
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support Tony Lindgren
` (13 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
Let's allow probing the 32k counter directly based on devicetree data to
prepare for dropping the related legacy platform code. Let's only do this
if the parent node is compatible with ti-sysc to make sure we have the
related devicetree data available.
Let's also show the 32k counter information before registering the
clocksource, now we see it after the clocksource information which is a
bit confusing.
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/clocksource/timer-ti-32k.c | 48 +++++++++++++++++++++++++++++-
1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c
--- a/drivers/clocksource/timer-ti-32k.c
+++ b/drivers/clocksource/timer-ti-32k.c
@@ -24,6 +24,7 @@
* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
*/
+#include <linux/clk.h>
#include <linux/init.h>
#include <linux/time.h>
#include <linux/sched_clock.h>
@@ -76,6 +77,49 @@ static u64 notrace omap_32k_read_sched_clock(void)
return ti_32k_read_cycles(&ti_32k_timer.cs);
}
+static void __init ti_32k_timer_enable_clock(struct device_node *np,
+ const char *name)
+{
+ struct clk *clock;
+ int error;
+
+ clock = of_clk_get_by_name(np->parent, name);
+ if (IS_ERR(clock)) {
+ /* Only some SoCs have a separate interface clock */
+ if (PTR_ERR(clock) == -EINVAL && !strncmp("ick", name, 3))
+ return;
+
+ pr_warn("%s: could not get clock %s %li\n",
+ __func__, name, PTR_ERR(clock));
+ return;
+ }
+
+ error = clk_prepare_enable(clock);
+ if (error) {
+ pr_warn("%s: could not enable %s: %i\n",
+ __func__, name, error);
+ return;
+ }
+}
+
+static void __init ti_32k_timer_module_init(struct device_node *np,
+ void __iomem *base)
+{
+ void __iomem *sysc = base + 4;
+
+ if (!of_device_is_compatible(np->parent, "ti,sysc"))
+ return;
+
+ ti_32k_timer_enable_clock(np, "fck");
+ ti_32k_timer_enable_clock(np, "ick");
+
+ /*
+ * Force idle module as wkup domain is active with MPU.
+ * No need to tag the module disabled for ti-sysc probe.
+ */
+ writel_relaxed(0, sysc);
+}
+
static int __init ti_32k_timer_init(struct device_node *np)
{
int ret;
@@ -90,6 +134,7 @@ static int __init ti_32k_timer_init(struct device_node *np)
ti_32k_timer.cs.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP;
ti_32k_timer.counter = ti_32k_timer.base;
+ ti_32k_timer_module_init(np, ti_32k_timer.base);
/*
* 32k sync Counter IP register offsets vary between the highlander
@@ -104,6 +149,8 @@ static int __init ti_32k_timer_init(struct device_node *np)
else
ti_32k_timer.counter += OMAP2_32KSYNCNT_CR_OFF_LOW;
+ pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
+
ret = clocksource_register_hz(&ti_32k_timer.cs, 32768);
if (ret) {
pr_err("32k_counter: can't register clocksource\n");
@@ -111,7 +158,6 @@ static int __init ti_32k_timer_init(struct device_node *np)
}
sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
- pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
return 0;
}
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
2020-04-17 16:55 ` [PATCH 01/14] clocksource/drivers/timer-ti-32k: Add support for initializing directly Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-27 9:18 ` Daniel Lezcano
2020-04-17 16:55 ` [PATCH 03/14] clk: ti: dm816: enable sysclk6_ck on init Tony Lindgren
` (12 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
We can move the TI dmtimer clockevent and clocksource to live under
drivers/clocksource if we rely only on the clock framework, and handle
the module configuration directly in the clocksource driver.
This removes the early dependency with system timers to the interconnect
related code, and we can probe pretty much everything else later on at
the module_init level.
Let's first add a new driver for timer-ti-dm-systimer based on existing
arch/arm/mach-omap2/timer.c. Then let's start moving SoCs to probe with
device tree data while still keeping the old timer.c. And eventually we
can just drop the old timer.c.
Note the boards can optionally configure the timer source clock in using
assigned-clock-parents.
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
.../devicetree/bindings/timer/ti,timer.txt | 2 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-ti-dm-systimer.c | 468 ++++++++++++++++++
include/clocksource/timer-ti-dm.h | 1 +
4 files changed, 472 insertions(+)
create mode 100644 drivers/clocksource/timer-ti-dm-systimer.c
diff --git a/Documentation/devicetree/bindings/timer/ti,timer.txt b/Documentation/devicetree/bindings/timer/ti,timer.txt
--- a/Documentation/devicetree/bindings/timer/ti,timer.txt
+++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
@@ -14,6 +14,8 @@ Required properties:
ti,omap5430-timer (applicable to OMAP543x devices)
ti,am335x-timer (applicable to AM335x devices)
ti,am335x-timer-1ms (applicable to AM335x devices)
+ ti,dmtimer-clockevent (when used as for clockevent)
+ ti,dmtimer-clocksource (when used as for clocksource)
- reg: Contains timer register address range (base address and
length).
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
+obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm-systimer.o
obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
obj-$(CONFIG_FTTMR010_TIMER) += timer-fttmr010.o
diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksource/timer-ti-dm-systimer.c
new file mode 100644
--- /dev/null
+++ b/drivers/clocksource/timer-ti-dm-systimer.c
@@ -0,0 +1,468 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <linux/clk.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+
+#include <linux/clk/clk-conf.h>
+
+#include <clocksource/timer-ti-dm.h>
+#include <dt-bindings/bus/ti-sysc.h>
+
+/* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
+#define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \
+ SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)
+
+#define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)
+#define DMTIMER_RESET_WAIT 100000
+
+struct dmtimer_clockevent {
+ struct clock_event_device dev;
+ struct omap_dm_timer timer;
+};
+
+struct dmtimer_clocksource {
+ struct clocksource dev;
+ struct omap_dm_timer timer;
+ unsigned int loadval;
+};
+
+static int dmtimer_systimer_type1_reset(struct omap_dm_timer *timer)
+{
+ void __iomem *syss = timer->io_base + OMAP_TIMER_V1_SYS_STAT_OFFSET;
+ int ret;
+ u32 l;
+
+ __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0x06, 0);
+ ret = readl_poll_timeout_atomic(syss, l, l & BIT(0), 100,
+ DMTIMER_RESET_WAIT);
+
+ return ret;
+}
+
+/* Note we must use io_base instead of func_base for type2 OCP regs */
+static int dmtimer_systimer_type2_reset(struct omap_dm_timer *timer)
+{
+ void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
+ u32 l;
+
+ return readl_poll_timeout_atomic(sysc, l, !(l & BIT(0)), 100,
+ DMTIMER_RESET_WAIT);
+}
+
+static int dmtimer_systimer_reset(struct omap_dm_timer *timer)
+{
+ int ret;
+
+ if (timer->revision == 1)
+ ret = dmtimer_systimer_type1_reset(timer);
+ else
+ ret = dmtimer_systimer_type2_reset(timer);
+ if (ret < 0) {
+ pr_err("%s failed with %i\n", __func__, ret);
+
+ return ret;
+ }
+
+ timer->posted = 0;
+
+ return 0;
+}
+
+/* Interface clocks are only available on some SoCs variants */
+static int __init dmtimer_systimer_init_clock(struct omap_dm_timer *timer,
+ struct device_node *np,
+ struct clk **clk,
+ const char *name)
+{
+ struct clk *clock;
+ int error;
+
+ clock = of_clk_get_by_name(np, name);
+ if ((PTR_ERR(clock) == -EINVAL) && !strncmp(name, "ick", 3))
+ return 0;
+ else if (IS_ERR(clock))
+ return PTR_ERR(clock);
+
+ error = clk_prepare_enable(clock);
+ if (error)
+ return error;
+
+ *clk = clock;
+
+ return 0;
+}
+
+static void dmtimer_systimer_enable(struct omap_dm_timer *timer)
+{
+ void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
+ u32 val;
+
+ if (timer->revision == 1)
+ val = DMTIMER_TYPE1_ENABLE;
+ else
+ val = DMTIMER_TYPE2_ENABLE;
+
+ writel_relaxed(val, sysc);
+}
+
+static void dmtimer_systimer_disable(struct omap_dm_timer *timer)
+{
+ void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
+
+ writel_relaxed(0, sysc);
+}
+
+static int __init dmtimer_systimer_tag_disabled(struct device_node *np)
+{
+ struct property *prop;
+
+ prop = kzalloc(sizeof(*prop), GFP_KERNEL);
+ if (!prop)
+ return -ENOMEM;
+
+ prop->name = "status";
+ prop->value = "disabled";
+ prop->length = strlen(prop->value);
+
+ return of_add_property(np, prop);
+}
+
+static int __init dmtimer_systimer_init(struct omap_dm_timer *timer,
+ struct device_node *np)
+{
+ int error;
+
+ if (!of_device_is_compatible(np->parent, "ti,sysc"))
+ return -EINVAL;
+
+ /*
+ * Enable optional assigned-clock-parents configured at the timer
+ * node level. For regular device drivers, this is done automatically
+ * by bus related code such as platform_drv_probe().
+ */
+ error = of_clk_set_defaults(np, false);
+ if (error < 0)
+ pr_err("%s: clock source init failed: %i\n", __func__, error);
+
+ /* For ti-sysc, we have timer clocks at the parent module level */
+ error = dmtimer_systimer_init_clock(timer, np->parent,
+ &timer->fclk, "fck");
+ if (error)
+ return error;
+
+ timer->rate = clk_get_rate(timer->fclk);
+
+ error = dmtimer_systimer_init_clock(timer, np->parent,
+ &timer->iclk, "ick");
+ if (error)
+ return error;
+
+ __omap_dm_timer_init_regs(timer);
+ dmtimer_systimer_enable(timer);
+ dmtimer_systimer_reset(timer);
+ pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(timer->io_base),
+ readl_relaxed(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET));
+
+ if (of_find_property(np, "ti,timer-alwon", NULL))
+ timer->capability |= OMAP_TIMER_ALWON;
+
+ /* Tag parent interconnect target module disabled for ti-sysc */
+ error = dmtimer_systimer_tag_disabled(np->parent);
+ if (error)
+ pr_err("%s: failed to set %pOF disabled: %i\n",
+ __func__, np, error);
+
+ return 0;
+}
+
+/* Clockevent */
+static struct dmtimer_clockevent *
+to_dmtimer_clockevent(struct clock_event_device *clockevent)
+{
+ return container_of(clockevent, struct dmtimer_clockevent, dev);
+}
+
+static struct omap_dm_timer *
+clockevent_to_dm_timer(struct clock_event_device *evt)
+{
+ struct dmtimer_clockevent *dmtce = to_dmtimer_clockevent(evt);
+
+ return &dmtce->timer;
+}
+
+static irqreturn_t dmtimer_clockevent_interrupt(int irq, void *data)
+{
+ struct dmtimer_clockevent *dmtce = data;
+
+ __omap_dm_timer_write_status(&dmtce->timer, OMAP_TIMER_INT_OVERFLOW);
+ dmtce->dev.event_handler(&dmtce->dev);
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction dmtimer_clockevent_irq = {
+ .name = "gp_timer",
+ .flags = IRQF_TIMER | IRQF_IRQPOLL,
+ .handler = dmtimer_clockevent_interrupt,
+};
+
+static int dmtimer_set_next_event(unsigned long cycles,
+ struct clock_event_device *evt)
+{
+ struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
+
+ __omap_dm_timer_load_start(timer, OMAP_TIMER_CTRL_ST,
+ 0xffffffff - cycles, OMAP_TIMER_POSTED);
+
+ return 0;
+}
+
+static int dmtimer_clockevent_shutdown(struct clock_event_device *evt)
+{
+ struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
+
+ __omap_dm_timer_stop(timer, OMAP_TIMER_POSTED, timer->rate);
+
+ return 0;
+}
+
+static int dmtimer_set_periodic(struct clock_event_device *evt)
+{
+ struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
+ u32 period;
+
+ __omap_dm_timer_stop(timer, OMAP_TIMER_POSTED, timer->rate);
+
+ period = timer->rate / HZ;
+ period -= 1;
+ /* Looks like we need to first set the load value separately */
+ __omap_dm_timer_write(timer, OMAP_TIMER_LOAD_REG, 0xffffffff - period,
+ OMAP_TIMER_POSTED);
+ __omap_dm_timer_load_start(timer,
+ OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
+ 0xffffffff - period, OMAP_TIMER_POSTED);
+ return 0;
+}
+
+static void omap_clockevent_idle(struct clock_event_device *evt)
+{
+ struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
+
+ dmtimer_systimer_disable(timer);
+}
+
+static void omap_clockevent_unidle(struct clock_event_device *evt)
+{
+ struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
+
+ dmtimer_systimer_enable(timer);
+ __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW);
+}
+
+static int __init dmtimer_clockevent_init(struct device_node *np)
+{
+ struct dmtimer_clockevent *clkevt;
+ struct clock_event_device *evt;
+ struct omap_dm_timer *timer;
+ int error;
+ u32 pa;
+
+ clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL | __GFP_NOFAIL);
+ if (!clkevt)
+ return -ENOMEM;
+
+ timer = &clkevt->timer;
+ evt = &clkevt->dev;
+
+ evt->features = CLOCK_EVT_FEAT_PERIODIC |
+ CLOCK_EVT_FEAT_ONESHOT;
+ evt->rating = 300;
+ evt->set_next_event = dmtimer_set_next_event;
+ evt->set_state_shutdown = dmtimer_clockevent_shutdown;
+ evt->set_state_periodic = dmtimer_set_periodic;
+ evt->set_state_oneshot = dmtimer_clockevent_shutdown;
+ evt->tick_resume = dmtimer_clockevent_shutdown;
+ evt->cpumask = cpu_possible_mask;
+ evt->irq = timer->irq;
+
+ timer->irq = irq_of_parse_and_map(np, 0);
+ if (!timer->irq) {
+ error = -ENXIO;
+ goto err_out_free;
+ }
+
+ timer->io_base = of_iomap(np, 0);
+ if (!timer->io_base) {
+ error = -ENXIO;
+ goto err_out_free;
+ }
+
+ error = dmtimer_systimer_init(timer, np);
+ if (error)
+ goto err_out_unmap;
+
+ /*
+ * For clock-event timers we never read the timer counter and
+ * so we are not impacted by errata i103 and i767. Therefore,
+ * we can safely ignore this errata for clock-event timers.
+ */
+ __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767);
+
+ dmtimer_clockevent_irq.dev_id = clkevt;
+ setup_irq(timer->irq, &dmtimer_clockevent_irq);
+
+ __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW);
+
+ pa = of_translate_address(np, of_get_address(np, 0, NULL, NULL));
+ pr_info("TI gptimer clockevent: %stimer@%08x at %lu Hz\n",
+ timer->capability & OMAP_TIMER_ALWON ? "always-on " : "",
+ pa, timer->rate);
+
+ clockevents_config_and_register(evt, timer->rate,
+ 3, /* Timer internal resynch latency */
+ 0xffffffff);
+
+ if (of_device_is_compatible(np, "ti,am33xx") ||
+ of_device_is_compatible(np, "ti,am43")) {
+ evt->suspend = omap_clockevent_idle;
+ evt->resume = omap_clockevent_unidle;
+ }
+
+ return 0;
+
+err_out_unmap:
+ iounmap(timer->io_base);
+err_out_free:
+ kfree(clkevt);
+
+ return error;
+}
+
+/* Clocksource */
+static struct dmtimer_clocksource *
+to_dmtimer_clocksource(struct clocksource *cs)
+{
+ return container_of(cs, struct dmtimer_clocksource, dev);
+}
+
+static struct omap_dm_timer *
+clocksource_to_dmtimer(struct clocksource *cs)
+{
+ struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
+
+ return &clksrc->timer;
+}
+
+static u64 dmtimer_clocksource_read_cycles(struct clocksource *cs)
+{
+ struct omap_dm_timer *timer = clocksource_to_dmtimer(cs);
+
+ return (u64)__omap_dm_timer_read_counter(timer,
+ OMAP_TIMER_NONPOSTED);
+}
+
+static void __iomem *dmtimer_sched_clock_counter;
+
+static u64 notrace dmtimer_read_sched_clock(void)
+{
+ return readl_relaxed(dmtimer_sched_clock_counter);
+}
+
+static void dmtimer_clocksource_suspend(struct clocksource *cs)
+{
+ struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
+ struct omap_dm_timer *timer = &clksrc->timer;
+
+ clksrc->loadval =
+ __omap_dm_timer_read_counter(timer, OMAP_TIMER_NONPOSTED);
+ dmtimer_systimer_disable(timer);
+}
+
+static void dmtimer_clocksource_resume(struct clocksource *cs)
+{
+ struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
+ struct omap_dm_timer *timer = &clksrc->timer;
+
+ dmtimer_systimer_enable(timer);
+ __omap_dm_timer_load_start(timer,
+ OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR,
+ clksrc->loadval,
+ OMAP_TIMER_NONPOSTED);
+}
+
+static int __init dmtimer_clocksource_init(struct device_node *np)
+{
+ struct dmtimer_clocksource *clksrc;
+ struct omap_dm_timer *timer;
+ struct clocksource *dev;
+ int error;
+ u32 pa;
+
+ clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL | __GFP_NOFAIL);
+ if (!clksrc)
+ return -ENOMEM;
+
+ timer = &clksrc->timer;
+ dev = &clksrc->dev;
+
+ timer->io_base = of_iomap(np, 0);
+ if (!timer->io_base) {
+ pr_err("%s: could not iomap\n", __func__);
+ return -ENODEV;
+ }
+
+ error = dmtimer_systimer_init(timer, np);
+ if (error)
+ goto err_out_unmap;
+
+ dev->name = "dmtimer";
+ dev->rating = 300;
+ dev->read = dmtimer_clocksource_read_cycles;
+ dev->mask = CLOCKSOURCE_MASK(32);
+ dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+ if (of_device_is_compatible(np, "ti,am33xx") ||
+ of_device_is_compatible(np, "ti,am43")) {
+ dev->suspend = dmtimer_clocksource_suspend;
+ dev->resume = dmtimer_clocksource_resume;
+ }
+
+ __omap_dm_timer_load_start(timer,
+ OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
+ OMAP_TIMER_NONPOSTED);
+
+ pa = of_translate_address(np, of_get_address(np, 0, NULL, NULL));
+ pr_info("TI gptimer clocksource: %stimer@%08x %lu at Hz\n",
+ timer->capability & OMAP_TIMER_ALWON ?
+ "always-on " : "", pa, timer->rate);
+
+ if (!dmtimer_sched_clock_counter) {
+ /* Mask out write pending bits for raw OMAP_TIMER_COUNTER_REG */
+ dmtimer_sched_clock_counter =
+ timer->func_base + (OMAP_TIMER_COUNTER_REG & 0xff);
+ sched_clock_register(dmtimer_read_sched_clock, 32, timer->rate);
+ }
+
+ if (clocksource_register_hz(dev, timer->rate))
+ pr_err("Could not register clocksource %pOF\n", np);
+
+ return 0;
+
+err_out_unmap:
+ iounmap(timer->io_base);
+
+ return -ENODEV;
+}
+
+TIMER_OF_DECLARE(dmtimer_clockevent, "ti,dmtimer-clockevent",
+ dmtimer_clockevent_init);
+TIMER_OF_DECLARE(dmtimer_clocksource, "ti,dmtimer-clocksource",
+ dmtimer_clocksource_init);
diff --git a/include/clocksource/timer-ti-dm.h b/include/clocksource/timer-ti-dm.h
--- a/include/clocksource/timer-ti-dm.h
+++ b/include/clocksource/timer-ti-dm.h
@@ -97,6 +97,7 @@ struct omap_dm_timer {
int id;
int irq;
struct clk *fclk;
+ struct clk *iclk;
void __iomem *io_base;
void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-17 16:55 ` [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support Tony Lindgren
@ 2020-04-27 9:18 ` Daniel Lezcano
2020-04-27 14:31 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Daniel Lezcano @ 2020-04-27 9:18 UTC (permalink / raw)
To: Tony Lindgren, linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, linux-kernel, Tero Kristo, Stephen Boyd,
Andreas Kemnade, H. Nikolaus Schaller, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
Hi Tony,
On 17/04/2020 18:55, Tony Lindgren wrote:
> We can move the TI dmtimer clockevent and clocksource to live under
> drivers/clocksource if we rely only on the clock framework, and handle
> the module configuration directly in the clocksource driver.
>
> This removes the early dependency with system timers to the interconnect
> related code, and we can probe pretty much everything else later on at
> the module_init level.
>
> Let's first add a new driver for timer-ti-dm-systimer based on existing
> arch/arm/mach-omap2/timer.c. Then let's start moving SoCs to probe with
> device tree data while still keeping the old timer.c. And eventually we
> can just drop the old timer.c.
>
> Note the boards can optionally configure the timer source clock in using
> assigned-clock-parents.
>
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-omap@vger.kernel.org
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Keerthy <j-keerthy@ti.com>
> Cc: Lokesh Vutla <lokeshvutla@ti.com>
> Cc: Tero Kristo <t-kristo@ti.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
> .../devicetree/bindings/timer/ti,timer.txt | 2 +
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/timer-ti-dm-systimer.c | 468 ++++++++++++++++++
> include/clocksource/timer-ti-dm.h | 1 +
> 4 files changed, 472 insertions(+)
> create mode 100644 drivers/clocksource/timer-ti-dm-systimer.c
>
> diff --git a/Documentation/devicetree/bindings/timer/ti,timer.txt b/Documentation/devicetree/bindings/timer/ti,timer.txt
> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> @@ -14,6 +14,8 @@ Required properties:
> ti,omap5430-timer (applicable to OMAP543x devices)
> ti,am335x-timer (applicable to AM335x devices)
> ti,am335x-timer-1ms (applicable to AM335x devices)
> + ti,dmtimer-clockevent (when used as for clockevent)
> + ti,dmtimer-clocksource (when used as for clocksource)
Please, submit a separate patch for this.
Before you resend as is, this will be nacked as clocksource / clockevent
is not a hardware description but a Linux thing.
Finding a way to characterize that from the DT is an endless discussion
since years, so I suggest to use a single property for the timer eg
<ti,dmtimer> and initialize the clocksource and the clockevent in the
driver.
> - reg: Contains timer register address range (base address and
> length).
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -18,6 +18,7 @@ obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
> obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
> obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
> obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
> +obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm-systimer.o
> obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
> obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
> obj-$(CONFIG_FTTMR010_TIMER) += timer-fttmr010.o
> diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksource/timer-ti-dm-systimer.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/clocksource/timer-ti-dm-systimer.c
> @@ -0,0 +1,468 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +#include <linux/clk.h>
> +#include <linux/clocksource.h>
> +#include <linux/clockchips.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/err.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/sched_clock.h>
> +
> +#include <linux/clk/clk-conf.h>
> +
> +#include <clocksource/timer-ti-dm.h>
> +#include <dt-bindings/bus/ti-sysc.h>
> +
> +/* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
> +#define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \
> + SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)
> +
> +#define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)
> +#define DMTIMER_RESET_WAIT 100000
> +
> +struct dmtimer_clockevent {
> + struct clock_event_device dev;
> + struct omap_dm_timer timer;
> +};
> +
> +struct dmtimer_clocksource {
> + struct clocksource dev;
> + struct omap_dm_timer timer;
The usage of the timer field is to use the __omap_dm_timer_* helpers
function which does a busy looping on the status before read/write the
register. AFAICS, for the clocksource, the posted argument is zero, thus
it is possible to replace the calls to these helpers to a write / read
and perhaps the struct omap_dm_timer could be removed from the
clocksource structure.
The driver gets obfuscated by calls to helpers which does 'posted' things.
Why not remove those and handle the case in the driver to make it
self-encapsuled and remove the omap_dm_timer structure usage in this driver.
> + unsigned int loadval;
> +};
> +
> +static int dmtimer_systimer_type1_reset(struct omap_dm_timer *timer)
> +{
> + void __iomem *syss = timer->io_base + OMAP_TIMER_V1_SYS_STAT_OFFSET;
> + int ret;
> + u32 l;
> +
> + __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG, 0x06, 0);
As the last argument is zero, may be take the opportunity to do a direct
call to writel?
> + ret = readl_poll_timeout_atomic(syss, l, l & BIT(0), 100,
> + DMTIMER_RESET_WAIT);
> +
> + return ret;
> +}
> +
> +/* Note we must use io_base instead of func_base for type2 OCP regs */
> +static int dmtimer_systimer_type2_reset(struct omap_dm_timer *timer)
> +{
> + void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
> + u32 l;
> +
Isn't missing a write here ?
> + return readl_poll_timeout_atomic(sysc, l, !(l & BIT(0)), 100,
> + DMTIMER_RESET_WAIT);
> +}
> +
> +static int dmtimer_systimer_reset(struct omap_dm_timer *timer)
> +{
> + int ret;
> +
> + if (timer->revision == 1)
> + ret = dmtimer_systimer_type1_reset(timer);
> + else
> + ret = dmtimer_systimer_type2_reset(timer);
> + if (ret < 0) {
> + pr_err("%s failed with %i\n", __func__, ret);
> +
> + return ret;
> + }
> +
> + timer->posted = 0;
> +
> + return 0;
> +}
> +
> +/* Interface clocks are only available on some SoCs variants */
> +static int __init dmtimer_systimer_init_clock(struct omap_dm_timer *timer,
The timer argument is not used
> + struct device_node *np,
> + struct clk **clk,
> + const char *name)
> +{
> + struct clk *clock;
> + int error;
> +
> + clock = of_clk_get_by_name(np, name);
> + if ((PTR_ERR(clock) == -EINVAL) && !strncmp(name, "ick", 3))
> + return 0;
> + else if (IS_ERR(clock))
> + return PTR_ERR(clock);
> +
> + error = clk_prepare_enable(clock);
> + if (error)
> + return error;
> +
> + *clk = clock;
> +
> + return 0;
> +}
> +
> +static void dmtimer_systimer_enable(struct omap_dm_timer *timer)
> +{
> + void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
> + u32 val;
> +
> + if (timer->revision == 1)
> + val = DMTIMER_TYPE1_ENABLE;
> + else
> + val = DMTIMER_TYPE2_ENABLE;
> +
> + writel_relaxed(val, sysc);
> +}
> +
> +static void dmtimer_systimer_disable(struct omap_dm_timer *timer)
> +{
> + void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
> +
> + writel_relaxed(0, sysc);
> +}
> +
> +static int __init dmtimer_systimer_tag_disabled(struct device_node *np)
> +{
> + struct property *prop;
> +
> + prop = kzalloc(sizeof(*prop), GFP_KERNEL);
> + if (!prop)
> + return -ENOMEM;
> +
> + prop->name = "status";
> + prop->value = "disabled";
> + prop->length = strlen(prop->value);
> +
> + return of_add_property(np, prop);
Why not add this property in the DT instead ? That sounds hackish
> +}
> +
> +static int __init dmtimer_systimer_init(struct omap_dm_timer *timer,
> + struct device_node *np)
> +{
> + int error;
> +
> + if (!of_device_is_compatible(np->parent, "ti,sysc"))
> + return -EINVAL;
> +
> + /*
> + * Enable optional assigned-clock-parents configured at the timer
> + * node level. For regular device drivers, this is done automatically
> + * by bus related code such as platform_drv_probe().
> + */
> + error = of_clk_set_defaults(np, false);
> + if (error < 0)
> + pr_err("%s: clock source init failed: %i\n", __func__, error);
> +
> + /* For ti-sysc, we have timer clocks at the parent module level */
> + error = dmtimer_systimer_init_clock(timer, np->parent,
> + &timer->fclk, "fck");
> + if (error)
> + return error;
> +
> + timer->rate = clk_get_rate(timer->fclk);
check rate == 0 for error ?
> +
> + error = dmtimer_systimer_init_clock(timer, np->parent,
> + &timer->iclk, "ick");
> + if (error)
> + return error;
> +
> + __omap_dm_timer_init_regs(timer);
readl_relaxed(timer->io_base) to get the revision ? And then get rid of
all the helpers thing ?
> + dmtimer_systimer_enable(timer);
> + dmtimer_systimer_reset(timer);
> + pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(timer->io_base),
> + readl_relaxed(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET));
> +
> + if (of_find_property(np, "ti,timer-alwon", NULL))
> + timer->capability |= OMAP_TIMER_ALWON;
Where is used this capability in this driver ?
> + /* Tag parent interconnect target module disabled for ti-sysc */
> + error = dmtimer_systimer_tag_disabled(np->parent);
> + if (error)
> + pr_err("%s: failed to set %pOF disabled: %i\n",
> + __func__, np, error);
> +
> + return 0;
> +}
> +
> +/* Clockevent */
> +static struct dmtimer_clockevent *
> +to_dmtimer_clockevent(struct clock_event_device *clockevent)
> +{
> + return container_of(clockevent, struct dmtimer_clockevent, dev);
> +}
> +
> +static struct omap_dm_timer *
> +clockevent_to_dm_timer(struct clock_event_device *evt)
> +{
> + struct dmtimer_clockevent *dmtce = to_dmtimer_clockevent(evt);
> +
> + return &dmtce->timer;
> +}
> +
> +static irqreturn_t dmtimer_clockevent_interrupt(int irq, void *data)
> +{
> + struct dmtimer_clockevent *dmtce = data;
> +
> + __omap_dm_timer_write_status(&dmtce->timer, OMAP_TIMER_INT_OVERFLOW);
Please replace with a writel()
> + dmtce->dev.event_handler(&dmtce->dev);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static struct irqaction dmtimer_clockevent_irq = {
> + .name = "gp_timer",
> + .flags = IRQF_TIMER | IRQF_IRQPOLL,
Why do you need IRQF_IRQPOLL ?
> + .handler = dmtimer_clockevent_interrupt,
> +};
> +
> +static int dmtimer_set_next_event(unsigned long cycles,
> + struct clock_event_device *evt)
> +{
> + struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
> +
> + __omap_dm_timer_load_start(timer, OMAP_TIMER_CTRL_ST,
> + 0xffffffff - cycles, OMAP_TIMER_POSTED);
> +
> + return 0;
> +}
> +
> +static int dmtimer_clockevent_shutdown(struct clock_event_device *evt)
> +{
> + struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
> +
> + __omap_dm_timer_stop(timer, OMAP_TIMER_POSTED, timer->rate);
> +
> + return 0;
> +}
> +
> +static int dmtimer_set_periodic(struct clock_event_device *evt)
> +{
> + struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
> + u32 period;
> +
> + __omap_dm_timer_stop(timer, OMAP_TIMER_POSTED, timer->rate);
> +
> + period = timer->rate / HZ;
> + period -= 1;
DIV_ROUND_CLOSEST(rate, HZ); ?
> + /* Looks like we need to first set the load value separately */
> + __omap_dm_timer_write(timer, OMAP_TIMER_LOAD_REG, 0xffffffff - period,
> + OMAP_TIMER_POSTED);
> + __omap_dm_timer_load_start(timer,
> + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
> + 0xffffffff - period, OMAP_TIMER_POSTED);
> + return 0;
> +}
> +
> +static void omap_clockevent_idle(struct clock_event_device *evt)
> +{
> + struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
> +
> + dmtimer_systimer_disable(timer);
> +}
> +
> +static void omap_clockevent_unidle(struct clock_event_device *evt)
> +{
> + struct omap_dm_timer *timer = clockevent_to_dm_timer(evt);
> +
> + dmtimer_systimer_enable(timer);
> + __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW);
> +}
> +
> +static int __init dmtimer_clockevent_init(struct device_node *np)
> +{
> + struct dmtimer_clockevent *clkevt;
> + struct clock_event_device *evt;
> + struct omap_dm_timer *timer;
> + int error;
> + u32 pa;
> +
> + clkevt = kzalloc(sizeof(*clkevt), GFP_KERNEL | __GFP_NOFAIL);
Remove __GFP_NOFAIL
> + if (!clkevt)
> + return -ENOMEM;
> +
> + timer = &clkevt->timer;
> + evt = &clkevt->dev;
> +
> + evt->features = CLOCK_EVT_FEAT_PERIODIC |
> + CLOCK_EVT_FEAT_ONESHOT;
> + evt->rating = 300;
> + evt->set_next_event = dmtimer_set_next_event;
> + evt->set_state_shutdown = dmtimer_clockevent_shutdown;
> + evt->set_state_periodic = dmtimer_set_periodic;
> + evt->set_state_oneshot = dmtimer_clockevent_shutdown;
> + evt->tick_resume = dmtimer_clockevent_shutdown;
> + evt->cpumask = cpu_possible_mask;
You may consider the CLOCK_EVT_FEAT_DYNIRQ flag
> + evt->irq = timer->irq;
> +
> + timer->irq = irq_of_parse_and_map(np, 0);
> + if (!timer->irq) {
> + error = -ENXIO;
> + goto err_out_free;
> + }
> +
> + timer->io_base = of_iomap(np, 0);
> + if (!timer->io_base) {
> + error = -ENXIO;
> + goto err_out_free;
> + }
> +
> + error = dmtimer_systimer_init(timer, np);
> + if (error)
> + goto err_out_unmap;
> +
> + /*
> + * For clock-event timers we never read the timer counter and
> + * so we are not impacted by errata i103 and i767. Therefore,
> + * we can safely ignore this errata for clock-event timers.
> + */
> + __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767);
Without all these omap_... helpers you would not have to set this
> + dmtimer_clockevent_irq.dev_id = clkevt;
> + setup_irq(timer->irq, &dmtimer_clockevent_irq);
request_irq
> + __omap_dm_timer_int_enable(timer, OMAP_TIMER_INT_OVERFLOW);
> +
> + pa = of_translate_address(np, of_get_address(np, 0, NULL, NULL));
> + pr_info("TI gptimer clockevent: %stimer@%08x at %lu Hz\n",
> + timer->capability & OMAP_TIMER_ALWON ? "always-on " : "",
> + pa, timer->rate);
%pOF instead of of_translate_address ?
> + clockevents_config_and_register(evt, timer->rate,
> + 3, /* Timer internal resynch latency */
> + 0xffffffff);
> +
> + if (of_device_is_compatible(np, "ti,am33xx") ||
> + of_device_is_compatible(np, "ti,am43")) {
> + evt->suspend = omap_clockevent_idle;
> + evt->resume = omap_clockevent_unidle;
> + }
> +
> + return 0;
> +
> +err_out_unmap:
> + iounmap(timer->io_base);
> +err_out_free:
> + kfree(clkevt);
> +
> + return error;
> +}
> +
> +/* Clocksource */
> +static struct dmtimer_clocksource *
> +to_dmtimer_clocksource(struct clocksource *cs)
> +{
> + return container_of(cs, struct dmtimer_clocksource, dev);
> +}
> +
> +static struct omap_dm_timer *
> +clocksource_to_dmtimer(struct clocksource *cs)
> +{
> + struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
> +
> + return &clksrc->timer;
> +}
> +
> +static u64 dmtimer_clocksource_read_cycles(struct clocksource *cs)
> +{
> + struct omap_dm_timer *timer = clocksource_to_dmtimer(cs);
> +
> + return (u64)__omap_dm_timer_read_counter(timer,
> + OMAP_TIMER_NONPOSTED);
> +}
> +
> +static void __iomem *dmtimer_sched_clock_counter;
> +
> +static u64 notrace dmtimer_read_sched_clock(void)
> +{
> + return readl_relaxed(dmtimer_sched_clock_counter);
> +}
> +
> +static void dmtimer_clocksource_suspend(struct clocksource *cs)
> +{
> + struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
> + struct omap_dm_timer *timer = &clksrc->timer;
> +
> + clksrc->loadval =
> + __omap_dm_timer_read_counter(timer, OMAP_TIMER_NONPOSTED);
> + dmtimer_systimer_disable(timer);
> +}
> +
> +static void dmtimer_clocksource_resume(struct clocksource *cs)
> +{
> + struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
> + struct omap_dm_timer *timer = &clksrc->timer;
> +
> + dmtimer_systimer_enable(timer);
> + __omap_dm_timer_load_start(timer,
> + OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR,
> + clksrc->loadval,
> + OMAP_TIMER_NONPOSTED);
> +}
> +
> +static int __init dmtimer_clocksource_init(struct device_node *np)
> +{
> + struct dmtimer_clocksource *clksrc;
> + struct omap_dm_timer *timer;
> + struct clocksource *dev;
> + int error;
> + u32 pa;
> +
> + clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL | __GFP_NOFAIL);
> + if (!clksrc)
> + return -ENOMEM;
> +
> + timer = &clksrc->timer;
> + dev = &clksrc->dev;
> +
> + timer->io_base = of_iomap(np, 0);
> + if (!timer->io_base) {
> + pr_err("%s: could not iomap\n", __func__);
> + return -ENODEV;
> + }
> +
> + error = dmtimer_systimer_init(timer, np);
> + if (error)
> + goto err_out_unmap;
> +
> + dev->name = "dmtimer";
> + dev->rating = 300;
> + dev->read = dmtimer_clocksource_read_cycles;
> + dev->mask = CLOCKSOURCE_MASK(32);
> + dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;
> +
> + if (of_device_is_compatible(np, "ti,am33xx") ||
> + of_device_is_compatible(np, "ti,am43")) {
> + dev->suspend = dmtimer_clocksource_suspend;
> + dev->resume = dmtimer_clocksource_resume;
> + }
> + __omap_dm_timer_load_start(timer,
> + OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
> + OMAP_TIMER_NONPOSTED);
> +
> + pa = of_translate_address(np, of_get_address(np, 0, NULL, NULL));
> + pr_info("TI gptimer clocksource: %stimer@%08x %lu at Hz\n",
%pOF instead of of_translate_address ?
> + timer->capability & OMAP_TIMER_ALWON ?
> + "always-on " : "", pa, timer->rate);
> +
> + if (!dmtimer_sched_clock_counter) {
> + /* Mask out write pending bits for raw OMAP_TIMER_COUNTER_REG */
> + dmtimer_sched_clock_counter =
> + timer->func_base + (OMAP_TIMER_COUNTER_REG & 0xff);
> + sched_clock_register(dmtimer_read_sched_clock, 32, timer->rate);
> + }
> +
> + if (clocksource_register_hz(dev, timer->rate))
> + pr_err("Could not register clocksource %pOF\n", np);
> +
> + return 0;
> +
> +err_out_unmap:
> + iounmap(timer->io_base);
> +
> + return -ENODEV;
> +}
> +
> +TIMER_OF_DECLARE(dmtimer_clockevent, "ti,dmtimer-clockevent",
> + dmtimer_clockevent_init);
> +TIMER_OF_DECLARE(dmtimer_clocksource, "ti,dmtimer-clocksource",
> + dmtimer_clocksource_init);
> diff --git a/include/clocksource/timer-ti-dm.h b/include/clocksource/timer-ti-dm.h
> --- a/include/clocksource/timer-ti-dm.h
> +++ b/include/clocksource/timer-ti-dm.h
> @@ -97,6 +97,7 @@ struct omap_dm_timer {
> int id;
> int irq;
> struct clk *fclk;
> + struct clk *iclk;
No need of these clocks in the structure as they are used only to
initialize.
> void __iomem *io_base;
> void __iomem *irq_stat; /* TISR/IRQSTATUS interrupt status */
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-27 9:18 ` Daniel Lezcano
@ 2020-04-27 14:31 ` Tony Lindgren
2020-04-27 15:02 ` Daniel Lezcano
0 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2020-04-27 14:31 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Rob Herring, devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, linux-kernel, Tero Kristo, Stephen Boyd,
Andreas Kemnade, H. Nikolaus Schaller, Thomas Gleixner,
linux-omap, Adam Ford, linux-clk, linux-arm-kernel
Hi,
* Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
> On 17/04/2020 18:55, Tony Lindgren wrote:
> > --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> > +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> > @@ -14,6 +14,8 @@ Required properties:
> > ti,omap5430-timer (applicable to OMAP543x devices)
> > ti,am335x-timer (applicable to AM335x devices)
> > ti,am335x-timer-1ms (applicable to AM335x devices)
> > + ti,dmtimer-clockevent (when used as for clockevent)
> > + ti,dmtimer-clocksource (when used as for clocksource)
>
> Please, submit a separate patch for this.
>
> Before you resend as is, this will be nacked as clocksource / clockevent
> is not a hardware description but a Linux thing.
>
> Finding a way to characterize that from the DT is an endless discussion
> since years, so I suggest to use a single property for the timer eg
> <ti,dmtimer> and initialize the clocksource and the clockevent in the
> driver.
Hmm good point. We still need to specify which timer is a clocksource
and which one a clockevent somehow.
Maybe we could have a generic properties like the clock framework such as:
assigned-system-clocksource
assigned-system-clockevent
Or do we already have something similar that can be used?
> > diff --git a/drivers/clocksource/timer-ti-dm-systimer.c b/drivers/clocksource/timer-ti-dm-systimer.c
> > new file mode 100644
> > --- /dev/null
> > +++ b/drivers/clocksource/timer-ti-dm-systimer.c
> > +struct dmtimer_clocksource {
> > + struct clocksource dev;
> > + struct omap_dm_timer timer;
>
> The usage of the timer field is to use the __omap_dm_timer_* helpers
> function which does a busy looping on the status before read/write the
> register. AFAICS, for the clocksource, the posted argument is zero, thus
> it is possible to replace the calls to these helpers to a write / read
> and perhaps the struct omap_dm_timer could be removed from the
> clocksource structure.
>
> The driver gets obfuscated by calls to helpers which does 'posted' things.
>
> Why not remove those and handle the case in the driver to make it
> self-encapsuled and remove the omap_dm_timer structure usage in this driver.
Hmm that's a good comment indeed. If we can just use readl/writel for
clockevent and clocksource driver without worrying about the posted mode
flags, we can make all the old helpers static for the generic dmtimer
driver. I'll take a look.
> > +static int dmtimer_systimer_type2_reset(struct omap_dm_timer *timer)
> > +{
> > + void __iomem *sysc = timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET;
> > + u32 l;
> > +
>
> Isn't missing a write here ?
Oops thanks for spotting it. Without that the mode can be whatever left
over from the bootloader.
> > +static int __init dmtimer_systimer_tag_disabled(struct device_node *np)
> > +{
> > + struct property *prop;
> > +
> > + prop = kzalloc(sizeof(*prop), GFP_KERNEL);
> > + if (!prop)
> > + return -ENOMEM;
> > +
> > + prop->name = "status";
> > + prop->value = "disabled";
> > + prop->length = strlen(prop->value);
> > +
> > + return of_add_property(np, prop);
>
> Why not add this property in the DT instead ? That sounds hackish
Yes that's a good point too. We need to configure the source clock anyways
for the clocksource and clockevent in devicetree anyways, so setting it
disabled there totally makes sense.
> > + dmtimer_systimer_enable(timer);
> > + dmtimer_systimer_reset(timer);
> > + pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(timer->io_base),
> > + readl_relaxed(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET));
> > +
> > + if (of_find_property(np, "ti,timer-alwon", NULL))
> > + timer->capability |= OMAP_TIMER_ALWON;
>
> Where is used this capability in this driver ?
That is just something we should show in dmesg for info as that helps to
understand the board specific system timer configuration for PM related
issues folks end up reporting.
> > +static struct irqaction dmtimer_clockevent_irq = {
> > + .name = "gp_timer",
> > + .flags = IRQF_TIMER | IRQF_IRQPOLL,
>
> Why do you need IRQF_IRQPOLL ?
I'll check if that's needed. Probably just something that has mutated into
the old timer code somehow.
> > + pa = of_translate_address(np, of_get_address(np, 0, NULL, NULL));
> > + pr_info("TI gptimer clockevent: %stimer@%08x at %lu Hz\n",
> > + timer->capability & OMAP_TIMER_ALWON ? "always-on " : "",
> > + pa, timer->rate);
>
> %pOF instead of of_translate_address ?
That just 0 from the interconnect target module here. But doing %pOF
on the np->parent should work here and for the clocksource.
> > diff --git a/include/clocksource/timer-ti-dm.h b/include/clocksource/timer-ti-dm.h
> > --- a/include/clocksource/timer-ti-dm.h
> > +++ b/include/clocksource/timer-ti-dm.h
> > @@ -97,6 +97,7 @@ struct omap_dm_timer {
> > int id;
> > int irq;
> > struct clk *fclk;
> > + struct clk *iclk;
>
> No need of these clocks in the structure as they are used only to
> initialize.
OK I'll make them local.
Thanks for the review! I'll fix up the other issues you spotted too,
they all seem good comments.
Regards,
Tony
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-27 14:31 ` Tony Lindgren
@ 2020-04-27 15:02 ` Daniel Lezcano
2020-04-27 15:23 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Daniel Lezcano @ 2020-04-27 15:02 UTC (permalink / raw)
To: Tony Lindgren
Cc: Rob Herring, devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, linux-kernel, Tero Kristo, Stephen Boyd,
Andreas Kemnade, H. Nikolaus Schaller, Thomas Gleixner,
linux-omap, Adam Ford, linux-clk, linux-arm-kernel
On 27/04/2020 16:31, Tony Lindgren wrote:
> Hi,
>
> * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
>> On 17/04/2020 18:55, Tony Lindgren wrote:
>>> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
>>> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
>>> @@ -14,6 +14,8 @@ Required properties:
>>> ti,omap5430-timer (applicable to OMAP543x devices)
>>> ti,am335x-timer (applicable to AM335x devices)
>>> ti,am335x-timer-1ms (applicable to AM335x devices)
>>> + ti,dmtimer-clockevent (when used as for clockevent)
>>> + ti,dmtimer-clocksource (when used as for clocksource)
>>
>> Please, submit a separate patch for this.
>>
>> Before you resend as is, this will be nacked as clocksource / clockevent
>> is not a hardware description but a Linux thing.
>>
>> Finding a way to characterize that from the DT is an endless discussion
>> since years, so I suggest to use a single property for the timer eg
>> <ti,dmtimer> and initialize the clocksource and the clockevent in the
>> driver.
>
> Hmm good point. We still need to specify which timer is a clocksource
> and which one a clockevent somehow.
>
> Maybe we could have a generic properties like the clock framework such as:
>
> assigned-system-clocksource
> assigned-system-clockevent
I think that will be the same problem :/
Is it possible to check the interrupt for the clockevent ? A timer node
with the interrrupt is the clockevent, without it is a clocksource.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-27 15:02 ` Daniel Lezcano
@ 2020-04-27 15:23 ` Tony Lindgren
2020-04-30 14:00 ` Rob Herring
0 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2020-04-27 15:23 UTC (permalink / raw)
To: Daniel Lezcano
Cc: Rob Herring, devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, linux-kernel, Tero Kristo, Stephen Boyd,
Andreas Kemnade, H. Nikolaus Schaller, Thomas Gleixner,
linux-omap, Adam Ford, linux-clk, linux-arm-kernel
* Daniel Lezcano <daniel.lezcano@linaro.org> [200427 15:03]:
> On 27/04/2020 16:31, Tony Lindgren wrote:
> > Hi,
> >
> > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
> >> On 17/04/2020 18:55, Tony Lindgren wrote:
> >>> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> >>> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> >>> @@ -14,6 +14,8 @@ Required properties:
> >>> ti,omap5430-timer (applicable to OMAP543x devices)
> >>> ti,am335x-timer (applicable to AM335x devices)
> >>> ti,am335x-timer-1ms (applicable to AM335x devices)
> >>> + ti,dmtimer-clockevent (when used as for clockevent)
> >>> + ti,dmtimer-clocksource (when used as for clocksource)
> >>
> >> Please, submit a separate patch for this.
> >>
> >> Before you resend as is, this will be nacked as clocksource / clockevent
> >> is not a hardware description but a Linux thing.
> >>
> >> Finding a way to characterize that from the DT is an endless discussion
> >> since years, so I suggest to use a single property for the timer eg
> >> <ti,dmtimer> and initialize the clocksource and the clockevent in the
> >> driver.
> >
> > Hmm good point. We still need to specify which timer is a clocksource
> > and which one a clockevent somehow.
> >
> > Maybe we could have a generic properties like the clock framework such as:
> >
> > assigned-system-clocksource
> > assigned-system-clockevent
>
> I think that will be the same problem :/
Seems like other SoCs have the same issue too with multiple timers
to configure.
> Is it possible to check the interrupt for the clockevent ? A timer node
> with the interrrupt is the clockevent, without it is a clocksource.
OK let's try that. So the configuration would become then:
compatible = "ti,dmtimer; /* reserved for system timers */
/delete-property/interrupts; /* ok so it's a clocksource */
/delete-property/interrupts-extended;
Regards,
Tony
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-27 15:23 ` Tony Lindgren
@ 2020-04-30 14:00 ` Rob Herring
2020-04-30 15:31 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Rob Herring @ 2020-04-30 14:00 UTC (permalink / raw)
To: Tony Lindgren
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, linux-omap, Adam Ford, linux-clk,
linux-arm-kernel
On Mon, Apr 27, 2020 at 08:23:29AM -0700, Tony Lindgren wrote:
> * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 15:03]:
> > On 27/04/2020 16:31, Tony Lindgren wrote:
> > > Hi,
> > >
> > > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
> > >> On 17/04/2020 18:55, Tony Lindgren wrote:
> > >>> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> > >>> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> > >>> @@ -14,6 +14,8 @@ Required properties:
> > >>> ti,omap5430-timer (applicable to OMAP543x devices)
> > >>> ti,am335x-timer (applicable to AM335x devices)
> > >>> ti,am335x-timer-1ms (applicable to AM335x devices)
> > >>> + ti,dmtimer-clockevent (when used as for clockevent)
> > >>> + ti,dmtimer-clocksource (when used as for clocksource)
> > >>
> > >> Please, submit a separate patch for this.
> > >>
> > >> Before you resend as is, this will be nacked as clocksource / clockevent
> > >> is not a hardware description but a Linux thing.
> > >>
> > >> Finding a way to characterize that from the DT is an endless discussion
> > >> since years, so I suggest to use a single property for the timer eg
> > >> <ti,dmtimer> and initialize the clocksource and the clockevent in the
> > >> driver.
> > >
> > > Hmm good point. We still need to specify which timer is a clocksource
> > > and which one a clockevent somehow.
> > >
> > > Maybe we could have a generic properties like the clock framework such as:
> > >
> > > assigned-system-clocksource
> > > assigned-system-clockevent
> >
> > I think that will be the same problem :/
>
> Seems like other SoCs have the same issue too with multiple timers
> to configure.
>
> > Is it possible to check the interrupt for the clockevent ? A timer node
> > with the interrrupt is the clockevent, without it is a clocksource.
>
> OK let's try that. So the configuration would become then:
>
> compatible = "ti,dmtimer; /* reserved for system timers */
> /delete-property/interrupts; /* ok so it's a clocksource */
> /delete-property/interrupts-extended;
That's not really what was meant.
Let's say you have N timers. Either every timer is exactly the same and
the OS can just assign them however it wants or there is some difference
in the h/w making certain timer better for certain functions. Describe
that difference. It could be clock rate, number of counter bits, always
on, secure mode access only, has or doesn't have output compare or input
capture, etc.
Rob
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-30 14:00 ` Rob Herring
@ 2020-04-30 15:31 ` Tony Lindgren
2020-05-01 13:18 ` Rob Herring
0 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2020-04-30 15:31 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, linux-omap, Adam Ford, linux-clk,
linux-arm-kernel
* Rob Herring <robh@kernel.org> [200430 14:01]:
> On Mon, Apr 27, 2020 at 08:23:29AM -0700, Tony Lindgren wrote:
> > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 15:03]:
> > > On 27/04/2020 16:31, Tony Lindgren wrote:
> > > > Hi,
> > > >
> > > > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
> > > >> On 17/04/2020 18:55, Tony Lindgren wrote:
> > > >>> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> > > >>> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> > > >>> @@ -14,6 +14,8 @@ Required properties:
> > > >>> ti,omap5430-timer (applicable to OMAP543x devices)
> > > >>> ti,am335x-timer (applicable to AM335x devices)
> > > >>> ti,am335x-timer-1ms (applicable to AM335x devices)
> > > >>> + ti,dmtimer-clockevent (when used as for clockevent)
> > > >>> + ti,dmtimer-clocksource (when used as for clocksource)
> > > >>
> > > >> Please, submit a separate patch for this.
> > > >>
> > > >> Before you resend as is, this will be nacked as clocksource / clockevent
> > > >> is not a hardware description but a Linux thing.
> > > >>
> > > >> Finding a way to characterize that from the DT is an endless discussion
> > > >> since years, so I suggest to use a single property for the timer eg
> > > >> <ti,dmtimer> and initialize the clocksource and the clockevent in the
> > > >> driver.
> > > >
> > > > Hmm good point. We still need to specify which timer is a clocksource
> > > > and which one a clockevent somehow.
> > > >
> > > > Maybe we could have a generic properties like the clock framework such as:
> > > >
> > > > assigned-system-clocksource
> > > > assigned-system-clockevent
> > >
> > > I think that will be the same problem :/
> >
> > Seems like other SoCs have the same issue too with multiple timers
> > to configure.
> >
> > > Is it possible to check the interrupt for the clockevent ? A timer node
> > > with the interrrupt is the clockevent, without it is a clocksource.
> >
> > OK let's try that. So the configuration would become then:
> >
> > compatible = "ti,dmtimer; /* reserved for system timers */
> > /delete-property/interrupts; /* ok so it's a clocksource */
> > /delete-property/interrupts-extended;
>
> That's not really what was meant.
OK, so let's figure out something better then.
> Let's say you have N timers. Either every timer is exactly the same and
> the OS can just assign them however it wants or there is some difference
> in the h/w making certain timer better for certain functions. Describe
> that difference. It could be clock rate, number of counter bits, always
> on, secure mode access only, has or doesn't have output compare or input
> capture, etc.
Hmm. Trying to detect this automatically will get messy. For example,
we have few omap3 boards with the following options that also need to
consider if the separate 32KiHz counter is available:
1. The best case scenario
ti,omap-counter32k clocksource
ti,sysc-omap2-timer ti,timer-alwon clockevent (timer1)
2. Boards relying on internal clock with unusable 32k counter
ti,sysc-omap2-timer ti,timer-alwon clocksource (timer12)
ti,sysc-omap2-timer clockevent (typically gpt2)
In the second case, the 32k counter is unusable, and timer1
is unusable with the external 32k always on clock. But timer1
can be used with the system clock just fine for other purposes.
So ideally we would not tag timer1 as disabled :)
For the second case, we could remove ti,timer-alwon property
for timer1, and tag the 32k counter as disabled as the source
clock is unreliable. Then somewhere in the code we would need
to check if ti,omap-counter32k is availabe, then check if
timer1 is always-on, then use timer12 if not a secure device
like n900.
If the board wants to use the system clock as the source for
a higher resolution with assigned-clock-parents, then we'd need
to ignore the always-on property and not use the 32k counter as
the clocksource. Basically to somehow figure out that a higher
resolution configuration is preferred over a
low-power configuration.
So what's your take on just adding the generic properties for
assigned-system-clocksource and clockevent?
Regards,
Tony
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-04-30 15:31 ` Tony Lindgren
@ 2020-05-01 13:18 ` Rob Herring
2020-05-01 14:11 ` Tony Lindgren
0 siblings, 1 reply; 25+ messages in thread
From: Rob Herring @ 2020-05-01 13:18 UTC (permalink / raw)
To: Tony Lindgren
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, linux-omap, Adam Ford, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
On Thu, Apr 30, 2020 at 10:31 AM Tony Lindgren <tony@atomide.com> wrote:
>
> * Rob Herring <robh@kernel.org> [200430 14:01]:
> > On Mon, Apr 27, 2020 at 08:23:29AM -0700, Tony Lindgren wrote:
> > > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 15:03]:
> > > > On 27/04/2020 16:31, Tony Lindgren wrote:
> > > > > Hi,
> > > > >
> > > > > * Daniel Lezcano <daniel.lezcano@linaro.org> [200427 09:19]:
> > > > >> On 17/04/2020 18:55, Tony Lindgren wrote:
> > > > >>> --- a/Documentation/devicetree/bindings/timer/ti,timer.txt
> > > > >>> +++ b/Documentation/devicetree/bindings/timer/ti,timer.txt
> > > > >>> @@ -14,6 +14,8 @@ Required properties:
> > > > >>> ti,omap5430-timer (applicable to OMAP543x devices)
> > > > >>> ti,am335x-timer (applicable to AM335x devices)
> > > > >>> ti,am335x-timer-1ms (applicable to AM335x devices)
> > > > >>> + ti,dmtimer-clockevent (when used as for clockevent)
> > > > >>> + ti,dmtimer-clocksource (when used as for clocksource)
> > > > >>
> > > > >> Please, submit a separate patch for this.
> > > > >>
> > > > >> Before you resend as is, this will be nacked as clocksource / clockevent
> > > > >> is not a hardware description but a Linux thing.
> > > > >>
> > > > >> Finding a way to characterize that from the DT is an endless discussion
> > > > >> since years, so I suggest to use a single property for the timer eg
> > > > >> <ti,dmtimer> and initialize the clocksource and the clockevent in the
> > > > >> driver.
> > > > >
> > > > > Hmm good point. We still need to specify which timer is a clocksource
> > > > > and which one a clockevent somehow.
> > > > >
> > > > > Maybe we could have a generic properties like the clock framework such as:
> > > > >
> > > > > assigned-system-clocksource
> > > > > assigned-system-clockevent
> > > >
> > > > I think that will be the same problem :/
> > >
> > > Seems like other SoCs have the same issue too with multiple timers
> > > to configure.
> > >
> > > > Is it possible to check the interrupt for the clockevent ? A timer node
> > > > with the interrrupt is the clockevent, without it is a clocksource.
> > >
> > > OK let's try that. So the configuration would become then:
> > >
> > > compatible = "ti,dmtimer; /* reserved for system timers */
> > > /delete-property/interrupts; /* ok so it's a clocksource */
> > > /delete-property/interrupts-extended;
> >
> > That's not really what was meant.
>
> OK, so let's figure out something better then.
>
> > Let's say you have N timers. Either every timer is exactly the same and
> > the OS can just assign them however it wants or there is some difference
> > in the h/w making certain timer better for certain functions. Describe
> > that difference. It could be clock rate, number of counter bits, always
> > on, secure mode access only, has or doesn't have output compare or input
> > capture, etc.
>
> Hmm. Trying to detect this automatically will get messy. For example,
> we have few omap3 boards with the following options that also need to
> consider if the separate 32KiHz counter is available:
>
> 1. The best case scenario
>
> ti,omap-counter32k clocksource
> ti,sysc-omap2-timer ti,timer-alwon clockevent (timer1)
>
> 2. Boards relying on internal clock with unusable 32k counter
>
> ti,sysc-omap2-timer ti,timer-alwon clocksource (timer12)
> ti,sysc-omap2-timer clockevent (typically gpt2)
>
> In the second case, the 32k counter is unusable, and timer1
> is unusable with the external 32k always on clock. But timer1
> can be used with the system clock just fine for other purposes.
> So ideally we would not tag timer1 as disabled :)
I'm perfectly fine with a 'broken 32k clk' type property.
Though I think the compatibility story is not good changing DT for
stuff needed to boot and needed early in boot. It's one thing to break
something not required to get a system booted.
> For the second case, we could remove ti,timer-alwon property
> for timer1, and tag the 32k counter as disabled as the source
> clock is unreliable. Then somewhere in the code we would need
> to check if ti,omap-counter32k is availabe, then check if
> timer1 is always-on, then use timer12 if not a secure device
> like n900.
IIRC, there's some OMAP timer properties for secure vs. non-secure.
(It's not the first time we've had this discussion on TI timers.)
> If the board wants to use the system clock as the source for
> a higher resolution with assigned-clock-parents, then we'd need
> to ignore the always-on property and not use the 32k counter as
> the clocksource. Basically to somehow figure out that a higher
> resolution configuration is preferred over a
> low-power configuration.
That could be something you want to pick at run-time.
> So what's your take on just adding the generic properties for
> assigned-system-clocksource and clockevent?
I'm tired of discussing this for 10 years...
Rob
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support
2020-05-01 13:18 ` Rob Herring
@ 2020-05-01 14:11 ` Tony Lindgren
0 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-05-01 14:11 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, linux-omap, Adam Ford, linux-clk,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
* Rob Herring <robh@kernel.org> [200501 13:19]:
> On Thu, Apr 30, 2020 at 10:31 AM Tony Lindgren <tony@atomide.com> wrote:
> > Hmm. Trying to detect this automatically will get messy. For example,
> > we have few omap3 boards with the following options that also need to
> > consider if the separate 32KiHz counter is available:
> >
> > 1. The best case scenario
> >
> > ti,omap-counter32k clocksource
> > ti,sysc-omap2-timer ti,timer-alwon clockevent (timer1)
> >
> > 2. Boards relying on internal clock with unusable 32k counter
> >
> > ti,sysc-omap2-timer ti,timer-alwon clocksource (timer12)
> > ti,sysc-omap2-timer clockevent (typically gpt2)
> >
> > In the second case, the 32k counter is unusable, and timer1
> > is unusable with the external 32k always on clock. But timer1
> > can be used with the system clock just fine for other purposes.
> > So ideally we would not tag timer1 as disabled :)
>
> I'm perfectly fine with a 'broken 32k clk' type property.
OK. Maybe "unreliable-oscillator" type property or something like
that. Or maybe "shrodingers-cat-oscillator" :)
> Though I think the compatibility story is not good changing DT for
> stuff needed to boot and needed early in boot. It's one thing to break
> something not required to get a system booted.
For the boards with the 32k clock issue the system boots but
is unreliable. I'm not sure how long a 32k clock based timer would
have to be monitored with another system clock based timer to
detect it.. I recall the issues start popping up with PM and
that much later and the system clock may not even be active..
Anyways, the issue is related to how the board is wired, so a
property for it makes sense here.
> > For the second case, we could remove ti,timer-alwon property
> > for timer1, and tag the 32k counter as disabled as the source
> > clock is unreliable. Then somewhere in the code we would need
> > to check if ti,omap-counter32k is availabe, then check if
> > timer1 is always-on, then use timer12 if not a secure device
> > like n900.
>
> IIRC, there's some OMAP timer properties for secure vs. non-secure.
> (It's not the first time we've had this discussion on TI timers.)
Yes.
> > If the board wants to use the system clock as the source for
> > a higher resolution with assigned-clock-parents, then we'd need
> > to ignore the always-on property and not use the 32k counter as
> > the clocksource. Basically to somehow figure out that a higher
> > resolution configuration is preferred over a
> > low-power configuration.
>
> That could be something you want to pick at run-time.
OK
> > So what's your take on just adding the generic properties for
> > assigned-system-clocksource and clockevent?
>
> I'm tired of discussing this for 10 years...
Well luckly most system have basic timers integrated nowadays
rather than each SoC vendor doing their own timers :)
Regards,
Tony
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 03/14] clk: ti: dm816: enable sysclk6_ck on init
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
2020-04-17 16:55 ` [PATCH 01/14] clocksource/drivers/timer-ti-32k: Add support for initializing directly Tony Lindgren
2020-04-17 16:55 ` [PATCH 02/14] clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-25 18:58 ` Stephen Boyd
2020-04-17 16:55 ` [PATCH 04/14] bus: ti-sysc: Ignore timer12 on secure omap3 Tony Lindgren
` (11 subsequent siblings)
14 siblings, 1 reply; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Stephen Boyd, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Lokesh Vutla, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We need sysclk6_ck enabled early as it is needed by l4_ls and system
timers early on boot. This removes the dependency of system timers to
the interconnect related code that can be then probed later on when
suitable at module_init time.
Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/clk/ti/clk-816x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/ti/clk-816x.c b/drivers/clk/ti/clk-816x.c
--- a/drivers/clk/ti/clk-816x.c
+++ b/drivers/clk/ti/clk-816x.c
@@ -73,6 +73,7 @@ static const char *enable_init_clks[] = {
"ddr_pll_clk1",
"ddr_pll_clk2",
"ddr_pll_clk3",
+ "sysclk6_ck",
};
int __init dm816x_dt_clk_init(void)
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 03/14] clk: ti: dm816: enable sysclk6_ck on init
2020-04-17 16:55 ` [PATCH 03/14] clk: ti: dm816: enable sysclk6_ck on init Tony Lindgren
@ 2020-04-25 18:58 ` Stephen Boyd
0 siblings, 0 replies; 25+ messages in thread
From: Stephen Boyd @ 2020-04-25 18:58 UTC (permalink / raw)
To: Tony Lindgren, linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Andreas Kemnade, Keerthy, Thomas Gleixner, Adam Ford, linux-clk,
linux-arm-kernel
Quoting Tony Lindgren (2020-04-17 09:55:08)
> We need sysclk6_ck enabled early as it is needed by l4_ls and system
> timers early on boot. This removes the dependency of system timers to
> the interconnect related code that can be then probed later on when
> suitable at module_init time.
>
> Cc: linux-clk@vger.kernel.org
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Tero Kristo <t-kristo@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH 04/14] bus: ti-sysc: Ignore timer12 on secure omap3
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (2 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 03/14] clk: ti: dm816: enable sysclk6_ck on init Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 05/14] ARM: OMAP2+: Add omap_init_time_of() Tony Lindgren
` (10 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
Some early omap3 boards use timer12 for system timer, but for secure
SoCs like on n900 it's not accessible. Likely we will be configuring
unavailable devices for other SoCs too based on runtime SoC detection,
so let's use a switch to start with.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/bus/ti-sysc.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -2744,6 +2744,17 @@ static int sysc_init_soc(struct sysc *ddata)
if (match && match->data)
sysc_soc->soc = (int)match->data;
+ /* Ignore devices that are not available on HS and EMU SoCs */
+ if (!sysc_soc->general_purpose) {
+ switch (sysc_soc->soc) {
+ case SOC_3430 ... SOC_3630:
+ sysc_add_disabled(0x48304000); /* timer12 */
+ break;
+ default:
+ break;
+ };
+ }
+
match = soc_device_match(sysc_soc_feat_match);
if (!match)
return 0;
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 05/14] ARM: OMAP2+: Add omap_init_time_of()
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (3 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 04/14] bus: ti-sysc: Ignore timer12 on secure omap3 Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 06/14] ARM: dts: Configure system timers for am335x Tony Lindgren
` (9 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
This allows us to move the SoCs to probe system timers one SoC
at at time. As arch/arm/mach-omap2/timer.c will be eventually gone,
let's just add omap_init_time_of() to board-generic.c directly.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/board-generic.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -12,6 +12,7 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/irqdomain.h>
+#include <linux/clocksource.h>
#include <asm/setup.h>
#include <asm/mach/arch.h>
@@ -31,6 +32,13 @@ static void __init __maybe_unused omap_generic_init(void)
omap_soc_device_init();
}
+/* Clocks are needed early, see drivers/clocksource for the rest */
+void __init __maybe_unused omap_init_time_of(void)
+{
+ omap_clk_init();
+ timer_probe();
+}
+
#ifdef CONFIG_SOC_OMAP2420
static const char *const omap242x_boards_compat[] __initconst = {
"ti,omap2420",
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 06/14] ARM: dts: Configure system timers for am335x
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (4 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 05/14] ARM: OMAP2+: Add omap_init_time_of() Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 07/14] ARM: dts: Configure system timers for am437x Tony Lindgren
` (8 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Cc: devicetree@vger.kernel.org
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/am33xx-l4.dtsi | 2 --
arch/arm/boot/dts/am33xx.dtsi | 12 ++++++++++++
arch/arm/mach-omap2/board-generic.c | 2 +-
.../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 --
arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 10 ----------
5 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
--- a/arch/arm/boot/dts/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
@@ -332,7 +332,6 @@ scm_clockdomains: clockdomains {
target-module@31000 { /* 0x44e31000, ap 25 40.0 */
compatible = "ti,sysc-omap2-timer", "ti,sysc";
- ti,hwmods = "timer1";
reg = <0x31000 0x4>,
<0x31010 0x4>,
<0x31014 0x4>;
@@ -1119,7 +1118,6 @@ mcasp1: mcasp@0 {
target-module@40000 { /* 0x48040000, ap 22 1e.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer2";
reg = <0x40000 0x4>,
<0x40010 0x4>,
<0x40014 0x4>;
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -619,3 +619,15 @@ prm_gfx: prm@1100 {
#reset-cells = <1>;
};
};
+
+&timer1 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&timer1_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&timer2_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -236,7 +236,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
.init_early = am33xx_init_early,
.init_machine = omap_generic_init,
.init_late = am33xx_init_late,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = am33xx_boards_compat,
.restart = am33xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -367,12 +367,10 @@ struct omap_hwmod am33xx_timer2_hwmod = {
static void omap_hwmod_am33xx_clkctrl(void)
{
- CLKCTRL(am33xx_timer2_hwmod, AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET);
CLKCTRL(am33xx_smartreflex0_hwmod,
AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET);
CLKCTRL(am33xx_smartreflex1_hwmod,
AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET);
- CLKCTRL(am33xx_timer1_hwmod, AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET);
CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET);
PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET);
CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET);
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -265,14 +265,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = {
.user = OCP_USER_MPU,
};
-/* l4 wkup -> timer1 */
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = {
- .master = &am33xx_l4_wkup_hwmod,
- .slave = &am33xx_timer1_hwmod,
- .clk = "dpll_core_m4_div2_ck",
- .user = OCP_USER_MPU,
-};
-
static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l3_main__emif,
&am33xx_mpu__l3_main,
@@ -291,9 +283,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_wkup__control,
&am33xx_l4_wkup__smartreflex0,
&am33xx_l4_wkup__smartreflex1,
- &am33xx_l4_wkup__timer1,
&am33xx_l4_wkup__rtc,
- &am33xx_l4_ls__timer2,
&am33xx_l3_s__gpmc,
&am33xx_l3_main__ocmc,
NULL,
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 07/14] ARM: dts: Configure system timers for am437x
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (5 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 06/14] ARM: dts: Configure system timers for am335x Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 08/14] ARM: dts: Configure system timers for omap4 Tony Lindgren
` (7 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Cc: devicetree@vger.kernel.org
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/am4372.dtsi | 12 ++++
arch/arm/boot/dts/am437x-l4.dtsi | 3 -
arch/arm/mach-omap2/board-generic.c | 2 +-
.../omap_hwmod_33xx_43xx_common_data.h | 2 -
.../omap_hwmod_33xx_43xx_interconnect_data.c | 8 ---
.../omap_hwmod_33xx_43xx_ipblock_data.c | 60 -------------------
arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 45 --------------
7 files changed, 13 insertions(+), 119 deletions(-)
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -553,3 +553,15 @@ prm_device: prm@4000 {
#reset-cells = <1>;
};
};
+
+&timer1 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&timer1_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&timer2_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi
--- a/arch/arm/boot/dts/am437x-l4.dtsi
+++ b/arch/arm/boot/dts/am437x-l4.dtsi
@@ -330,7 +330,6 @@ scm_clockdomains: clockdomains {
target-module@31000 { /* 0x44e31000, ap 24 40.0 */
compatible = "ti,sysc-omap2-timer", "ti,sysc";
- ti,hwmods = "timer1";
reg = <0x31000 0x4>,
<0x31010 0x4>,
<0x31014 0x4>;
@@ -450,7 +449,6 @@ target-module@40000 { /* 0x44e40000, ap 36 68.0 */
target-module@86000 { /* 0x44e86000, ap 40 70.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "counter_32k";
reg = <0x86000 0x4>,
<0x86004 0x4>;
reg-names = "rev", "sysc";
@@ -870,7 +868,6 @@ mcasp1: mcasp@0 {
target-module@40000 { /* 0x48040000, ap 18 1e.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer2";
reg = <0x40000 0x4>,
<0x40010 0x4>,
<0x40014 0x4>;
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -308,7 +308,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
.init_late = am43xx_init_late,
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = am43_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
@@ -44,8 +44,6 @@ extern struct omap_hwmod am33xx_smartreflex0_hwmod;
extern struct omap_hwmod am33xx_smartreflex1_hwmod;
extern struct omap_hwmod am33xx_gpmc_hwmod;
extern struct omap_hwmod am33xx_rtc_hwmod;
-extern struct omap_hwmod am33xx_timer1_hwmod;
-extern struct omap_hwmod am33xx_timer2_hwmod;
extern struct omap_hwmod_class am33xx_emif_hwmod_class;
extern struct omap_hwmod_class am33xx_l4_hwmod_class;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
@@ -106,14 +106,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
.user = OCP_USER_MPU,
};
-/* l4 per -> timer2 */
-struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
- .master = &am33xx_l4_ls_hwmod,
- .slave = &am33xx_timer2_hwmod,
- .clk = "l4ls_gclk",
- .user = OCP_USER_MPU,
-};
-
/* l3 main -> ocmc */
struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
.master = &am33xx_l3_main_hwmod,
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
@@ -307,64 +307,6 @@ struct omap_hwmod am33xx_rtc_hwmod = {
},
};
-/* 'timer 2-7' class */
-static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .syss_offs = 0x0014,
- .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
- SYSC_HAS_RESET_STATUS,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type2,
-};
-
-struct omap_hwmod_class am33xx_timer_hwmod_class = {
- .name = "timer",
- .sysc = &am33xx_timer_sysc,
-};
-
-/* timer1 1ms */
-static struct omap_hwmod_class_sysconfig am33xx_timer1ms_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .syss_offs = 0x0014,
- .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
- SYSS_HAS_RESET_STATUS),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class am33xx_timer1ms_hwmod_class = {
- .name = "timer",
- .sysc = &am33xx_timer1ms_sysc,
-};
-
-struct omap_hwmod am33xx_timer1_hwmod = {
- .name = "timer1",
- .class = &am33xx_timer1ms_hwmod_class,
- .clkdm_name = "l4_wkup_clkdm",
- .main_clk = "timer1_fck",
- .prcm = {
- .omap4 = {
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-struct omap_hwmod am33xx_timer2_hwmod = {
- .name = "timer2",
- .class = &am33xx_timer_hwmod_class,
- .clkdm_name = "l4ls_clkdm",
- .main_clk = "timer2_fck",
- .prcm = {
- .omap4 = {
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
static void omap_hwmod_am33xx_clkctrl(void)
{
CLKCTRL(am33xx_smartreflex0_hwmod,
@@ -397,12 +339,10 @@ void omap_hwmod_am33xx_reg(void)
static void omap_hwmod_am43xx_clkctrl(void)
{
- CLKCTRL(am33xx_timer2_hwmod, AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET);
CLKCTRL(am33xx_smartreflex0_hwmod,
AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET);
CLKCTRL(am33xx_smartreflex1_hwmod,
AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET);
- CLKCTRL(am33xx_timer1_hwmod, AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET);
CLKCTRL(am33xx_rtc_hwmod, AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET);
CLKCTRL(am33xx_gpmc_hwmod, AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET);
CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET);
diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c
@@ -85,34 +85,6 @@ static struct omap_hwmod am43xx_control_hwmod = {
},
};
-static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = {
- .rev_offs = 0x0,
- .sysc_offs = 0x4,
- .sysc_flags = SYSC_HAS_SIDLEMODE,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class am43xx_synctimer_hwmod_class = {
- .name = "synctimer",
- .sysc = &am43xx_synctimer_sysc,
-};
-
-static struct omap_hwmod am43xx_synctimer_hwmod = {
- .name = "counter_32k",
- .class = &am43xx_synctimer_hwmod_class,
- .clkdm_name = "l4_wkup_aon_clkdm",
- .flags = HWMOD_SWSUP_SIDLE,
- .main_clk = "synctimer_32kclk",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-
static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
@@ -206,20 +178,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = {
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_ocp_if am43xx_l4_wkup__timer1 = {
- .master = &am33xx_l4_wkup_hwmod,
- .slave = &am33xx_timer1_hwmod,
- .clk = "sys_clkin_ck",
- .user = OCP_USER_MPU,
-};
-
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__synctimer = {
- .master = &am33xx_l4_wkup_hwmod,
- .slave = &am43xx_synctimer_hwmod,
- .clk = "sys_clkin_ck",
- .user = OCP_USER_MPU,
-};
-
static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = {
.master = &am33xx_l3_s_hwmod,
.slave = &am43xx_usb_otg_ss0_hwmod,
@@ -235,7 +193,6 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = {
};
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
- &am33xx_l4_wkup__synctimer,
&am33xx_mpu__l3_main,
&am33xx_mpu__prcm,
&am33xx_l3_s__l4_ls,
@@ -252,8 +209,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am43xx_l4_wkup__control,
&am43xx_l4_wkup__smartreflex0,
&am43xx_l4_wkup__smartreflex1,
- &am43xx_l4_wkup__timer1,
- &am33xx_l4_ls__timer2,
&am33xx_l3_s__gpmc,
&am33xx_l3_main__ocmc,
&am43xx_l3_s__usbotgss0,
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 08/14] ARM: dts: Configure system timers for omap4
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (6 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 07/14] ARM: dts: Configure system timers for am437x Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 09/14] ARM: dts: Configure system timers for omap5 and dra7 Tony Lindgren
` (6 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Cc: devicetree@vger.kernel.org
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/omap4-l4.dtsi | 2 -
arch/arm/boot/dts/omap4.dtsi | 6 ++
arch/arm/mach-omap2/board-generic.c | 2 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 90 ----------------------
4 files changed, 7 insertions(+), 93 deletions(-)
diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi
--- a/arch/arm/boot/dts/omap4-l4.dtsi
+++ b/arch/arm/boot/dts/omap4-l4.dtsi
@@ -974,7 +974,6 @@ segment@0 { /* 0x4a300000 */
target-module@4000 { /* 0x4a304000, ap 17 24.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "counter_32k";
reg = <0x4000 0x4>,
<0x4004 0x4>;
reg-names = "rev", "sysc";
@@ -1141,7 +1140,6 @@ wdt2: wdt@0 {
target-module@8000 { /* 0x4a318000, ap 9 1c.0 */
compatible = "ti,sysc-omap2-timer", "ti,sysc";
- ti,hwmods = "timer1";
reg = <0x8000 0x4>,
<0x8010 0x4>,
<0x8014 0x4>;
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -655,3 +655,9 @@ prm_device: prm@1b00 {
#reset-cells = <1>;
};
};
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -261,7 +261,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
.init_irq = omap_gic_of_init,
.init_machine = omap_generic_init,
.init_late = omap4430_init_late,
- .init_time = omap4_local_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = omap4_boards_compat,
.restart = omap44xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -231,39 +231,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = {
* usim
*/
-/*
- * 'counter' class
- * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
- */
-
-static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0004,
- .sysc_flags = SYSC_HAS_SIDLEMODE,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap44xx_counter_hwmod_class = {
- .name = "counter",
- .sysc = &omap44xx_counter_sysc,
-};
-
-/* counter_32k */
-static struct omap_hwmod omap44xx_counter_32k_hwmod = {
- .name = "counter_32k",
- .class = &omap44xx_counter_hwmod_class,
- .clkdm_name = "l4_wkup_clkdm",
- .flags = HWMOD_SWSUP_SIDLE,
- .main_clk = "sys_32k_ck",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
- .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET,
- },
- },
-};
-
/*
* 'ctrl_module' class
* attila core control module + core pad control module + wkup pad control
@@ -672,45 +639,6 @@ static struct omap_hwmod omap44xx_sl2if_hwmod = {
},
};
-/*
- * 'timer' class
- * general purpose timer module with accurate 1ms tick
- * This class contains several variants: ['timer_1ms', 'timer']
- */
-
-static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .syss_offs = 0x0014,
- .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
- SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
- SYSS_HAS_RESET_STATUS),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = {
- .name = "timer",
- .sysc = &omap44xx_timer_1ms_sysc,
-};
-
-/* timer1 */
-static struct omap_hwmod omap44xx_timer1_hwmod = {
- .name = "timer1",
- .class = &omap44xx_timer_1ms_hwmod_class,
- .clkdm_name = "l4_wkup_clkdm",
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
- .main_clk = "dmt1_clk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET,
- .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/*
* 'usb_host_fs' class
* full-speed usb host controller
@@ -1063,14 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> counter_32k */
-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
- .master = &omap44xx_l4_wkup_hwmod,
- .slave = &omap44xx_counter_32k_hwmod,
- .clk = "l4_wkup_clk_mux_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_cfg -> ctrl_module_core */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = {
.master = &omap44xx_l4_cfg_hwmod,
@@ -1199,14 +1119,6 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
- .master = &omap44xx_l4_wkup_hwmod,
- .slave = &omap44xx_timer1_hwmod,
- .clk = "l4_wkup_clk_mux_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_cfg -> usb_host_fs */
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
.master = &omap44xx_l4_cfg_hwmod,
@@ -1273,7 +1185,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_cfg__l4_wkup,
&omap44xx_mpu__mpu_private,
&omap44xx_l4_cfg__ocp_wp_noc,
- &omap44xx_l4_wkup__counter_32k,
&omap44xx_l4_cfg__ctrl_module_core,
&omap44xx_l4_cfg__ctrl_module_pad_core,
&omap44xx_l4_wkup__ctrl_module_wkup,
@@ -1290,7 +1201,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_wkup__prm,
&omap44xx_l4_wkup__scrm,
/* &omap44xx_l3_main_2__sl2if, */
- &omap44xx_l4_wkup__timer1,
/* &omap44xx_l4_cfg__usb_host_fs, */
&omap44xx_l4_cfg__usb_host_hs,
&omap44xx_l4_cfg__usb_tll_hs,
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 09/14] ARM: dts: Configure system timers for omap5 and dra7
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (7 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 08/14] ARM: dts: Configure system timers for omap4 Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 10/14] ARM: dts: Configure system timers for omap3 Tony Lindgren
` (5 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Note that similar to omap_init_time_of(), we now need to call
omap_clk_init() also from omap5_realtime_timer_init().
Cc: devicetree@vger.kernel.org
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dra7-l4.dtsi | 5 -
arch/arm/boot/dts/dra7.dtsi | 6 +
arch/arm/boot/dts/omap5-l4.dtsi | 2 -
arch/arm/boot/dts/omap5.dtsi | 6 +
arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 89 -----------
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 176 ---------------------
arch/arm/mach-omap2/timer.c | 17 +-
7 files changed, 13 insertions(+), 288 deletions(-)
diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi
--- a/arch/arm/boot/dts/dra7-l4.dtsi
+++ b/arch/arm/boot/dts/dra7-l4.dtsi
@@ -1143,7 +1143,6 @@ uart3: serial@0 {
target-module@32000 { /* 0x48032000, ap 5 3e.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer2";
reg = <0x32000 0x4>,
<0x32010 0x4>;
reg-names = "rev", "sysc";
@@ -1171,7 +1170,6 @@ timer2: timer@0 {
target-module@34000 { /* 0x48034000, ap 7 46.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer3";
reg = <0x34000 0x4>,
<0x34010 0x4>;
reg-names = "rev", "sysc";
@@ -1199,7 +1197,6 @@ timer3: timer@0 {
target-module@36000 { /* 0x48036000, ap 9 4e.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer4";
reg = <0x36000 0x4>,
<0x36010 0x4>;
reg-names = "rev", "sysc";
@@ -4295,7 +4292,6 @@ segment@0 { /* 0x4ae00000 */
target-module@4000 { /* 0x4ae04000, ap 15 40.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "counter_32k";
reg = <0x4000 0x4>,
<0x4010 0x4>;
reg-names = "rev", "sysc";
@@ -4432,7 +4428,6 @@ wdt2: wdt@0 {
target-module@8000 { /* 0x4ae18000, ap 9 30.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer1";
reg = <0x8000 0x4>,
<0x8010 0x4>;
reg-names = "rev", "sysc";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1044,3 +1044,9 @@ prm_eve4: prm@1c00 {
reg = <0x1c00 0x60>;
};
};
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;
+ assigned-clock-parents = <&sys_32k_ck>;
+};
diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi
--- a/arch/arm/boot/dts/omap5-l4.dtsi
+++ b/arch/arm/boot/dts/omap5-l4.dtsi
@@ -2150,7 +2150,6 @@ segment@0 { /* 0x4ae00000 */
target-module@4000 { /* 0x4ae04000, ap 17 20.0 */
compatible = "ti,sysc-omap2", "ti,sysc";
- ti,hwmods = "counter_32k";
reg = <0x4000 0x4>,
<0x4010 0x4>;
reg-names = "rev", "sysc";
@@ -2338,7 +2337,6 @@ wdt2: wdt@0 {
target-module@8000 { /* 0x4ae18000, ap 9 18.0 */
compatible = "ti,sysc-omap4-timer", "ti,sysc";
- ti,hwmods = "timer1";
reg = <0x8000 0x4>,
<0x8010 0x4>;
reg-names = "rev", "sysc";
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -581,3 +581,9 @@ prm_device: prm@1c00 {
#reset-cells = <1>;
};
};
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
+ assigned-clock-parents = <&sys_32k_ck>;
+};
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -193,39 +193,6 @@ static struct omap_hwmod omap54xx_mpu_private_hwmod = {
},
};
-/*
- * 'counter' class
- * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
- */
-
-static struct omap_hwmod_class_sysconfig omap54xx_counter_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .sysc_flags = SYSC_HAS_SIDLEMODE,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap54xx_counter_hwmod_class = {
- .name = "counter",
- .sysc = &omap54xx_counter_sysc,
-};
-
-/* counter_32k */
-static struct omap_hwmod omap54xx_counter_32k_hwmod = {
- .name = "counter_32k",
- .class = &omap54xx_counter_hwmod_class,
- .clkdm_name = "wkupaon_clkdm",
- .flags = HWMOD_SWSUP_SIDLE,
- .main_clk = "wkupaon_iclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET,
- .context_offs = OMAP54XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET,
- },
- },
-};
-
/*
* 'emif' class
* external memory interface no1 (wrapper)
@@ -299,44 +266,6 @@ static struct omap_hwmod omap54xx_mpu_hwmod = {
},
};
-
-/*
- * 'timer' class
- * general purpose timer module with accurate 1ms tick
- * This class contains several variants: ['timer_1ms', 'timer']
- */
-
-static struct omap_hwmod_class_sysconfig omap54xx_timer_1ms_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class omap54xx_timer_1ms_hwmod_class = {
- .name = "timer",
- .sysc = &omap54xx_timer_1ms_sysc,
-};
-
-/* timer1 */
-static struct omap_hwmod omap54xx_timer1_hwmod = {
- .name = "timer1",
- .class = &omap54xx_timer_1ms_hwmod_class,
- .clkdm_name = "wkupaon_clkdm",
- .main_clk = "timer1_gfclk_mux",
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET,
- .context_offs = OMAP54XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/*
* 'usb_host_hs' class
* high-speed multi-port usb host controller
@@ -666,14 +595,6 @@ static struct omap_hwmod_ocp_if omap54xx_mpu__mpu_private = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> counter_32k */
-static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = {
- .master = &omap54xx_l4_wkup_hwmod,
- .slave = &omap54xx_counter_32k_hwmod,
- .clk = "wkupaon_iclk_mux",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* mpu -> emif1 */
static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = {
.master = &omap54xx_mpu_hwmod,
@@ -698,14 +619,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = {
- .master = &omap54xx_l4_wkup_hwmod,
- .slave = &omap54xx_timer1_hwmod,
- .clk = "wkupaon_iclk_mux",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_cfg -> usb_host_hs */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = {
.master = &omap54xx_l4_cfg_hwmod,
@@ -747,11 +660,9 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l3_main_2__l4_per,
&omap54xx_l3_main_1__l4_wkup,
&omap54xx_mpu__mpu_private,
- &omap54xx_l4_wkup__counter_32k,
&omap54xx_mpu__emif1,
&omap54xx_mpu__emif2,
&omap54xx_l4_cfg__mpu,
- &omap54xx_l4_wkup__timer1,
&omap54xx_l4_cfg__usb_host_hs,
&omap54xx_l4_cfg__usb_tll_hs,
&omap54xx_l4_cfg__usb_otg_ss,
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -221,40 +221,6 @@ static struct omap_hwmod dra7xx_bb2d_hwmod = {
},
};
-/*
- * 'counter' class
- *
- */
-
-static struct omap_hwmod_class_sysconfig dra7xx_counter_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .sysc_flags = SYSC_HAS_SIDLEMODE,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class dra7xx_counter_hwmod_class = {
- .name = "counter",
- .sysc = &dra7xx_counter_sysc,
-};
-
-/* counter_32k */
-static struct omap_hwmod dra7xx_counter_32k_hwmod = {
- .name = "counter_32k",
- .class = &dra7xx_counter_hwmod_class,
- .clkdm_name = "wkupaon_clkdm",
- .flags = HWMOD_SWSUP_SIDLE,
- .main_clk = "wkupaon_iclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET,
- },
- },
-};
-
/*
* 'ctrl_module' class
*
@@ -525,103 +491,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
},
};
-/*
- * 'timer' class
- *
- * This class contains several variants: ['timer_1ms', 'timer_secure',
- * 'timer']
- */
-
-static struct omap_hwmod_class_sysconfig dra7xx_timer_1ms_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = {
- .name = "timer",
- .sysc = &dra7xx_timer_1ms_sysc,
-};
-
-static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
- SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
- SIDLE_SMART_WKUP),
- .sysc_fields = &omap_hwmod_sysc_type2,
-};
-
-static struct omap_hwmod_class dra7xx_timer_hwmod_class = {
- .name = "timer",
- .sysc = &dra7xx_timer_sysc,
-};
-
-/* timer1 */
-static struct omap_hwmod dra7xx_timer1_hwmod = {
- .name = "timer1",
- .class = &dra7xx_timer_1ms_hwmod_class,
- .clkdm_name = "wkupaon_clkdm",
- .main_clk = "timer1_gfclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/* timer2 */
-static struct omap_hwmod dra7xx_timer2_hwmod = {
- .name = "timer2",
- .class = &dra7xx_timer_1ms_hwmod_class,
- .clkdm_name = "l4per_clkdm",
- .main_clk = "timer2_gfclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_L4PER_TIMER2_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_L4PER_TIMER2_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/* timer3 */
-static struct omap_hwmod dra7xx_timer3_hwmod = {
- .name = "timer3",
- .class = &dra7xx_timer_hwmod_class,
- .clkdm_name = "l4per_clkdm",
- .main_clk = "timer3_gfclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_L4PER_TIMER3_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_L4PER_TIMER3_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/* timer4 */
-static struct omap_hwmod dra7xx_timer4_hwmod = {
- .name = "timer4",
- .class = &dra7xx_timer_hwmod_class,
- .clkdm_name = "l4per_clkdm",
- .main_clk = "timer4_gfclk_mux",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_L4PER_TIMER4_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_L4PER_TIMER4_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/*
* 'usb_otg_ss' class
*
@@ -864,14 +733,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__bb2d = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> counter_32k */
-static struct omap_hwmod_ocp_if dra7xx_l4_wkup__counter_32k = {
- .master = &dra7xx_l4_wkup_hwmod,
- .slave = &dra7xx_counter_32k_hwmod,
- .clk = "wkupaon_iclk_mux",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_wkup -> ctrl_module_wkup */
static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = {
.master = &dra7xx_l4_wkup_hwmod,
@@ -952,38 +813,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__sata = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if dra7xx_l4_wkup__timer1 = {
- .master = &dra7xx_l4_wkup_hwmod,
- .slave = &dra7xx_timer1_hwmod,
- .clk = "wkupaon_iclk_mux",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_per1 -> timer2 */
-static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer2 = {
- .master = &dra7xx_l4_per1_hwmod,
- .slave = &dra7xx_timer2_hwmod,
- .clk = "l3_iclk_div",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_per1 -> timer3 */
-static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer3 = {
- .master = &dra7xx_l4_per1_hwmod,
- .slave = &dra7xx_timer3_hwmod,
- .clk = "l3_iclk_div",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4_per1 -> timer4 */
-static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer4 = {
- .master = &dra7xx_l4_per1_hwmod,
- .slave = &dra7xx_timer4_hwmod,
- .clk = "l3_iclk_div",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_per3 -> usb_otg_ss1 */
static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = {
.master = &dra7xx_l4_per3_hwmod,
@@ -1062,7 +891,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l3_main_1__l4_wkup,
&dra7xx_l4_per2__atl,
&dra7xx_l3_main_1__bb2d,
- &dra7xx_l4_wkup__counter_32k,
&dra7xx_l4_wkup__ctrl_module_wkup,
&dra7xx_l3_main_1__gpmc,
&dra7xx_l4_cfg__mpu,
@@ -1072,10 +900,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_cfg__pciess2,
&dra7xx_l3_main_1__qspi,
&dra7xx_l4_cfg__sata,
- &dra7xx_l4_wkup__timer1,
- &dra7xx_l4_per1__timer2,
- &dra7xx_l4_per1__timer3,
- &dra7xx_l4_per1__timer4,
&dra7xx_l4_per3__usb_otg_ss1,
&dra7xx_l4_per3__usb_otg_ss2,
&dra7xx_l4_per3__usb_otg_ss3,
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -576,21 +576,6 @@ void __init omap3_gptimer_timer_init(void)
}
#endif
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
- defined(CONFIG_SOC_DRA7XX)
-static void __init omap4_sync32k_timer_init(void)
-{
- __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
- 0, NULL, NULL, false);
-}
-
-void __init omap4_local_timer_init(void)
-{
- omap4_sync32k_timer_init();
- timer_probe();
-}
-#endif
-
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
/*
@@ -708,7 +693,7 @@ static void __init realtime_counter_init(void)
void __init omap5_realtime_timer_init(void)
{
- omap4_sync32k_timer_init();
+ omap_clk_init();
realtime_counter_init();
timer_probe();
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 10/14] ARM: dts: Configure system timers for omap3
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (8 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 09/14] ARM: dts: Configure system timers for omap5 and dra7 Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 11/14] ARM: dts: Configure system timers for ti81xx Tony Lindgren
` (4 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Let's also update the dts file to use #include while at it.
Cc: devicetree@vger.kernel.org
Cc: Adam Ford <aford173@gmail.com>
Cc: Andreas Kemnade <andreas@kemnade.info>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/am3517.dtsi | 16 ++-
arch/arm/boot/dts/omap3-beagle.dts | 16 +++
arch/arm/boot/dts/omap3-devkit8000.dts | 16 +++
arch/arm/boot/dts/omap3.dtsi | 130 ++++++++++++++----
arch/arm/mach-omap2/board-generic.c | 10 +-
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 146 +--------------------
6 files changed, 159 insertions(+), 175 deletions(-)
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
--- a/arch/arm/boot/dts/am3517.dtsi
+++ b/arch/arm/boot/dts/am3517.dtsi
@@ -169,5 +169,17 @@ &mmu_isp {
status = "disabled";
};
-/include/ "am35xx-clocks.dtsi"
-/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
+#include "am35xx-clocks.dtsi"
+#include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&gpt1_fck>;
+ assigned-clock-parents = <&sys_ck>;
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt2_fck>;
+ assigned-clock-parents = <&sys_ck>;
+};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -304,6 +304,22 @@ &usbhsehci {
phys = <0 &hsusb2_phy>;
};
+&timer1 {
+ /* Unusable as clockevent */
+ compatible = "ti,omap3430-timer";
+};
+
+&timer12 {
+ compatible = "ti,dmtimer-clocksource";
+ /* Always clocked by secure_32k_fck */
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt2_fck>;
+ assigned-clock-parents = <&sys_ck>;
+};
+
&twl_gpio {
ti,use-leds;
/* pullups: BIT(1) */
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -14,3 +14,19 @@ aliases {
display2 = &tv0;
};
};
+
+&timer1 {
+ /* Unusable as clockevent */
+ compatible = "ti,omap3430-timer";
+};
+
+&timer12 {
+ compatible = "ti,dmtimer-clocksource";
+ /* Always clocked by secure_32k_fck */
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt2_fck>;
+ assigned-clock-parents = <&sys_ck>;
+};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -193,10 +193,23 @@ cm_clockdomains: clockdomains {
};
};
- counter32k: counter@48320000 {
- compatible = "ti,omap-counter32k";
- reg = <0x48320000 0x20>;
- ti,hwmods = "counter_32k";
+ target-module@48320000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x48320000 0x4>,
+ <0x48320004 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>;
+ clocks = <&wkup_32k_fck>, <&omap_32ksync_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48320000 0x1000>;
+
+ counter32k: counter@0 {
+ compatible = "ti,omap-counter32k";
+ reg = <0x0 0x20>;
+ };
};
intc: interrupt-controller@48200000 {
@@ -637,19 +650,63 @@ sham: sham@480c3000 {
dma-names = "rx";
};
- timer1: timer@48318000 {
- compatible = "ti,omap3430-timer";
- reg = <0x48318000 0x400>;
- interrupts = <37>;
- ti,hwmods = "timer1";
- ti,timer-alwon;
+ target-module@48318000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x48318000 0x4>,
+ <0x48318010 0x4>,
+ <0x48318014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt1_fck>, <&gpt1_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48318000 0x1000>;
+
+ timer1: timer@0 {
+ compatible = "ti,omap3430-timer";
+ reg = <0x0 0x80>;
+ clocks = <&gpt1_fck>;
+ clock-names = "fck";
+ interrupts = <37>;
+ ti,timer-alwon;
+ };
};
- timer2: timer@49032000 {
- compatible = "ti,omap3430-timer";
- reg = <0x49032000 0x400>;
- interrupts = <38>;
- ti,hwmods = "timer2";
+ target-module@49032000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x49032000 0x4>,
+ <0x49032010 0x4>,
+ <0x49032014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt2_fck>, <&gpt2_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x49032000 0x1000>;
+
+ timer2: timer@0 {
+ compatible = "ti,omap3430-timer";
+ reg = <0 0x400>;
+ interrupts = <38>;
+ };
};
timer3: timer@49034000 {
@@ -723,13 +780,34 @@ timer11: timer@48088000 {
ti,timer-pwm;
};
- timer12: timer@48304000 {
- compatible = "ti,omap3430-timer";
- reg = <0x48304000 0x400>;
- interrupts = <95>;
- ti,hwmods = "timer12";
- ti,timer-alwon;
- ti,timer-secure;
+ target-module@48304000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x48304000 0x4>,
+ <0x48304010 0x4>,
+ <0x48304014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt12_fck>, <&gpt12_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48304000 0x1000>;
+
+ timer12: timer@0 {
+ compatible = "ti,omap3430-timer";
+ reg = <0 0x400>;
+ interrupts = <95>;
+ ti,timer-alwon;
+ ti,timer-secure;
+ };
};
usbhstll: usbhstll@48062000 {
@@ -886,4 +964,10 @@ ssi_port2: ssi-port@4805b000 {
};
};
-/include/ "omap3xxx-clocks.dtsi"
+#include "omap3xxx-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt1_fck>;
+ assigned-clock-parents = <&omap_32k_fck>;
+};
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -114,7 +114,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
.init_early = omap3430_init_early,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
- .init_time = omap_init_time,
+ .init_time = omap_init_time_of,
.dt_compat = n900_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
@@ -132,7 +132,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
.init_early = omap3430_init_early,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
- .init_time = omap_init_time,
+ .init_time = omap_init_time_of,
.dt_compat = omap3_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
@@ -149,7 +149,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
.init_early = omap3630_init_early,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
- .init_time = omap_init_time,
+ .init_time = omap_init_time_of,
.dt_compat = omap36xx_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
@@ -166,7 +166,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
.init_early = omap3430_init_early,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
- .init_time = omap3_secure_sync32k_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = omap3_gp_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
@@ -182,7 +182,7 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
.init_early = am35xx_init_early,
.init_machine = omap_generic_init,
.init_late = omap3_init_late,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = am3517_boards_compat,
.restart = omap3xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -147,36 +147,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
.sysc = &omap3xxx_timer_sysc,
};
-/* timer1 */
-static struct omap_hwmod omap3xxx_timer1_hwmod = {
- .name = "timer1",
- .main_clk = "gpt1_fck",
- .prcm = {
- .omap2 = {
- .module_offs = WKUP_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
- },
- },
- .class = &omap3xxx_timer_hwmod_class,
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
-/* timer2 */
-static struct omap_hwmod omap3xxx_timer2_hwmod = {
- .name = "timer2",
- .main_clk = "gpt2_fck",
- .prcm = {
- .omap2 = {
- .module_offs = OMAP3430_PER_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
- },
- },
- .class = &omap3xxx_timer_hwmod_class,
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
/* timer3 */
static struct omap_hwmod omap3xxx_timer3_hwmod = {
.name = "timer3",
@@ -312,21 +282,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
};
-/* timer12 */
-static struct omap_hwmod omap3xxx_timer12_hwmod = {
- .name = "timer12",
- .main_clk = "gpt12_fck",
- .prcm = {
- .omap2 = {
- .module_offs = WKUP_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT,
- },
- },
- .class = &omap3xxx_timer_hwmod_class,
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
/*
* 'wd_timer' class
* 32-bit watchdog upward counter that generates a pulse on the reset pin on
@@ -1524,38 +1479,6 @@ static struct omap_hwmod omap3xxx_sad2d_hwmod = {
.class = &omap3xxx_sad2d_class,
};
-/*
- * '32K sync counter' class
- * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
- */
-static struct omap_hwmod_class_sysconfig omap3xxx_counter_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0004,
- .sysc_flags = SYSC_HAS_SIDLEMODE,
- .idlemodes = (SIDLE_FORCE | SIDLE_NO),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class omap3xxx_counter_hwmod_class = {
- .name = "counter",
- .sysc = &omap3xxx_counter_sysc,
-};
-
-static struct omap_hwmod omap3xxx_counter_32k_hwmod = {
- .name = "counter_32k",
- .class = &omap3xxx_counter_hwmod_class,
- .clkdm_name = "wkup_clkdm",
- .flags = HWMOD_SWSUP_SIDLE,
- .main_clk = "wkup_32k_fck",
- .prcm = {
- .omap2 = {
- .module_offs = WKUP_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT,
- },
- },
-};
-
/*
* 'gpmc' class
* general purpose memory controller
@@ -1868,25 +1791,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = {
- .master = &omap3xxx_l4_wkup_hwmod,
- .slave = &omap3xxx_timer1_hwmod,
- .clk = "gpt1_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-
-/* l4_per -> timer2 */
-static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = {
- .master = &omap3xxx_l4_per_hwmod,
- .slave = &omap3xxx_timer2_hwmod,
- .clk = "gpt2_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-
/* l4_per -> timer3 */
static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = {
.master = &omap3xxx_l4_per_hwmod,
@@ -1965,15 +1869,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-
-/* l4_core -> timer12 */
-static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = {
- .master = &omap3xxx_l4_sec_hwmod,
- .slave = &omap3xxx_timer12_hwmod,
- .clk = "gpt12_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_wkup -> wd_timer2 */
static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = {
@@ -2325,16 +2220,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = {
.flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
};
-/* l4_wkup -> 32ksync_counter */
-
-
-static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = {
- .master = &omap3xxx_l4_wkup_hwmod,
- .slave = &omap3xxx_counter_32k_hwmod,
- .clk = "omap_32ksync_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* am35xx has Davinci MDIO & EMAC */
static struct omap_hwmod_class am35xx_mdio_class = {
.name = "davinci_mdio",
@@ -2551,8 +2436,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
&omap3_l4_core__i2c2,
&omap3_l4_core__i2c3,
&omap3xxx_l4_wkup__l4_sec,
- &omap3xxx_l4_wkup__timer1,
- &omap3xxx_l4_per__timer2,
&omap3xxx_l4_per__timer3,
&omap3xxx_l4_per__timer4,
&omap3xxx_l4_per__timer5,
@@ -2580,27 +2463,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
&omap34xx_l4_core__mcspi2,
&omap34xx_l4_core__mcspi3,
&omap34xx_l4_core__mcspi4,
- &omap3xxx_l4_wkup__counter_32k,
&omap3xxx_l3_main__gpmc,
NULL,
};
-/* GP-only hwmod links */
-static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = {
- &omap3xxx_l4_sec__timer12,
- NULL,
-};
-
-static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = {
- &omap3xxx_l4_sec__timer12,
- NULL,
-};
-
-static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = {
- &omap3xxx_l4_sec__timer12,
- NULL,
-};
-
/* crypto hwmod links */
static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = {
&omap3xxx_l4_core__sham,
@@ -2774,7 +2640,7 @@ static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,
int __init omap3xxx_hwmod_init(void)
{
int r;
- struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL, **h_sham = NULL;
+ struct omap_hwmod_ocp_if **h = NULL, **h_sham = NULL;
struct omap_hwmod_ocp_if **h_aes = NULL;
struct device_node *bus;
unsigned int rev;
@@ -2797,18 +2663,15 @@ int __init omap3xxx_hwmod_init(void)
rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
h = omap34xx_hwmod_ocp_ifs;
- h_gp = omap34xx_gp_hwmod_ocp_ifs;
h_sham = omap34xx_sham_hwmod_ocp_ifs;
h_aes = omap34xx_aes_hwmod_ocp_ifs;
} else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
h = am35xx_hwmod_ocp_ifs;
- h_gp = am35xx_gp_hwmod_ocp_ifs;
h_sham = am35xx_sham_hwmod_ocp_ifs;
h_aes = am35xx_aes_hwmod_ocp_ifs;
} else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
rev == OMAP3630_REV_ES1_2) {
h = omap36xx_hwmod_ocp_ifs;
- h_gp = omap36xx_gp_hwmod_ocp_ifs;
h_sham = omap36xx_sham_hwmod_ocp_ifs;
h_aes = omap36xx_aes_hwmod_ocp_ifs;
} else {
@@ -2820,13 +2683,6 @@ int __init omap3xxx_hwmod_init(void)
if (r < 0)
return r;
- /* Register GP-only hwmod links. */
- if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) {
- r = omap_hwmod_register_links(h_gp);
- if (r < 0)
- return r;
- }
-
/*
* Register crypto hwmod links only if they are not disabled in DT.
* If DT information is missing, enable them only for GP devices.
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 11/14] ARM: dts: Configure system timers for ti81xx
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (9 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 10/14] ARM: dts: Configure system timers for omap3 Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 12/14] ARM: dts: Configure system timers for omap2 Tony Lindgren
` (3 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, Keerthy, Thomas Gleixner,
Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Note that for ti81xx, also timer1 is of type 2 unlike on am335x
where timer1 is type1 while the rest of the timers are type 2.
Cc: devicetree@vger.kernel.org
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dm814x.dtsi | 66 +++++++++++++++----
arch/arm/boot/dts/dm816x.dtsi | 70 ++++++++++++++++----
arch/arm/mach-omap2/board-generic.c | 4 +-
arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74 ----------------------
4 files changed, 114 insertions(+), 100 deletions(-)
diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -308,14 +308,30 @@ mcspi4: spi@1a4000 {
ti,hwmods = "mcspi4";
};
- timer1: timer@2e000 {
- compatible = "ti,dm814-timer";
- reg = <0x2e000 0x2000>;
- interrupts = <67>;
- ti,hwmods = "timer1";
- ti,timer-alwon;
+ target-module@2e000 {
+ compatible = "ti,sysc-omap4-timer", "ti,sysc";
+ reg = <0x2e000 0x4>,
+ <0x2e010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
clocks = <&timer1_fck>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x2e000 0x1000>;
+
+ timer1: timer@0 {
+ compatible = "ti,am335x-timer-1ms";
+ reg = <0x0 0x400>;
+ interrupts = <67>;
+ ti,timer-alwon;
+ clocks = <&timer1_fck>;
+ clock-names = "fck";
+ };
};
uart1: uart@20000 {
@@ -348,13 +364,29 @@ uart3: uart@24000 {
dma-names = "tx", "rx";
};
- timer2: timer@40000 {
- compatible = "ti,dm814-timer";
- reg = <0x40000 0x2000>;
- interrupts = <68>;
- ti,hwmods = "timer2";
+ target-module@40000 {
+ compatible = "ti,sysc-omap4-timer", "ti,sysc";
+ reg = <0x40000 0x4>,
+ <0x40010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
clocks = <&timer2_fck>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x40000 0x1000>;
+
+ timer2: timer@0 {
+ compatible = "ti,dm814-timer";
+ reg = <0 0x1000>;
+ interrupts = <68>;
+ clocks = <&timer2_fck>;
+ clock-names = "fck";
+ };
};
timer3: timer@42000 {
@@ -735,3 +767,15 @@ gpmc: gpmc@50000000 {
};
#include "dm814x-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&timer1_fck>;
+ assigned-clock-parents = <&devosc_ck>;
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&timer2_fck>;
+ assigned-clock-parents = <&devosc_ck>;
+};
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -440,23 +440,55 @@ mmc1: mmc@48060000 {
dma-names = "tx", "rx";
};
- timer1: timer@4802e000 {
- compatible = "ti,dm816-timer";
- reg = <0x4802e000 0x2000>;
- interrupts = <67>;
- ti,hwmods = "timer1";
- ti,timer-alwon;
- clocks = <&timer1_fck>;
+ target-module@4802e000 {
+ compatible = "ti,sysc-omap4-timer", "ti,sysc";
+ reg = <0x4802e000 0x4>,
+ <0x4802e010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4802e000 0x1000>;
+
+ timer1: timer@0 {
+ compatible = "ti,dm816-timer";
+ reg = <0 0x1000>;
+ interrupts = <67>;
+ ti,timer-alwon;
+ clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
+ clock-names = "fck";
+ };
};
- timer2: timer@48040000 {
- compatible = "ti,dm816-timer";
- reg = <0x48040000 0x2000>;
- interrupts = <68>;
- ti,hwmods = "timer2";
- clocks = <&timer2_fck>;
+ target-module@48040000 {
+ compatible = "ti,sysc-omap4-timer", "ti,sysc";
+ reg = <0x48040000 0x4>,
+ <0x48040010 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>,
+ <SYSC_IDLE_SMART_WKUP>;
+ clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48040000 0x1000>;
+
+ timer2: timer@ {
+ compatible = "ti,dm816-timer";
+ reg = <0 0x1000>;
+ interrupts = <68>;
+ clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
+ clock-names = "fck";
+ };
};
timer3: timer@48042000 {
@@ -642,3 +674,15 @@ wd_timer2: wd_timer@480c2000 {
};
#include "dm816x-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&timer1_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
+
+&timer2 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&timer2_fck>;
+ assigned-clock-parents = <&sys_clkin_ck>;
+};
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -201,7 +201,7 @@ DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
.init_early = ti814x_init_early,
.init_machine = omap_generic_init,
.init_late = ti81xx_init_late,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = ti814x_boards_compat,
.restart = ti81xx_restart,
MACHINE_END
@@ -218,7 +218,7 @@ DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
.init_early = ti816x_init_early,
.init_machine = omap_generic_init,
.init_late = ti81xx_init_late,
- .init_time = omap3_gptimer_timer_init,
+ .init_time = omap_init_time_of,
.dt_compat = ti816x_boards_compat,
.restart = ti81xx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c
@@ -690,76 +690,6 @@ static struct omap_hwmod_class dm816x_timer_hwmod_class = {
.sysc = &dm816x_timer_sysc,
};
-static struct omap_hwmod dm814x_timer1_hwmod = {
- .name = "timer1",
- .clkdm_name = "alwon_l3s_clkdm",
- .main_clk = "timer1_fck",
- .class = &dm816x_timer_hwmod_class,
- .flags = HWMOD_NO_IDLEST,
-};
-
-static struct omap_hwmod_ocp_if dm814x_l4_ls__timer1 = {
- .master = &dm81xx_l4_ls_hwmod,
- .slave = &dm814x_timer1_hwmod,
- .clk = "sysclk6_ck",
- .user = OCP_USER_MPU,
-};
-
-static struct omap_hwmod dm816x_timer1_hwmod = {
- .name = "timer1",
- .clkdm_name = "alwon_l3s_clkdm",
- .main_clk = "timer1_fck",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DM816X_CM_ALWON_TIMER_1_CLKCTRL,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
- .class = &dm816x_timer_hwmod_class,
-};
-
-static struct omap_hwmod_ocp_if dm816x_l4_ls__timer1 = {
- .master = &dm81xx_l4_ls_hwmod,
- .slave = &dm816x_timer1_hwmod,
- .clk = "sysclk6_ck",
- .user = OCP_USER_MPU,
-};
-
-static struct omap_hwmod dm814x_timer2_hwmod = {
- .name = "timer2",
- .clkdm_name = "alwon_l3s_clkdm",
- .main_clk = "timer2_fck",
- .class = &dm816x_timer_hwmod_class,
- .flags = HWMOD_NO_IDLEST,
-};
-
-static struct omap_hwmod_ocp_if dm814x_l4_ls__timer2 = {
- .master = &dm81xx_l4_ls_hwmod,
- .slave = &dm814x_timer2_hwmod,
- .clk = "sysclk6_ck",
- .user = OCP_USER_MPU,
-};
-
-static struct omap_hwmod dm816x_timer2_hwmod = {
- .name = "timer2",
- .clkdm_name = "alwon_l3s_clkdm",
- .main_clk = "timer2_fck",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DM816X_CM_ALWON_TIMER_2_CLKCTRL,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
- .class = &dm816x_timer_hwmod_class,
-};
-
-static struct omap_hwmod_ocp_if dm816x_l4_ls__timer2 = {
- .master = &dm81xx_l4_ls_hwmod,
- .slave = &dm816x_timer2_hwmod,
- .clk = "sysclk6_ck",
- .user = OCP_USER_MPU,
-};
-
static struct omap_hwmod dm816x_timer3_hwmod = {
.name = "timer3",
.clkdm_name = "alwon_l3s_clkdm",
@@ -1288,8 +1218,6 @@ static struct omap_hwmod_ocp_if *dm814x_hwmod_ocp_ifs[] __initdata = {
&dm814x_l4_ls__mmc1,
&dm814x_l4_ls__mmc2,
&ti81xx_l4_ls__rtc,
- &dm814x_l4_ls__timer1,
- &dm814x_l4_ls__timer2,
&dm81xx_alwon_l3_slow__gpmc,
&dm814x_default_l3_slow__usbss,
&dm814x_alwon_l3_med__mmc3,
@@ -1318,8 +1246,6 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = {
&dm81xx_l4_ls__elm,
&ti81xx_l4_ls__rtc,
&dm816x_l4_ls__mmc1,
- &dm816x_l4_ls__timer1,
- &dm816x_l4_ls__timer2,
&dm816x_l4_ls__timer3,
&dm816x_l4_ls__timer4,
&dm816x_l4_ls__timer5,
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 12/14] ARM: dts: Configure system timers for omap2
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (10 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 11/14] ARM: dts: Configure system timers for ti81xx Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 13/14] ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter Tony Lindgren
` (2 subsequent siblings)
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.
As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.
Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.
Let's also update the dts file to use #include while at it.
Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/omap2.dtsi | 38 +++++++++--
arch/arm/boot/dts/omap2420.dtsi | 65 +++++++++++++++----
arch/arm/boot/dts/omap2430.dtsi | 65 +++++++++++++++----
arch/arm/mach-omap2/board-generic.c | 4 +-
arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 ------
arch/arm/mach-omap2/omap_hwmod_2430_data.c | 19 ------
.../omap_hwmod_2xxx_interconnect_data.c | 8 ---
.../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 47 --------------
arch/arm/mach-omap2/omap_hwmod_common_data.h | 3 -
9 files changed, 141 insertions(+), 128 deletions(-)
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -201,11 +201,32 @@ uart3: serial@4806e000 {
clock-frequency = <48000000>;
};
- timer2: timer@4802a000 {
- compatible = "ti,omap2420-timer";
- reg = <0x4802a000 0x400>;
- interrupts = <38>;
- ti,hwmods = "timer2";
+ target-module@4802a000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x4802a000 0x4>,
+ <0x4802a010 0x4>,
+ <0x4802a014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt2_fck>, <&gpt2_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4802a000 0x1000>;
+
+ timer2: timer@0 {
+ compatible = "ti,omap2420-timer";
+ reg = <0 0x400>;
+ interrupts = <38>;
+ };
};
timer3: timer@48078000 {
@@ -318,3 +339,10 @@ venc: encoder@48050c00 {
};
};
};
+#if 0
+&timer2 {
+ compatible = "ti,dmtimer-clocksource";
+ assigned-clocks = <&gpt2_fck>;
+ assigned-clock-parents = <&sys_ck>;
+};
+#endif
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -68,10 +68,23 @@ scm_clockdomains: clockdomains {
};
};
- counter32k: counter@4000 {
- compatible = "ti,omap-counter32k";
- reg = <0x4000 0x20>;
- ti,hwmods = "counter_32k";
+ target-module@4000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x4000 0x4>,
+ <0x4004 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>;
+ clocks = <&func_32k_ck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x4000 0x1000>;
+
+ counter32k: counter@0 {
+ compatible = "ti,omap-counter32k";
+ reg = <0 0x20>;
+ };
};
};
@@ -194,12 +207,33 @@ mbox_iva: iva {
};
};
- timer1: timer@48028000 {
- compatible = "ti,omap2420-timer";
- reg = <0x48028000 0x400>;
- interrupts = <37>;
- ti,hwmods = "timer1";
- ti,timer-alwon;
+ target-module@48028000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x48028000 0x4>,
+ <0x48028010 0x4>,
+ <0x48028014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt1_fck>, <&gpt1_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x48028000 0x1000>;
+
+ timer1: timer@0 {
+ compatible = "ti,omap2420-timer";
+ reg = <0 0x400>;
+ interrupts = <37>;
+ ti,timer-alwon;
+ };
};
wd_timer2: wdt@48022000 {
@@ -218,5 +252,12 @@ &i2c2 {
compatible = "ti,omap2420-i2c";
};
-/include/ "omap24xx-clocks.dtsi"
-/include/ "omap2420-clocks.dtsi"
+#include "omap24xx-clocks.dtsi"
+#include "omap2420-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt1_fck>;
+ assigned-clock-parents = <&func_32k_ck>;
+};
+
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -81,10 +81,23 @@ scm_clockdomains: clockdomains {
};
};
- counter32k: counter@20000 {
- compatible = "ti,omap-counter32k";
- reg = <0x20000 0x20>;
- ti,hwmods = "counter_32k";
+ target-module@20000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x20000 0x4>,
+ <0x20004 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>;
+ clocks = <&func_32k_ck>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x20000 0x1000>;
+
+ counter32k: counter@0 {
+ compatible = "ti,omap-counter32k";
+ reg = <0 0x20>;
+ };
};
};
@@ -277,12 +290,33 @@ mbox_dsp: dsp {
};
};
- timer1: timer@49018000 {
- compatible = "ti,omap2420-timer";
- reg = <0x49018000 0x400>;
- interrupts = <37>;
- ti,hwmods = "timer1";
- ti,timer-alwon;
+ target-module@49018000 {
+ compatible = "ti,sysc-omap2-timer", "ti,sysc";
+ reg = <0x49018000 0x4>,
+ <0x49018010 0x4>,
+ <0x49018014 0x4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+ SYSC_OMAP2_EMUFREE |
+ SYSC_OMAP2_ENAWAKEUP |
+ SYSC_OMAP2_SOFTRESET |
+ SYSC_OMAP2_AUTOIDLE)>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&gpt1_fck>, <&gpt1_ick>;
+ clock-names = "fck", "ick";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x49018000 0x1000>;
+
+ timer1: timer@0 {
+ compatible = "ti,omap2420-timer";
+ reg = <0 0x400>;
+ interrupts = <37>;
+ ti,timer-alwon;
+ };
};
mcspi3: spi@480b8000 {
@@ -321,5 +355,12 @@ &i2c2 {
compatible = "ti,omap2430-i2c";
};
-/include/ "omap24xx-clocks.dtsi"
-/include/ "omap2430-clocks.dtsi"
+#include "omap24xx-clocks.dtsi"
+#include "omap2430-clocks.dtsi"
+
+&timer1 {
+ compatible = "ti,dmtimer-clockevent";
+ assigned-clocks = <&gpt1_fck>;
+ assigned-clock-parents = <&func_32k_ck>;
+};
+
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -50,7 +50,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
.map_io = omap242x_map_io,
.init_early = omap2420_init_early,
.init_machine = omap_generic_init,
- .init_time = omap_init_time,
+ .init_time = omap_init_time_of,
.dt_compat = omap242x_boards_compat,
.restart = omap2xxx_restart,
MACHINE_END
@@ -67,7 +67,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
.map_io = omap243x_map_io,
.init_early = omap2430_init_early,
.init_machine = omap_generic_init,
- .init_time = omap_init_time,
+ .init_time = omap_init_time_of,
.dt_compat = omap243x_boards_compat,
.restart = omap2xxx_restart,
MACHINE_END
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -264,14 +264,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__dsp = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
- .master = &omap2xxx_l4_wkup_hwmod,
- .slave = &omap2xxx_timer1_hwmod,
- .clk = "gpt1_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_wkup -> wd_timer2 */
static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
.master = &omap2xxx_l4_wkup_hwmod,
@@ -352,15 +344,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = {
.flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
};
-
-/* l4_wkup -> 32ksync_counter */
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
- .master = &omap2xxx_l4_wkup_hwmod,
- .slave = &omap2xxx_counter_32k_hwmod,
- .clk = "sync_32k_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
.master = &omap2xxx_l3_main_hwmod,
.slave = &omap2xxx_gpmc_hwmod,
@@ -382,8 +365,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
&omap2420_l4_core__i2c2,
&omap2420_l3__iva,
&omap2420_l3__dsp,
- &omap2420_l4_wkup__timer1,
- &omap2xxx_l4_core__timer2,
&omap2xxx_l4_core__timer3,
&omap2xxx_l4_core__timer4,
&omap2xxx_l4_core__timer5,
@@ -411,7 +392,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
&omap2xxx_l4_core__sham,
&omap2xxx_l4_core__aes,
&omap2420_l4_core__hdq1w,
- &omap2420_l4_wkup__counter_32k,
&omap2420_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -436,14 +436,6 @@ static struct omap_hwmod_ocp_if omap2430_l3__iva = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
- .master = &omap2xxx_l4_wkup_hwmod,
- .slave = &omap2xxx_timer1_hwmod,
- .clk = "gpt1_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_wkup -> wd_timer2 */
static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
.master = &omap2xxx_l4_wkup_hwmod,
@@ -548,14 +540,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = {
.flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
};
-/* l4_wkup -> 32ksync_counter */
-static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {
- .master = &omap2xxx_l4_wkup_hwmod,
- .slave = &omap2xxx_counter_32k_hwmod,
- .clk = "sync_32k_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
static struct omap_hwmod_ocp_if omap2430_l3__gpmc = {
.master = &omap2xxx_l3_main_hwmod,
.slave = &omap2xxx_gpmc_hwmod,
@@ -581,8 +565,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
&omap2xxx_l4_core__mcspi2,
&omap2430_l4_core__mcspi3,
&omap2430_l3__iva,
- &omap2430_l4_wkup__timer1,
- &omap2xxx_l4_core__timer2,
&omap2xxx_l4_core__timer3,
&omap2xxx_l4_core__timer4,
&omap2xxx_l4_core__timer5,
@@ -613,7 +595,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
&omap2xxx_l4_core__rng,
&omap2xxx_l4_core__sham,
&omap2xxx_l4_core__aes,
- &omap2430_l4_wkup__counter_32k,
&omap2430_l3__gpmc,
NULL,
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
@@ -95,14 +95,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l4_core -> timer2 */
-struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
- .master = &omap2xxx_l4_core_hwmod,
- .slave = &omap2xxx_timer2_hwmod,
- .clk = "gpt2_ick",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_core -> timer3 */
struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
.master = &omap2xxx_l4_core_hwmod,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
@@ -195,36 +195,6 @@ struct omap_hwmod omap2xxx_iva_hwmod = {
.class = &iva_hwmod_class,
};
-/* timer1 */
-struct omap_hwmod omap2xxx_timer1_hwmod = {
- .name = "timer1",
- .main_clk = "gpt1_fck",
- .prcm = {
- .omap2 = {
- .module_offs = WKUP_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
- },
- },
- .class = &omap2xxx_timer_hwmod_class,
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
-/* timer2 */
-struct omap_hwmod omap2xxx_timer2_hwmod = {
- .name = "timer2",
- .main_clk = "gpt2_fck",
- .prcm = {
- .omap2 = {
- .module_offs = CORE_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
- },
- },
- .class = &omap2xxx_timer_hwmod_class,
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
/* timer3 */
struct omap_hwmod omap2xxx_timer3_hwmod = {
.name = "timer3",
@@ -595,23 +565,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
.class = &omap2xxx_mcspi_class,
};
-static struct omap_hwmod_class omap2xxx_counter_hwmod_class = {
- .name = "counter",
-};
-
-struct omap_hwmod omap2xxx_counter_32k_hwmod = {
- .name = "counter_32k",
- .main_clk = "func_32k_ck",
- .prcm = {
- .omap2 = {
- .module_offs = WKUP_MOD,
- .idlest_reg_id = 1,
- .idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
- },
- },
- .class = &omap2xxx_counter_hwmod_class,
-};
-
/* gpmc */
struct omap_hwmod omap2xxx_gpmc_hwmod = {
.name = "gpmc",
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.h
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h
@@ -21,8 +21,6 @@ extern struct omap_hwmod omap2xxx_l4_core_hwmod;
extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;
extern struct omap_hwmod omap2xxx_mpu_hwmod;
extern struct omap_hwmod omap2xxx_iva_hwmod;
-extern struct omap_hwmod omap2xxx_timer1_hwmod;
-extern struct omap_hwmod omap2xxx_timer2_hwmod;
extern struct omap_hwmod omap2xxx_timer3_hwmod;
extern struct omap_hwmod omap2xxx_timer4_hwmod;
extern struct omap_hwmod omap2xxx_timer5_hwmod;
@@ -47,7 +45,6 @@ extern struct omap_hwmod omap2xxx_gpio3_hwmod;
extern struct omap_hwmod omap2xxx_gpio4_hwmod;
extern struct omap_hwmod omap2xxx_mcspi1_hwmod;
extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
-extern struct omap_hwmod omap2xxx_counter_32k_hwmod;
extern struct omap_hwmod omap2xxx_gpmc_hwmod;
extern struct omap_hwmod omap2xxx_rng_hwmod;
extern struct omap_hwmod omap2xxx_sham_hwmod;
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 13/14] ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (11 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 12/14] ARM: dts: Configure system timers for omap2 Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-17 16:55 ` [PATCH 14/14] bus: ti-sysc: Timers no longer need legacy quirk handling Tony Lindgren
2020-04-27 7:01 ` [PATCH 00/14] Update omaps to use drivers/clocksource timers Daniel Lezcano
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
With dmtimer and 32k counter being initialized based on devicetree data,
we can just drop the old timer code.
This still leaves the omap5 and dra7 realtime_counter_init() that
depend on the smc calls and control module platform code for the dra7
quirk init.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/Makefile | 4 +-
arch/arm/mach-omap2/common.h | 7 +
arch/arm/mach-omap2/timer.c | 551 -----------------------------------
3 files changed, 10 insertions(+), 552 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -7,7 +7,7 @@ ccflags-y := -I$(srctree)/$(src)/include \
-I$(srctree)/arch/arm/plat-omap/include
# Common support
-obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \
+obj-y := id.o io.o control.o devices.o fb.o pm.o \
common.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
omap_device.o omap-headsmp.o sram.o
@@ -16,6 +16,8 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \
clock-common = clock.o
secure-common = omap-smc.o omap-secure.o
+obj-$(CONFIG_SOC_HAS_REALTIME_COUNTER) += timer.o
+
obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common)
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -111,7 +111,14 @@ static inline int omap_l2_cache_init(void)
#define OMAP_L2C_AUX_CTRL 0
#define omap4_l2c310_write_sec NULL
#endif
+
+#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
extern void omap5_realtime_timer_init(void);
+#else
+static inline void omap5_realtime_timer_init(void)
+{
+}
+#endif
void omap2420_init_early(void);
void omap2430_init_early(void);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -26,34 +26,12 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
-#include <linux/init.h>
-#include <linux/time.h>
-#include <linux/interrupt.h>
-#include <linux/err.h>
#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
#include <linux/clocksource.h>
-#include <linux/clockchips.h>
-#include <linux/slab.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/dmtimer-omap.h>
-#include <linux/sched_clock.h>
-
-#include <asm/mach/time.h>
-
-#include "omap_hwmod.h"
-#include "omap_device.h"
-#include <plat/counter-32k.h>
-#include <clocksource/timer-ti-dm.h>
#include "soc.h"
#include "common.h"
#include "control.h"
-#include "powerdomain.h"
#include "omap-secure.h"
#define REALTIME_COUNTER_BASE 0x48243200
@@ -61,294 +39,12 @@
#define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14
#define NUMERATOR_DENUMERATOR_MASK 0xfffff000
-/* Clockevent code */
-
-static struct omap_dm_timer clkev;
-static struct clock_event_device clockevent_gpt;
-
-/* Clockevent hwmod for am335x and am437x suspend */
-static struct omap_hwmod *clockevent_gpt_hwmod;
-
-/* Clockesource hwmod for am437x suspend */
-static struct omap_hwmod *clocksource_gpt_hwmod;
-
-#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
static unsigned long arch_timer_freq;
void set_cntfreq(void)
{
omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq);
}
-#endif
-
-static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
-{
- struct clock_event_device *evt = &clockevent_gpt;
-
- __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
-
- evt->event_handler(evt);
- return IRQ_HANDLED;
-}
-
-static int omap2_gp_timer_set_next_event(unsigned long cycles,
- struct clock_event_device *evt)
-{
- __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
- 0xffffffff - cycles, OMAP_TIMER_POSTED);
-
- return 0;
-}
-
-static int omap2_gp_timer_shutdown(struct clock_event_device *evt)
-{
- __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
- return 0;
-}
-
-static int omap2_gp_timer_set_periodic(struct clock_event_device *evt)
-{
- u32 period;
-
- __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
-
- period = clkev.rate / HZ;
- period -= 1;
- /* Looks like we need to first set the load value separately */
- __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, 0xffffffff - period,
- OMAP_TIMER_POSTED);
- __omap_dm_timer_load_start(&clkev,
- OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
- 0xffffffff - period, OMAP_TIMER_POSTED);
- return 0;
-}
-
-static void omap_clkevt_idle(struct clock_event_device *unused)
-{
- if (!clockevent_gpt_hwmod)
- return;
-
- omap_hwmod_idle(clockevent_gpt_hwmod);
-}
-
-static void omap_clkevt_unidle(struct clock_event_device *unused)
-{
- if (!clockevent_gpt_hwmod)
- return;
-
- omap_hwmod_enable(clockevent_gpt_hwmod);
- __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
-}
-
-static struct clock_event_device clockevent_gpt = {
- .features = CLOCK_EVT_FEAT_PERIODIC |
- CLOCK_EVT_FEAT_ONESHOT,
- .rating = 300,
- .set_next_event = omap2_gp_timer_set_next_event,
- .set_state_shutdown = omap2_gp_timer_shutdown,
- .set_state_periodic = omap2_gp_timer_set_periodic,
- .set_state_oneshot = omap2_gp_timer_shutdown,
- .tick_resume = omap2_gp_timer_shutdown,
-};
-
-static const struct of_device_id omap_timer_match[] __initconst = {
- { .compatible = "ti,omap2420-timer", },
- { .compatible = "ti,omap3430-timer", },
- { .compatible = "ti,omap4430-timer", },
- { .compatible = "ti,omap5430-timer", },
- { .compatible = "ti,dm814-timer", },
- { .compatible = "ti,dm816-timer", },
- { .compatible = "ti,am335x-timer", },
- { .compatible = "ti,am335x-timer-1ms", },
- { }
-};
-
-static int omap_timer_add_disabled_property(struct device_node *np)
-{
- struct property *prop;
-
- prop = kzalloc(sizeof(*prop), GFP_KERNEL);
- if (!prop)
- return -ENOMEM;
-
- prop->name = "status";
- prop->value = "disabled";
- prop->length = strlen(prop->value);
-
- return of_add_property(np, prop);
-}
-
-static int omap_timer_update_dt(struct device_node *np)
-{
- int error = 0;
-
- if (!of_device_is_compatible(np, "ti,omap-counter32k")) {
- error = omap_timer_add_disabled_property(np);
- if (error)
- return error;
- }
-
- /* No parent interconnect target module configured? */
- if (of_get_property(np, "ti,hwmods", NULL))
- return error;
-
- /* Tag parent interconnect target module disabled */
- error = omap_timer_add_disabled_property(np->parent);
- if (error)
- return error;
-
- return 0;
-}
-
-/**
- * omap_get_timer_dt - get a timer using device-tree
- * @match - device-tree match structure for matching a device type
- * @property - optional timer property to match
- *
- * Helper function to get a timer during early boot using device-tree for use
- * as kernel system timer. Optionally, the property argument can be used to
- * select a timer with a specific property. Once a timer is found then mark
- * the timer node in device-tree as disabled, to prevent the kernel from
- * registering this timer as a platform device and so no one else can use it.
- */
-static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match,
- const char *property)
-{
- struct device_node *np;
- int error;
-
- for_each_matching_node(np, match) {
- if (!of_device_is_available(np))
- continue;
-
- if (property && !of_get_property(np, property, NULL))
- continue;
-
- if (!property && (of_get_property(np, "ti,timer-alwon", NULL) ||
- of_get_property(np, "ti,timer-dsp", NULL) ||
- of_get_property(np, "ti,timer-pwm", NULL) ||
- of_get_property(np, "ti,timer-secure", NULL)))
- continue;
-
- error = omap_timer_update_dt(np);
- WARN(error, "%s: Could not update dt: %i\n", __func__, error);
-
- return np;
- }
-
- return NULL;
-}
-
-/**
- * omap_dmtimer_init - initialisation function when device tree is used
- *
- * For secure OMAP3/DRA7xx devices, timers with device type "timer-secure"
- * cannot be used by the kernel as they are reserved. Therefore, to prevent the
- * kernel registering these devices remove them dynamically from the device
- * tree on boot.
- */
-static void __init omap_dmtimer_init(void)
-{
- struct device_node *np;
-
- if (!cpu_is_omap34xx() && !soc_is_dra7xx())
- return;
-
- /* If we are a secure device, remove any secure timer nodes */
- if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) {
- np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure");
- of_node_put(np);
- }
-}
-
-/**
- * omap_dm_timer_get_errata - get errata flags for a timer
- *
- * Get the timer errata flags that are specific to the OMAP device being used.
- */
-static u32 __init omap_dm_timer_get_errata(void)
-{
- if (cpu_is_omap24xx())
- return 0;
-
- return OMAP_TIMER_ERRATA_I103_I767;
-}
-
-static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
- const char *fck_source,
- const char *property,
- const char **timer_name,
- int posted)
-{
- const char *oh_name = NULL;
- struct device_node *np;
- struct omap_hwmod *oh;
- struct clk *src;
- int r = 0;
-
- np = omap_get_timer_dt(omap_timer_match, property);
- if (!np)
- return -ENODEV;
-
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name) {
- of_property_read_string_index(np->parent, "ti,hwmods", 0,
- &oh_name);
- if (!oh_name)
- return -ENODEV;
- }
-
- timer->irq = irq_of_parse_and_map(np, 0);
- if (!timer->irq)
- return -ENXIO;
-
- timer->io_base = of_iomap(np, 0);
-
- timer->fclk = of_clk_get_by_name(np, "fck");
-
- of_node_put(np);
-
- oh = omap_hwmod_lookup(oh_name);
- if (!oh)
- return -ENODEV;
-
- *timer_name = oh->name;
-
- if (!timer->io_base)
- return -ENXIO;
-
- omap_hwmod_setup_one(oh_name);
-
- /* After the dmtimer is using hwmod these clocks won't be needed */
- if (IS_ERR_OR_NULL(timer->fclk))
- timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh));
- if (IS_ERR(timer->fclk))
- return PTR_ERR(timer->fclk);
-
- src = clk_get(NULL, fck_source);
- if (IS_ERR(src))
- return PTR_ERR(src);
-
- WARN(clk_set_parent(timer->fclk, src) < 0,
- "Cannot set timer parent clock, no PLL clock driver?");
-
- clk_put(src);
-
- omap_hwmod_enable(oh);
- __omap_dm_timer_init_regs(timer);
-
- if (posted)
- __omap_dm_timer_enable_posted(timer);
-
- /* Check that the intended posted configuration matches the actual */
- if (posted != timer->posted)
- return -EINVAL;
-
- timer->rate = clk_get_rate(timer->fclk);
- timer->reserved = 1;
-
- return r;
-}
#if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
void tick_broadcast(const struct cpumask *mask)
@@ -356,226 +52,6 @@ void tick_broadcast(const struct cpumask *mask)
}
#endif
-static void __init omap2_gp_clockevent_init(int gptimer_id,
- const char *fck_source,
- const char *property)
-{
- int res;
-
- clkev.id = gptimer_id;
- clkev.errata = omap_dm_timer_get_errata();
-
- /*
- * For clock-event timers we never read the timer counter and
- * so we are not impacted by errata i103 and i767. Therefore,
- * we can safely ignore this errata for clock-event timers.
- */
- __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767);
-
- res = omap_dm_timer_init_one(&clkev, fck_source, property,
- &clockevent_gpt.name, OMAP_TIMER_POSTED);
- BUG_ON(res);
-
- if (request_irq(clkev.irq, omap2_gp_timer_interrupt,
- IRQF_TIMER | IRQF_IRQPOLL, "gp_timer", &clkev))
- pr_err("Failed to request irq %d (gp_timer)\n", clkev.irq);
-
- __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
-
- clockevent_gpt.cpumask = cpu_possible_mask;
- clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
- clockevents_config_and_register(&clockevent_gpt, clkev.rate,
- 3, /* Timer internal resynch latency */
- 0xffffffff);
-
- if (soc_is_am33xx() || soc_is_am43xx()) {
- clockevent_gpt.suspend = omap_clkevt_idle;
- clockevent_gpt.resume = omap_clkevt_unidle;
-
- clockevent_gpt_hwmod =
- omap_hwmod_lookup(clockevent_gpt.name);
- }
-
- pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name,
- clkev.rate);
-}
-
-/* Clocksource code */
-static struct omap_dm_timer clksrc;
-static bool use_gptimer_clksrc __initdata;
-
-/*
- * clocksource
- */
-static u64 clocksource_read_cycles(struct clocksource *cs)
-{
- return (u64)__omap_dm_timer_read_counter(&clksrc,
- OMAP_TIMER_NONPOSTED);
-}
-
-static struct clocksource clocksource_gpt = {
- .rating = 300,
- .read = clocksource_read_cycles,
- .mask = CLOCKSOURCE_MASK(32),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-static u64 notrace dmtimer_read_sched_clock(void)
-{
- if (clksrc.reserved)
- return __omap_dm_timer_read_counter(&clksrc,
- OMAP_TIMER_NONPOSTED);
-
- return 0;
-}
-
-static const struct of_device_id omap_counter_match[] __initconst = {
- { .compatible = "ti,omap-counter32k", },
- { }
-};
-
-/* Setup free-running counter for clocksource */
-static int __init __maybe_unused omap2_sync32k_clocksource_init(void)
-{
- int ret;
- struct device_node *np = NULL;
- struct omap_hwmod *oh;
- const char *oh_name = "counter_32k";
-
- /*
- * See if the 32kHz counter is supported.
- */
- np = omap_get_timer_dt(omap_counter_match, NULL);
- if (!np)
- return -ENODEV;
-
- of_property_read_string_index(np->parent, "ti,hwmods", 0, &oh_name);
- if (!oh_name) {
- of_property_read_string_index(np, "ti,hwmods", 0, &oh_name);
- if (!oh_name)
- return -ENODEV;
- }
-
- /*
- * First check hwmod data is available for sync32k counter
- */
- oh = omap_hwmod_lookup(oh_name);
- if (!oh || oh->slaves_cnt == 0)
- return -ENODEV;
-
- omap_hwmod_setup_one(oh_name);
-
- ret = omap_hwmod_enable(oh);
- if (ret) {
- pr_warn("%s: failed to enable counter_32k module (%d)\n",
- __func__, ret);
- return ret;
- }
-
- return ret;
-}
-
-static unsigned int omap2_gptimer_clksrc_load;
-
-static void omap2_gptimer_clksrc_suspend(struct clocksource *unused)
-{
- omap2_gptimer_clksrc_load =
- __omap_dm_timer_read_counter(&clksrc, OMAP_TIMER_NONPOSTED);
-
- omap_hwmod_idle(clocksource_gpt_hwmod);
-}
-
-static void omap2_gptimer_clksrc_resume(struct clocksource *unused)
-{
- omap_hwmod_enable(clocksource_gpt_hwmod);
-
- __omap_dm_timer_load_start(&clksrc,
- OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR,
- omap2_gptimer_clksrc_load,
- OMAP_TIMER_NONPOSTED);
-}
-
-static void __init omap2_gptimer_clocksource_init(int gptimer_id,
- const char *fck_source,
- const char *property)
-{
- int res;
-
- clksrc.id = gptimer_id;
- clksrc.errata = omap_dm_timer_get_errata();
-
- res = omap_dm_timer_init_one(&clksrc, fck_source, property,
- &clocksource_gpt.name,
- OMAP_TIMER_NONPOSTED);
-
- if (soc_is_am43xx()) {
- clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend;
- clocksource_gpt.resume = omap2_gptimer_clksrc_resume;
-
- clocksource_gpt_hwmod =
- omap_hwmod_lookup(clocksource_gpt.name);
- }
-
- BUG_ON(res);
-
- __omap_dm_timer_load_start(&clksrc,
- OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
- OMAP_TIMER_NONPOSTED);
- sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate);
-
- if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
- pr_err("Could not register clocksource %s\n",
- clocksource_gpt.name);
- else
- pr_info("OMAP clocksource: %s at %lu Hz\n",
- clocksource_gpt.name, clksrc.rate);
-}
-
-static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src,
- const char *clkev_prop, int clksrc_nr, const char *clksrc_src,
- const char *clksrc_prop, bool gptimer)
-{
- omap_clk_init();
- omap_dmtimer_init();
- omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop);
-
- /* Enable the use of clocksource="gp_timer" kernel parameter */
- if (clksrc_nr && (use_gptimer_clksrc || gptimer))
- omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src,
- clksrc_prop);
- else
- omap2_sync32k_clocksource_init();
-}
-
-void __init omap_init_time(void)
-{
- __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
- 2, "timer_sys_ck", NULL, false);
-
- timer_probe();
-}
-
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
-void __init omap3_secure_sync32k_timer_init(void)
-{
- __omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
- 2, "timer_sys_ck", NULL, false);
-
- timer_probe();
-}
-#endif /* CONFIG_ARCH_OMAP3 */
-
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \
- defined(CONFIG_SOC_AM43XX)
-void __init omap3_gptimer_timer_init(void)
-{
- __omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
- 1, "timer_sys_ck", "ti,timer-alwon", true);
- if (of_have_populated_dt())
- timer_probe();
-}
-#endif
-
#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
/*
@@ -589,7 +65,6 @@ void __init omap3_gptimer_timer_init(void)
*/
static void __init realtime_counter_init(void)
{
-#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
void __iomem *base;
static struct clk *sys_clk;
unsigned long rate;
@@ -688,7 +163,6 @@ static void __init realtime_counter_init(void)
set_cntfreq();
iounmap(base);
-#endif
}
void __init omap5_realtime_timer_init(void)
@@ -699,28 +173,3 @@ void __init omap5_realtime_timer_init(void)
timer_probe();
}
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */
-
-/**
- * omap2_override_clocksource - clocksource override with user configuration
- *
- * Allows user to override default clocksource, using kernel parameter
- * clocksource="gp_timer" (For all OMAP2PLUS architectures)
- *
- * Note that, here we are using same standard kernel parameter "clocksource=",
- * and not introducing any OMAP specific interface.
- */
-static int __init omap2_override_clocksource(char *str)
-{
- if (!str)
- return 0;
- /*
- * For OMAP architecture, we only have two options
- * - sync_32k (default)
- * - gp_timer (sys_clk based)
- */
- if (!strcmp(str, "gp_timer"))
- use_gptimer_clksrc = true;
-
- return 0;
-}
-early_param("clocksource", omap2_override_clocksource);
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* [PATCH 14/14] bus: ti-sysc: Timers no longer need legacy quirk handling
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (12 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 13/14] ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter Tony Lindgren
@ 2020-04-17 16:55 ` Tony Lindgren
2020-04-27 7:01 ` [PATCH 00/14] Update omaps to use drivers/clocksource timers Daniel Lezcano
14 siblings, 0 replies; 25+ messages in thread
From: Tony Lindgren @ 2020-04-17 16:55 UTC (permalink / raw)
To: linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, Keerthy,
Michael Turquette, Daniel Lezcano, linux-kernel, Tero Kristo,
Stephen Boyd, Andreas Kemnade, H. Nikolaus Schaller,
Thomas Gleixner, Adam Ford, linux-clk, linux-arm-kernel
As timers no longer need legacy quirk handling, let's move them to
the CONFIG_DEBUG section to make it easier to see which drivers still
need more work.
Let's also add detection for few more older timer revisions while at
it as that makes CONFIG_DEBUG output easier to read with proper names.
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/bus/ti-sysc.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -1275,13 +1275,6 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
SYSC_QUIRK_LEGACY_IDLE),
SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff,
SYSC_QUIRK_LEGACY_IDLE),
- SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
- 0),
- /* Some timers on omap4 and later */
- SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x50002100, 0xffffffff,
- 0),
- SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x4fff1301, 0xffff00ff,
- 0),
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
@@ -1404,6 +1397,13 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40002903, 0xffffffff, 0),
SYSC_QUIRK("spinlock", 0, 0, 0x10, -ENODEV, 0x50020000, 0xffffffff, 0),
SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -ENODEV, 0x00000020, 0xffffffff, 0),
+ SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000013, 0xffffffff, 0),
+ SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, 0),
+ /* Some timers on omap4 and later */
+ SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x50002100, 0xffffffff, 0),
+ SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x4fff1301, 0xffff00ff, 0),
+ SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000040, 0xffffffff, 0),
+ SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000011, 0xffffffff, 0),
SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000060, 0xffffffff, 0),
SYSC_QUIRK("tpcc", 0, 0, -ENODEV, -ENODEV, 0x40014c00, 0xffffffff, 0),
SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
--
2.26.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread* Re: [PATCH 00/14] Update omaps to use drivers/clocksource timers
2020-04-17 16:55 [PATCH 00/14] Update omaps to use drivers/clocksource timers Tony Lindgren
` (13 preceding siblings ...)
2020-04-17 16:55 ` [PATCH 14/14] bus: ti-sysc: Timers no longer need legacy quirk handling Tony Lindgren
@ 2020-04-27 7:01 ` Daniel Lezcano
14 siblings, 0 replies; 25+ messages in thread
From: Daniel Lezcano @ 2020-04-27 7:01 UTC (permalink / raw)
To: Tony Lindgren, linux-omap
Cc: devicetree, Aaro Koskinen, Lokesh Vutla, H. Nikolaus Schaller,
Michael Turquette, linux-kernel, Tero Kristo, Stephen Boyd,
Andreas Kemnade, Keerthy, Thomas Gleixner, Adam Ford, linux-clk,
linux-arm-kernel
Hi Tony,
On 17/04/2020 18:55, Tony Lindgren wrote:
> Hi all,
>
> Here's a series of changes to udpate omaps to use drivers/clocksource
> timers for the 32k counter and dmtimer and to remove the old legacy
> platform code. Please review and test.
>
> Daniel, if the the first two patches look OK after review, maybe you
> can again set up an immutable branch for the first two patches against
> v5.7-rc1 that I can merge in?
Ok let me review the patches.
> Tony Lindgren (14):
> clocksource/drivers/timer-ti-32k: Add support for initializing
> directly
> clocksource/drivers/timer-ti-dm: Add clockevent and clocksource
> support
> clk: ti: dm816: enable sysclk6_ck on init
> bus: ti-sysc: Ignore timer12 on secure omap3
> ARM: OMAP2+: Add omap_init_time_of()
> ARM: dts: Configure system timers for am335x
> ARM: dts: Configure system timers for am437x
> ARM: dts: Configure system timers for omap4
> ARM: dts: Configure system timers for omap5 and dra7
> ARM: dts: Configure system timers for omap3
> ARM: dts: Configure system timers for ti81xx
> ARM: dts: Configure system timers for omap2
> ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter
> bus: ti-sysc: Timers no longer need legacy quirk handling
>
> .../devicetree/bindings/timer/ti,timer.txt | 2 +
> arch/arm/boot/dts/am33xx-l4.dtsi | 2 -
> arch/arm/boot/dts/am33xx.dtsi | 12 +
> arch/arm/boot/dts/am3517.dtsi | 16 +-
> arch/arm/boot/dts/am4372.dtsi | 12 +
> arch/arm/boot/dts/am437x-l4.dtsi | 3 -
> arch/arm/boot/dts/dm814x.dtsi | 66 +-
> arch/arm/boot/dts/dm816x.dtsi | 70 ++-
> arch/arm/boot/dts/dra7-l4.dtsi | 5 -
> arch/arm/boot/dts/dra7.dtsi | 6 +
> arch/arm/boot/dts/omap2.dtsi | 38 +-
> arch/arm/boot/dts/omap2420.dtsi | 65 +-
> arch/arm/boot/dts/omap2430.dtsi | 65 +-
> arch/arm/boot/dts/omap3-beagle.dts | 16 +
> arch/arm/boot/dts/omap3-devkit8000.dts | 16 +
> arch/arm/boot/dts/omap3.dtsi | 130 +++-
> arch/arm/boot/dts/omap4-l4.dtsi | 2 -
> arch/arm/boot/dts/omap4.dtsi | 6 +
> arch/arm/boot/dts/omap5-l4.dtsi | 2 -
> arch/arm/boot/dts/omap5.dtsi | 6 +
> arch/arm/mach-omap2/Makefile | 4 +-
> arch/arm/mach-omap2/board-generic.c | 32 +-
> arch/arm/mach-omap2/common.h | 7 +
> arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 -
> arch/arm/mach-omap2/omap_hwmod_2430_data.c | 19 -
> .../omap_hwmod_2xxx_interconnect_data.c | 8 -
> .../mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 47 --
> .../omap_hwmod_33xx_43xx_common_data.h | 2 -
> .../omap_hwmod_33xx_43xx_interconnect_data.c | 8 -
> .../omap_hwmod_33xx_43xx_ipblock_data.c | 62 --
> arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 10 -
> arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 146 +----
> arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 45 --
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 90 ---
> arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 89 ---
> arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 176 ------
> arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74 ---
> arch/arm/mach-omap2/omap_hwmod_common_data.h | 3 -
> arch/arm/mach-omap2/timer.c | 568 +-----------------
> drivers/bus/ti-sysc.c | 25 +-
> drivers/clk/ti/clk-816x.c | 1 +
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/timer-ti-32k.c | 48 +-
> drivers/clocksource/timer-ti-dm-systimer.c | 468 +++++++++++++++
> include/clocksource/timer-ti-dm.h | 1 +
> 45 files changed, 1016 insertions(+), 1478 deletions(-)
> create mode 100644 drivers/clocksource/timer-ti-dm-systimer.c
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 25+ messages in thread